diff options
-rw-r--r-- | vgasrc/clext.c | 4 | ||||
-rw-r--r-- | vgasrc/vga.c | 64 | ||||
-rw-r--r-- | vgasrc/vgaio.c | 151 | ||||
-rw-r--r-- | vgasrc/vgatables.h | 39 |
4 files changed, 109 insertions, 149 deletions
diff --git a/vgasrc/clext.c b/vgasrc/clext.c index 1fb4df50..13e3c2bd 100644 --- a/vgasrc/clext.c +++ b/vgasrc/clext.c @@ -340,12 +340,12 @@ cirrus_switch_mode(struct cirrus_mode_s *table) outb(0xff, VGAREG_PEL_MASK); u8 vesacolortype = GET_GLOBAL(table->vesacolortype); - u8 v = biosfn_get_single_palette_reg(0x10) & 0xfe; + u8 v = vgahw_get_single_palette_reg(0x10) & 0xfe; if (vesacolortype == 3) v |= 0x41; else if (vesacolortype) v |= 0x01; - biosfn_set_single_palette_reg(0x10, v); + vgahw_set_single_palette_reg(0x10, v); } void diff --git a/vgasrc/vga.c b/vgasrc/vga.c index 48fcdeb7..5a57f356 100644 --- a/vgasrc/vga.c +++ b/vgasrc/vga.c @@ -16,7 +16,6 @@ // // * convert vbe/clext code // -// * separate code into separate files // * extract hw code from bios interfaces #include "bregs.h" // struct bregs @@ -1061,15 +1060,13 @@ handle_100a(struct bregs *regs) static void handle_100b00(struct bregs *regs) { - // XXX - inline - biosfn_set_border_color(regs); + vgahw_set_border_color(regs->bl); } static void handle_100b01(struct bregs *regs) { - // XXX - inline - biosfn_set_palette(regs); + vgahw_set_palette(regs->bl); } static void @@ -1124,28 +1121,25 @@ handle_101000(struct bregs *regs) { if (regs->bl > 0x14) return; - biosfn_set_single_palette_reg(regs->bl, regs->bh); + vgahw_set_single_palette_reg(regs->bl, regs->bh); } static void handle_101001(struct bregs *regs) { - // XXX - inline - biosfn_set_overscan_border_color(regs); + vgahw_set_overscan_border_color(regs->bh); } static void handle_101002(struct bregs *regs) { - // XXX - inline - biosfn_set_all_palette_reg(regs); + vgahw_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0)); } static void handle_101003(struct bregs *regs) { - // XXX - inline - biosfn_toggle_intensity(regs); + vgahw_toggle_intensity(regs->bl); } static void @@ -1153,77 +1147,72 @@ handle_101007(struct bregs *regs) { if (regs->bl > 0x14) return; - regs->bh = biosfn_get_single_palette_reg(regs->bl); + regs->bh = vgahw_get_single_palette_reg(regs->bl); } static void handle_101008(struct bregs *regs) { - // XXX - inline - biosfn_read_overscan_border_color(regs); + regs->bh = vgahw_get_overscan_border_color(regs); } static void handle_101009(struct bregs *regs) { - // XXX - inline - biosfn_get_all_palette_reg(regs); + vgahw_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0)); } static void handle_101010(struct bregs *regs) { - // XXX - inline - biosfn_set_single_dac_reg(regs); + u8 rgb[3] = {regs->dh, regs->ch, regs->cl}; + vgahw_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1); } static void handle_101012(struct bregs *regs) { - // XXX - inline - biosfn_set_all_dac_reg(regs); + vgahw_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx); } static void handle_101013(struct bregs *regs) { - // XXX - inline - biosfn_select_video_dac_color_page(regs); + vgahw_select_video_dac_color_page(regs->bl, regs->bh); } static void handle_101015(struct bregs *regs) { - // XXX - inline - biosfn_read_single_dac_reg(regs); + u8 rgb[3]; + vgahw_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1); + regs->dh = rgb[0]; + regs->ch = rgb[1]; + regs->cl = rgb[2]; } static void handle_101017(struct bregs *regs) { - // XXX - inline - biosfn_read_all_dac_reg(regs); + vgahw_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx); } static void handle_101018(struct bregs *regs) { - // XXX - inline - biosfn_set_pel_mask(regs); + vgahw_set_pel_mask(regs->bl); } static void handle_101019(struct bregs *regs) { - // XXX - inline - biosfn_read_pel_mask(regs); + regs->bl = vgahw_get_pel_mask(); } static void handle_10101a(struct bregs *regs) { - // XXX - inline - biosfn_read_video_dac_state(regs); + vgahw_read_video_dac_state(®s->bl, ®s->bh); } static void @@ -1285,8 +1274,7 @@ handle_101102(struct bregs *regs) static void handle_101103(struct bregs *regs) { - // XXX - inline - biosfn_set_text_block_specifier(regs); + vgahw_set_text_block_specifier(regs->bl); } static void @@ -1381,8 +1369,8 @@ handle_101231(struct bregs *regs) static void handle_101232(struct bregs *regs) { - // XXX - inline - biosfn_enable_video_addressing(regs); + vgahw_enable_video_addressing(regs->al); + regs->al = 0x12; } static void @@ -1700,7 +1688,7 @@ vga_post(struct bregs *regs) { debug_enter(regs, DEBUG_VGA_POST); - init_vga_card(); + vgahw_init(); init_bios_area(); diff --git a/vgasrc/vgaio.c b/vgasrc/vgaio.c index 88fd01ea..8e63e8cc 100644 --- a/vgasrc/vgaio.c +++ b/vgasrc/vgaio.c @@ -6,7 +6,6 @@ // This file may be distributed under the terms of the GNU LGPLv3 license. #include "ioport.h" // outb -#include "bregs.h" // struct bregs #include "farptr.h" // SET_FARVAR #include "vgatables.h" // VGAREG_* @@ -16,66 +15,67 @@ ****************************************************************/ void -biosfn_set_border_color(struct bregs *regs) +vgahw_set_border_color(u8 color) { inb(VGAREG_ACTL_RESET); outb(0x00, VGAREG_ACTL_ADDRESS); - u8 al = regs->bl & 0x0f; - if (al & 0x08) - al += 0x08; - outb(al, VGAREG_ACTL_WRITE_DATA); - u8 bl = regs->bl & 0x10; + u8 v1 = color & 0x0f; + if (v1 & 0x08) + v1 += 0x08; + outb(v1, VGAREG_ACTL_WRITE_DATA); + u8 v2 = color & 0x10; int i; for (i = 1; i < 4; i++) { outb(i, VGAREG_ACTL_ADDRESS); - al = inb(VGAREG_ACTL_READ_DATA); - al &= 0xef; - al |= bl; - outb(al, VGAREG_ACTL_WRITE_DATA); + u8 cur = inb(VGAREG_ACTL_READ_DATA); + cur &= 0xef; + cur |= v2; + outb(cur, VGAREG_ACTL_WRITE_DATA); } outb(0x20, VGAREG_ACTL_ADDRESS); } void -biosfn_set_overscan_border_color(struct bregs *regs) +vgahw_set_overscan_border_color(u8 color) { inb(VGAREG_ACTL_RESET); outb(0x11, VGAREG_ACTL_ADDRESS); - outb(regs->bh, VGAREG_ACTL_WRITE_DATA); + outb(color, VGAREG_ACTL_WRITE_DATA); outb(0x20, VGAREG_ACTL_ADDRESS); } -void -biosfn_read_overscan_border_color(struct bregs *regs) +u8 +vgahw_get_overscan_border_color() { inb(VGAREG_ACTL_RESET); outb(0x11, VGAREG_ACTL_ADDRESS); - regs->bh = inb(VGAREG_ACTL_READ_DATA); + u8 v = inb(VGAREG_ACTL_READ_DATA); inb(VGAREG_ACTL_RESET); outb(0x20, VGAREG_ACTL_ADDRESS); + return v; } void -biosfn_set_palette(struct bregs *regs) +vgahw_set_palette(u8 palid) { inb(VGAREG_ACTL_RESET); - u8 bl = regs->bl & 0x01; + palid &= 0x01; int i; for (i = 1; i < 4; i++) { outb(i, VGAREG_ACTL_ADDRESS); - u8 al = inb(VGAREG_ACTL_READ_DATA); - al &= 0xfe; - al |= bl; - outb(al, VGAREG_ACTL_WRITE_DATA); + u8 v = inb(VGAREG_ACTL_READ_DATA); + v &= 0xfe; + v |= palid; + outb(v, VGAREG_ACTL_WRITE_DATA); } outb(0x20, VGAREG_ACTL_ADDRESS); } void -biosfn_set_single_palette_reg(u8 reg, u8 val) +vgahw_set_single_palette_reg(u8 reg, u8 val) { inb(VGAREG_ACTL_RESET); outb(reg, VGAREG_ACTL_ADDRESS); @@ -84,7 +84,7 @@ biosfn_set_single_palette_reg(u8 reg, u8 val) } u8 -biosfn_get_single_palette_reg(u8 reg) +vgahw_get_single_palette_reg(u8 reg) { inb(VGAREG_ACTL_RESET); outb(reg, VGAREG_ACTL_ADDRESS); @@ -95,75 +95,73 @@ biosfn_get_single_palette_reg(u8 reg) } void -biosfn_set_all_palette_reg(struct bregs *regs) +vgahw_set_all_palette_reg(u16 seg, u8 *data_far) { inb(VGAREG_ACTL_RESET); - - u8 *data_far = (u8*)(regs->dx + 0); int i; for (i = 0; i < 0x10; i++) { outb(i, VGAREG_ACTL_ADDRESS); - u8 val = GET_FARVAR(regs->es, *data_far); + u8 val = GET_FARVAR(seg, *data_far); outb(val, VGAREG_ACTL_WRITE_DATA); data_far++; } outb(0x11, VGAREG_ACTL_ADDRESS); - outb(GET_FARVAR(regs->es, *data_far), VGAREG_ACTL_WRITE_DATA); + outb(GET_FARVAR(seg, *data_far), VGAREG_ACTL_WRITE_DATA); outb(0x20, VGAREG_ACTL_ADDRESS); } void -biosfn_get_all_palette_reg(struct bregs *regs) +vgahw_get_all_palette_reg(u16 seg, u8 *data_far) { - u8 *data_far = (u8*)(regs->dx + 0); int i; for (i = 0; i < 0x10; i++) { inb(VGAREG_ACTL_RESET); outb(i, VGAREG_ACTL_ADDRESS); - SET_FARVAR(regs->es, *data_far, inb(VGAREG_ACTL_READ_DATA)); + SET_FARVAR(seg, *data_far, inb(VGAREG_ACTL_READ_DATA)); data_far++; } inb(VGAREG_ACTL_RESET); outb(0x11, VGAREG_ACTL_ADDRESS); - SET_FARVAR(regs->es, *data_far, inb(VGAREG_ACTL_READ_DATA)); + SET_FARVAR(seg, *data_far, inb(VGAREG_ACTL_READ_DATA)); inb(VGAREG_ACTL_RESET); outb(0x20, VGAREG_ACTL_ADDRESS); } void -biosfn_toggle_intensity(struct bregs *regs) +vgahw_toggle_intensity(u8 flag) { inb(VGAREG_ACTL_RESET); outb(0x10, VGAREG_ACTL_ADDRESS); - u8 val = (inb(VGAREG_ACTL_READ_DATA) & 0x7f) | ((regs->bl & 0x01) << 3); + u8 val = (inb(VGAREG_ACTL_READ_DATA) & 0xf7) | ((flag & 0x01) << 3); outb(val, VGAREG_ACTL_WRITE_DATA); outb(0x20, VGAREG_ACTL_ADDRESS); } void -biosfn_select_video_dac_color_page(struct bregs *regs) +vgahw_select_video_dac_color_page(u8 flag, u8 data) { inb(VGAREG_ACTL_RESET); outb(0x10, VGAREG_ACTL_ADDRESS); u8 val = inb(VGAREG_ACTL_READ_DATA); - if (!(regs->bl & 0x01)) { - val = (val & 0x7f) | (regs->bh << 7); + if (!(flag & 0x01)) { + // select paging mode + val = (val & 0x7f) | (data << 7); outb(val, VGAREG_ACTL_WRITE_DATA); outb(0x20, VGAREG_ACTL_ADDRESS); return; } + // select page inb(VGAREG_ACTL_RESET); outb(0x14, VGAREG_ACTL_ADDRESS); - u8 bh = regs->bh; if (!(val & 0x80)) - bh <<= 2; - bh &= 0x0f; - outb(bh, VGAREG_ACTL_WRITE_DATA); + data <<= 2; + data &= 0x0f; + outb(data, VGAREG_ACTL_WRITE_DATA); outb(0x20, VGAREG_ACTL_ADDRESS); } void -biosfn_read_video_dac_state(struct bregs *regs) +vgahw_read_video_dac_state(u8 *pmode, u8 *curpage) { inb(VGAREG_ACTL_RESET); outb(0x10, VGAREG_ACTL_ADDRESS); @@ -178,8 +176,8 @@ biosfn_read_video_dac_state(struct bregs *regs) inb(VGAREG_ACTL_RESET); outb(0x20, VGAREG_ACTL_ADDRESS); - regs->bl = val1; - regs->bh = val2; + *pmode = val1; + *curpage = val2; } @@ -188,67 +186,45 @@ biosfn_read_video_dac_state(struct bregs *regs) ****************************************************************/ void -biosfn_set_single_dac_reg(struct bregs *regs) +vgahw_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count) { - outb(regs->bl, VGAREG_DAC_WRITE_ADDRESS); - outb(regs->dh, VGAREG_DAC_DATA); - outb(regs->ch, VGAREG_DAC_DATA); - outb(regs->cl, VGAREG_DAC_DATA); -} - -void -biosfn_read_single_dac_reg(struct bregs *regs) -{ - outb(regs->bl, VGAREG_DAC_READ_ADDRESS); - regs->dh = inb(VGAREG_DAC_DATA); - regs->ch = inb(VGAREG_DAC_DATA); - regs->cl = inb(VGAREG_DAC_DATA); -} - -void -biosfn_set_all_dac_reg(struct bregs *regs) -{ - outb(regs->bl, VGAREG_DAC_WRITE_ADDRESS); - u8 *data_far = (u8*)(regs->dx + 0); - int count = regs->cx; + outb(start, VGAREG_DAC_WRITE_ADDRESS); while (count) { - outb(GET_FARVAR(regs->es, *data_far), VGAREG_DAC_DATA); + outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA); data_far++; - outb(GET_FARVAR(regs->es, *data_far), VGAREG_DAC_DATA); + outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA); data_far++; - outb(GET_FARVAR(regs->es, *data_far), VGAREG_DAC_DATA); + outb(GET_FARVAR(seg, *data_far), VGAREG_DAC_DATA); data_far++; count--; } } void -biosfn_read_all_dac_reg(struct bregs *regs) +vgahw_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count) { - outb(regs->bl, VGAREG_DAC_READ_ADDRESS); - u8 *data_far = (u8*)(regs->dx + 0); - int count = regs->cx; + outb(start, VGAREG_DAC_READ_ADDRESS); while (count) { - SET_FARVAR(regs->es, *data_far, inb(VGAREG_DAC_DATA)); + SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA)); data_far++; - SET_FARVAR(regs->es, *data_far, inb(VGAREG_DAC_DATA)); + SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA)); data_far++; - SET_FARVAR(regs->es, *data_far, inb(VGAREG_DAC_DATA)); + SET_FARVAR(seg, *data_far, inb(VGAREG_DAC_DATA)); data_far++; count--; } } void -biosfn_set_pel_mask(struct bregs *regs) +vgahw_set_pel_mask(u8 val) { - outb(regs->bl, VGAREG_PEL_MASK); + outb(val, VGAREG_PEL_MASK); } -void -biosfn_read_pel_mask(struct bregs *regs) +u8 +vgahw_get_pel_mask() { - regs->bl = inb(VGAREG_PEL_MASK); + return inb(VGAREG_PEL_MASK); } @@ -257,9 +233,9 @@ biosfn_read_pel_mask(struct bregs *regs) ****************************************************************/ void -biosfn_set_text_block_specifier(struct bregs *regs) +vgahw_set_text_block_specifier(u8 spec) { - outw((regs->bl << 8) | 0x03, VGAREG_SEQU_ADDRESS); + outw((spec << 8) | 0x03, VGAREG_SEQU_ADDRESS); } void @@ -293,16 +269,15 @@ release_font_access() ****************************************************************/ void -biosfn_enable_video_addressing(struct bregs *regs) +vgahw_enable_video_addressing(u8 disable) { - u8 v = ((regs->al << 1) & 0x02) ^ 0x02; + u8 v = (disable & 1) ? 0x00 : 0x02; u8 v2 = inb(VGAREG_READ_MISC_OUTPUT) & ~0x02; outb(v | v2, VGAREG_WRITE_MISC_OUTPUT); - regs->ax = 0x1212; } void -init_vga_card() +vgahw_init() { // switch to color mode and enable CPU access 480 lines outb(0xc3, VGAREG_WRITE_MISC_OUTPUT); diff --git a/vgasrc/vgatables.h b/vgasrc/vgatables.h index 2634c8b5..d0baa29a 100644 --- a/vgasrc/vgatables.h +++ b/vgasrc/vgatables.h @@ -133,29 +133,26 @@ void biosfn_load_text_8_8_pat(u8 BL); void biosfn_load_text_8_16_pat(u8 BL); // vgaio.c -struct bregs; -void biosfn_set_border_color(struct bregs *regs); -void biosfn_set_overscan_border_color(struct bregs *regs); -void biosfn_read_overscan_border_color(struct bregs *regs); -void biosfn_set_palette(struct bregs *regs); -void biosfn_set_single_palette_reg(u8 reg, u8 val); -u8 biosfn_get_single_palette_reg(u8 reg); -void biosfn_set_all_palette_reg(struct bregs *regs); -void biosfn_get_all_palette_reg(struct bregs *regs); -void biosfn_toggle_intensity(struct bregs *regs); -void biosfn_select_video_dac_color_page(struct bregs *regs); -void biosfn_read_video_dac_state(struct bregs *regs); -void biosfn_set_single_dac_reg(struct bregs *regs); -void biosfn_read_single_dac_reg(struct bregs *regs); -void biosfn_set_all_dac_reg(struct bregs *regs); -void biosfn_read_all_dac_reg(struct bregs *regs); -void biosfn_set_pel_mask(struct bregs *regs); -void biosfn_read_pel_mask(struct bregs *regs); -void biosfn_set_text_block_specifier(struct bregs *regs); +void vgahw_set_border_color(u8 color); +void vgahw_set_overscan_border_color(u8 color); +u8 vgahw_get_overscan_border_color(); +void vgahw_set_palette(u8 palid); +void vgahw_set_single_palette_reg(u8 reg, u8 val); +u8 vgahw_get_single_palette_reg(u8 reg); +void vgahw_set_all_palette_reg(u16 seg, u8 *data_far); +void vgahw_get_all_palette_reg(u16 seg, u8 *data_far); +void vgahw_toggle_intensity(u8 flag); +void vgahw_select_video_dac_color_page(u8 flag, u8 data); +void vgahw_read_video_dac_state(u8 *pmode, u8 *curpage); +void vgahw_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count); +void vgahw_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count); +void vgahw_set_pel_mask(u8 val); +u8 vgahw_get_pel_mask(); +void vgahw_set_text_block_specifier(u8 spec); void get_font_access(); void release_font_access(); -void biosfn_enable_video_addressing(struct bregs *regs); -void init_vga_card(); +void vgahw_enable_video_addressing(u8 disable); +void vgahw_init(); // clext.c void cirrus_set_video_mode(u8 mode); |