| Commit message (Collapse) | Author | Age | Files | Lines |
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Split pci.c into pci.c and pcidevice.c. The low-level code that
interacts directly with the PCI devices remains in pci.c, while
functions dealing with the higher level pci_device cache move to
pcidevice.c. Only pci.c is needed in 16bit mode.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Also, sort the order of include files in the c files.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Move many C files from the src/ directory to the new src/hw/ directory.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The PCI-BIOS entry point can be called in 16bit protected mode, so
separate its entry code from the legacy 0x1a code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Convert all users of the alternative variable exports to VARFSEG.
There isn't a significant distinction between the existing types of
exports, so it's simpler to just use one type going forward.
The new VARFSEG declaration is only emitting when in 32bit mode, so
update and move some variables as needed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The POST phase has to invoke many initialization functions, and these
functions can have complex inter-dependencies. Try to categorize the
functions into 4 classes:
preinit - functions called very early in POST where function ordering
is very important and the code has limited access to other
interfaces.
init - functions that initialize internal interfaces and standard
external interfaces. This code is generally not dependent on
particular hardware and typically does not communicate directly
with any hardware devices.
setup - functions which access hardware or are dependent on particular
hardware or platform devices.
prepboot - functions that finalize internal interfaces and that
prepare for the boot phase.
This patch attempts to normalize the suffixes - functions that used
_init(), _setup(), _finalize(), or similar that did not follow the
above pattern were renamed. Other than function name changes, there
should be no code impact to this patch.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Technically, the PIR table could be placed at 0xf0000, which would
result in a PirOffset=0, which would confuse the code. So, use an
absolute address (PirAddr) instead. This also matches what the ACPI
and SMBIOS code does.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Clean up includes of biosvar.h.
Rename GET/SET_EBDA2 to GET/SET_EBDA - nearly all users use the
extended form now anyway.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use a more consistent naming that matches entry_xxx to handle_xxx
where possible.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Now that all callers of foreachbdf have been converted to
foreachbdf_in_bus, simplify the pci_next() code - it no longer needs
to track PCI bridges.
Also, rename the remaining users of foreachbdf_in_bus to foreachbdf.
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Convert the last few callers of foreachbdf to foreachbdf_in_bus. This
is in preparation for simplification of foreachbdf_in_bus.
Also add in addition debugging messages to pci_probe.
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Reduce the need for placing #if guards around functions that are
marked as VISIBLE in another code chunk by declaring the functions as
"weak" when they are not needed.
It's still necessary to ensure that no C code references the data from
a different chunk (or an -fwhole-program compile might try to keep a
local reference).
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Omitting "void" leads to a K&R style declaration which was not intended.
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Create a new code blob (code32seg) with support for 32bit functions
that need to utilize explicit segment accesses.
This code blob uses global variables relative to %gs and with a
dynamic code offset (determined by get_global_offset()).
Add BIOS32 structure and code.
Add code for 32bit PCI BIOS code.
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Don't use "fail" in the debug output - as this confuses users.
When reporting on an invalid parameter - use the word "invalid".
When reporting on an unimplemented call - state it is unimplemented.
Add separate debug levels for unimplemented vs invalid calls.
Also, increase the debug level of several entry points.
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The "flat" mode variants work in real mode, but will not work in
protected mode. So, replace with versions that take explicit
segments.
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The term "far pointer" is used in many 16bit specs, and it is
different from what MAKE_FARPTR creates. So, use the term "flat
pointer" in the code to distinguish between the two meanings.
Also, use the suffix "_fl" consistently when working with "flat
pointers".
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The PIR entry copy was copying the header instead of the slots.
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Change license of contributions from Kevin O'Connor from GPLv3 to
LGPLv3 (or later). Since the work as a whole is based on Kevin's
contributions and the "bochs bios" which has a license of LGPL (v2 or
later), this effectively makes the work as a whole available under
LGPLv3 (or later).
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Also, make sure the pir table is defined with the 16bit code.
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It's not valid to set a "start bdf" when search for a device now,
because we wont be able to properly detect the maximum bus unless
we start at the beginning.
Change callers that need to resume a search to use foreachpci() macro.
Update all callers so that they don't pass in the now unused start_bdf.
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time.
Some single-function devices will respond to all sub-functions - and
this confuses things. So, when scanning the PCI bus make sure to
only touch function 0 on single-function devices.
Since the bus scanning code is necessarily complex now, we might as
well implement max bus detection inline with all pci scans. So,
there is no need to scan for the max bus at startup.
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Remove PCIDevice struct and replace with a "u16" with BDF -
Bus/Device/Function. This simplifies the code in several places.
Also, scan for and store the maximum PCI bus found during startup.
The previous config option CONFIG_PCI_BUS_COUNT is no longer
needed and has been removed.
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Define them using their native types (pointers).
Also, fix an apparent bug in mptable coreboot processing - it
incorrectly overwrote the pir_loc variable.
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New pci_find_class() searches by just class, not class and prog-if.
Add some new pci config space definitions.
Add inline functions for converting to/from bus/dev/fn to bdf to PCIDevice.
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Add new option CONFIG_PCI_BUS_COUNT to set max bus count.
Use that option consistently in handle_1ab101() and pci.c.
Also, clean up comments of handle_1ab101().
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Minor code cleanups.
Fix parenthesis imbalance in keyboard led test.
The printf() call is only used in 32bit mode - make this explicit to
the compiler - it improves the code generation.
Clear the screen after initializing the vga option rom.
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Only set the PIR table signature and checksum in the init function -
that way, if it is disabled at runtime (eg, due to coreboot) then
it wont be found by the OS.
Fix parameter swap bug in handle_1ab102.
Add support for more than one bus in pci scanning code (but only have
1 bus for now).
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Move the predefined PIR table (only useful on emulators) to its own
file - pirtable.c.
Have the pcibios code inspect the pre-built PIR table on 1ab10e
calls.
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Also add a copyright to pci.c.
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This devid change synchs code with bochs cvs.
Also fix minor bug causing bus to not be returned in pcibios calls.
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Allow one to enable/disable PIR tables separately from PCI BIOS support.
Use standard PORT_* defs for 0xcf8/0xcfc port accesses.
Don't pass PCIDevice pointers around - the struct is small enough to
pass in a register.
Extract out pci_find_device and pci_find_class functions from PCI BIOS
code.
Remove PCI_FIXED_HOST_BRIDGE check - the check is too late if standard
PCI support isn't available. If standard support is available,
then the code should be okay to run.
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Using set_success permits easier debug hooks in the future.
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This patch adds real-mode pci bios callbacks.
It also adds support for a hardcoded $PIR table.
The pci config functions are moved from rombios32.c to pci.c.
Note that protected mode pci-bios calls were not added.
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