1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
|
#include "types.h" // u8
/*
*
* VGA registers
*
*/
#define VGAREG_ACTL_ADDRESS 0x3c0
#define VGAREG_ACTL_WRITE_DATA 0x3c0
#define VGAREG_ACTL_READ_DATA 0x3c1
#define VGAREG_INPUT_STATUS 0x3c2
#define VGAREG_WRITE_MISC_OUTPUT 0x3c2
#define VGAREG_VIDEO_ENABLE 0x3c3
#define VGAREG_SEQU_ADDRESS 0x3c4
#define VGAREG_SEQU_DATA 0x3c5
#define VGAREG_PEL_MASK 0x3c6
#define VGAREG_DAC_STATE 0x3c7
#define VGAREG_DAC_READ_ADDRESS 0x3c7
#define VGAREG_DAC_WRITE_ADDRESS 0x3c8
#define VGAREG_DAC_DATA 0x3c9
#define VGAREG_READ_FEATURE_CTL 0x3ca
#define VGAREG_READ_MISC_OUTPUT 0x3cc
#define VGAREG_GRDC_ADDRESS 0x3ce
#define VGAREG_GRDC_DATA 0x3cf
#define VGAREG_MDA_CRTC_ADDRESS 0x3b4
#define VGAREG_MDA_CRTC_DATA 0x3b5
#define VGAREG_VGA_CRTC_ADDRESS 0x3d4
#define VGAREG_VGA_CRTC_DATA 0x3d5
#define VGAREG_MDA_WRITE_FEATURE_CTL 0x3ba
#define VGAREG_VGA_WRITE_FEATURE_CTL 0x3da
#define VGAREG_ACTL_RESET 0x3da
#define VGAREG_MDA_MODECTL 0x3b8
#define VGAREG_CGA_MODECTL 0x3d8
#define VGAREG_CGA_PALETTE 0x3d9
/* Video memory */
#define VGAMEM_GRAPH 0xA000
#define VGAMEM_CTEXT 0xB800
#define VGAMEM_MTEXT 0xB000
/*
*
* Tables of default values for each mode
*
*/
#define MODE_MAX 15
#define TEXT 0x00
#define GRAPH 0x01
#define CTEXT 0x00
#define MTEXT 0x01
#define CGA 0x02
#define PLANAR1 0x03
#define PLANAR4 0x04
#define LINEAR8 0x05
// for SVGA
#define LINEAR15 0x10
#define LINEAR16 0x11
#define LINEAR24 0x12
#define LINEAR32 0x13
#define SCROLL_DOWN 0
#define SCROLL_UP 1
#define NO_ATTR 2
#define WITH_ATTR 3
#define SCREEN_SIZE(x,y) (((x*y*2)|0x00ff)+1)
#define SCREEN_MEM_START(x,y,p) ((((x*y*2)|0x00ff)+1)*p)
#define SCREEN_IO_START(x,y,p) ((((x*y)|0x00ff)+1)*p)
extern u16 video_save_pointer_table[];
struct vgamodes_s {
u8 svgamode;
u8 class; /* TEXT, GRAPH */
u8 memmodel; /* CTEXT,MTEXT,CGA,PL1,PL2,PL4,P8,P15,P16,P24,P32 */
u8 pixbits;
u16 sstart;
u8 pelmask;
u8 dacmodel; /* 0 1 2 3 */
} PACKED;
extern struct vgamodes_s vga_modes[];
/* Default Palette */
#define DAC_MAX_MODEL 3
extern u8 line_to_vpti[];
extern u8 dac_regs[];
/* standard BIOS Video Parameter Table */
struct VideoParamTableEntry_s {
u8 twidth;
u8 theightm1;
u8 cheight;
u16 slength;
u8 sequ_regs[4];
u8 miscreg;
u8 crtc_regs[25];
u8 actl_regs[20];
u8 grdc_regs[9];
} PACKED;
extern struct VideoParamTableEntry_s video_param_table[];
extern u8 palette0[];
extern u8 palette1[];
extern u8 palette2[];
extern u8 palette3[];
extern u8 static_functionality[];
// vgafonts.c
extern u8 vgafont8[];
extern u8 vgafont14[];
extern u8 vgafont16[];
extern u8 vgafont14alt[];
extern u8 vgafont16alt[];
// vga.c
void biosfn_set_single_palette_reg(u8 reg, u8 val);
u8 biosfn_get_single_palette_reg(u8 reg);
// clext.c
void cirrus_set_video_mode(u8 mode);
void cirrus_init();
|
