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authorDr. David Alan Gilbert <dgilbert@redhat.com>2019-07-12 13:20:02 +0100
committerMichael S. Tsirkin <mst@redhat.com>2019-07-25 07:21:21 -0400
commit2dd2d468f69b5d0885e837d436f5033ac0d48f6b (patch)
tree9a3a806fa5ce0237b6fd67f2dd0cff8982cf93a6 /content.tex
parent855ad7af2bd645f84209646f78addd8ddc318c0c (diff)
downloadvirtio-spec-2dd2d468f69b5d0885e837d436f5033ac0d48f6b.tar.gz
shared memory: Define mmio registers
Define an MMIO interface to discover and map shared memory regions. Fixes: https://github.com/oasis-tcs/virtio-spec/issues/40 Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@@ -1736,6 +1736,33 @@ All register values are organized as Little Endian.
selected by writing to \field{QueueSel}.
}
\hline
+ \mmioreg{SHMSel}{Shared memory id}{0x0ac}{W}{%
+ Writing to this register selects the shared memory region \ref{sec:Basic Facilities of a Virtio Device / Shared Memory Regions}
+ following operations on \field{SHMLenLow}, \field{SHMLenHigh},
+ \field{SHMBaseLow} and \field{SHMBaseHigh} apply to.
+ }
+ \hline
+ \mmiodreg{SHMLenLow}{SHMLenHigh}{Shared memory region 64 bit long length}{0x0b0}{0x0xb4}{R}{%
+ These registers return the length of the shared memory
+ region in bytes, as defined by the device for the region selected by
+ the \field{SHMSel} register. The lower 32 bits of the length
+ are read from \field{SHMLenLow} and the higher 32 bits from
+ \field{SHMLenHigh}. Reading from a non-existent
+ region (i.e. where the ID written to \field{SHMSel} is unused)
+ results in a length of -1.
+ }
+ \hline
+ \mmiodreg{SHMBaseLow}{SHMBaseHigh}{Shared memory region 64 bit long physical address}{0x0b8}{0x0xbc}{R}{%
+ The driver reads these registers to discover the base address
+ of the region in physical address space. This address is
+ chosen by the device (or other part of the VMM).
+ The lower 32 bits of the address are read from \field{SHMBaseLow}
+ with the higher 32 bits from \field{SHMBaseHigh}. Reading
+ from a non-existent region (i.e. where the ID written to
+ \field{SHMSel} is unused) results in a base address of
+ 0xffffffffffffffff.
+ }
+ \hline
\mmioreg{ConfigGeneration}{Configuration atomicity value}{0x0fc}{R}{
Reading from this register returns a value describing a version of the device-specific configuration space (see \field{Config}).
The driver can then access the configuration space and, when finished, read \field{ConfigGeneration} again.
@@ -1825,6 +1852,9 @@ If both values are valid, it MUST read \field{DeviceID}
and if its value is zero (0x0) MUST abort initialization and
MUST NOT access any other register.
+Drivers not expecting shared memory MUST NOT use the shared
+memory registers.
+
Further initialization MUST follow the procedure described in
\ref{sec:General Initialization And Device Operation / Device Initialization}~\nameref{sec:General Initialization And Device Operation / Device Initialization}.