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authorMichael Brown <mcb30@ipxe.org>2012-07-10 10:52:56 +0100
committerMichael Brown <mcb30@ipxe.org>2012-07-10 11:21:22 +0100
commit9f0b2d25a8e889899711b81213e91d042c58002f (patch)
treee4e97becaeccf60bd34b14896a590f0ef4330469 /src/drivers/net/intel.h
parent8391ff3ee00583071def824231539004cc07fecb (diff)
downloadipxe-9f0b2d25a8e889899711b81213e91d042c58002f.tar.gz
[intel] Explicitly enable descriptor queues
On i350 the datasheet contradicts itself in stating that the default value of RXDCTL.ENABLE for queue zero is both set (according to the "Receive Initialization" section) and unset (according to the "Receive Descriptor Control - RXDCTL" section). Empirical evidence suggests that the default value is unset. Explicitly enable both transmit and receive queues to avoid any ambiguity. Signed-off-by: Michael Brown <mcb30@ipxe.org>
Diffstat (limited to 'src/drivers/net/intel.h')
-rw-r--r--src/drivers/net/intel.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/drivers/net/intel.h b/src/drivers/net/intel.h
index 6f941d17..b38a7139 100644
--- a/src/drivers/net/intel.h
+++ b/src/drivers/net/intel.h
@@ -170,6 +170,10 @@ enum intel_descriptor_status {
/** Receive/Transmit Descriptor Tail (offset) */
#define INTEL_xDT 0x18
+/** Receive/Transmit Descriptor Control (offset) */
+#define INTEL_xDCTL 0x28
+#define INTEL_xDCTL_ENABLE 0x02000000UL /**< Queue enable */
+
/** Receive Descriptor Head */
#define INTEL_RDH ( INTEL_RD + INTEL_xDH )