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author | Dan Williams <dan.j.williams@intel.com> | 2017-08-31 16:25:59 -0700 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2017-08-31 16:25:59 -0700 |
commit | 8f98ae0c9b90bb46097e4f28e81e9ae6148e5694 (patch) | |
tree | c1d0f0d9b0733bf3271780e45d7a1c299fe2fc48 /Documentation/gpio/gpio-legacy.txt | |
parent | 58738c495e15badd2015e19ff41f1f1ed55200bc (diff) | |
parent | 5e405595e5bf4c09fab9ca1e7dbe5b62872757b5 (diff) | |
download | linux-8f98ae0c9b90bb46097e4f28e81e9ae6148e5694.tar.gz |
Merge branch 'for-4.14/fs' into libnvdimm-for-next
Diffstat (limited to 'Documentation/gpio/gpio-legacy.txt')
-rw-r--r-- | Documentation/gpio/gpio-legacy.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/gpio/gpio-legacy.txt b/Documentation/gpio/gpio-legacy.txt index b34fd94f7089..5eacc147ea87 100644 --- a/Documentation/gpio/gpio-legacy.txt +++ b/Documentation/gpio/gpio-legacy.txt @@ -459,7 +459,7 @@ pin controller? This is done by registering "ranges" of pins, which are essentially cross-reference tables. These are described in -Documentation/pinctrl.txt +Documentation/driver-api/pinctl.rst While the pin allocation is totally managed by the pinctrl subsystem, gpio (under gpiolib) is still maintained by gpio drivers. It may happen |