Merge tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux into arm/drivers

Reset controller updates for v5.14

This tag adds support for the Microchip Sparx5 Switch Reset controller
and contains some small fixes and cleanups in core and various drivers.

* tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux:
  reset: brcmstb: Add missing MODULE_DEVICE_TABLE
  reset: a10sr: add missing of_match_table reference
  reset: RESET_INTEL_GW should depend on X86
  reset: RESET_BRCMSTB_RESCAL should depend on ARCH_BRCMSTB
  reset: uniphier: enclose UNIPHIER_RESET_ID_END value in parentheses
  reset: sti/syscfg: replace comma with semicolon
  reset: ti-syscon: fix to_ti_syscon_reset_data macro
  reset: berlin: replace unsigned with unsigned int
  reset: whitespace fixes
  reset: mchp: sparx5: add switch reset driver
  dt-bindings: reset: microchip sparx5 reset driver bindings
  reset: oxnas: replace file name with short description
  reset: zynqmp: replace spaces with tabs
  reset: bcm6345: Make reset_control_ops const

Link: https://lore.kernel.org/r/418cf3a460cfe1d0f91f87e10baaf478bd41f1d5.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 58 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
new file mode 100644
index 000000000000..370579aeeca1
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip Sparx5 Switch Reset Controller
+
+maintainers:
+  - Steen Hegelund <steen.hegelund@microchip.com>
+  - Lars Povlsen <lars.povlsen@microchip.com>
+
+description: |
+  The Microchip Sparx5 Switch provides reset control and implements the following
+  functions
+    - One Time Switch Core Reset (Soft Reset)
+
+properties:
+  $nodename:
+    pattern: "^reset-controller@[0-9a-f]+$"
+
+  compatible:
+    const: microchip,sparx5-switch-reset
+
+  reg:
+    items:
+      - description: global control block registers
+
+  reg-names:
+    items:
+      - const: gcb
+
+  "#reset-cells":
+    const: 1
+
+  cpu-syscon:
+    $ref: "/schemas/types.yaml#/definitions/phandle"
+    description: syscon used to access CPU reset
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - "#reset-cells"
+  - cpu-syscon
+
+additionalProperties: false
+
+examples:
+  - |
+    reset: reset-controller@11010008 {
+        compatible = "microchip,sparx5-switch-reset";
+        reg = <0x11010008 0x4>;
+        reg-names = "gcb";
+        #reset-cells = <1>;
+        cpu-syscon = <&cpu_ctrl>;
+    };
+