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| author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2018-07-10 09:57:58 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-07-10 18:19:02 +0100 |
| commit | 8d3e994241e6bcc7ead2b918c4f15b7683afa90a (patch) | |
| tree | fb2ec1748c8748c7f38b0e077daa1c3649de31c3 /arch/arm/kernel/perf_event_v7.c | |
| parent | 64b2f025715a68bed49fb14588c2d893dfbd00a8 (diff) | |
| download | linux-8d3e994241e6bcc7ead2b918c4f15b7683afa90a.tar.gz | |
arm_pmu: Clean up maximum period handling
Each PMU defines their max_period of the counter as the maximum
value that can be counted. Since all the PMU backends support
32bit counters by default, let us remove the redundant field.
No functional changes.
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/perf_event_v7.c')
| -rw-r--r-- | arch/arm/kernel/perf_event_v7.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 5a5116794440..2cf1ca2925c8 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -1170,7 +1170,6 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu) cpu_pmu->start = armv7pmu_start; cpu_pmu->stop = armv7pmu_stop; cpu_pmu->reset = armv7pmu_reset; - cpu_pmu->max_period = (1LLU << 32) - 1; }; static void armv7_read_num_pmnc_events(void *info) |