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authorJae Hyun Yoo <jae.hyun.yoo@linux.intel.com>2019-10-09 14:20:34 -0700
committerWolfram Sang <wsa@the-dreams.de>2019-10-21 14:09:10 +0200
commit1f0d9cbeec9bb0a1c2013342836f2c9754d6502b (patch)
tree2bfd5df8e6b06ac4b045407ecc94b688553e4dc2 /drivers/fpga/altera-freeze-bridge.c
parent7d194c2100ad2a6dded545887d02754948ca5241 (diff)
downloadlinux-1f0d9cbeec9bb0a1c2013342836f2c9754d6502b.tar.gz
i2c: aspeed: fix master pending state handling
In case of master pending state, it should not trigger a master command, otherwise data could be corrupted because this H/W shares the same data buffer for slave and master operations. It also means that H/W command queue handling is unreliable because of the buffer sharing issue. To fix this issue, it clears command queue if a master command is queued in pending state to use S/W solution instead of H/W command queue handling. Also, it refines restarting mechanism of the pending master command. Fixes: 2e57b7cebb98 ("i2c: aspeed: Add multi-master use case support") Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Brendan Higgins <brendanhiggins@google.com> Acked-by: Joel Stanley <joel@jms.id.au> Tested-by: Tao Ren <taoren@fb.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/fpga/altera-freeze-bridge.c')
0 files changed, 0 insertions, 0 deletions