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| author | Wentao Lou <Wentao.Lou@amd.com> | 2019-04-25 12:43:04 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-04-29 14:57:40 -0500 |
| commit | edf1e0008264ca7ad70d13576d7f204c1cf5abab (patch) | |
| tree | 4779913717a30b4c4b4fb34be68ec8d21e579ad1 /drivers/gpu/drm/radeon/radeon_dp_auxch.c | |
| parent | beac93e6f8101227df2e48d789bde7b6a0895e29 (diff) | |
| download | linux-edf1e0008264ca7ad70d13576d7f204c1cf5abab.tar.gz | |
drm/amdgpu: value of amdgpu_sriov_vf cannot be set into F32_POLL_ENABLE
amdgpu_sriov_vf would return 0x0 or 0x4 to indicate if sriov.
but F32_POLL_ENABLE need 0x0 or 0x1 to determine if enabled.
set 0x4 into F32_POLL_ENABLE would make SDMA0_GFX_RB_WPTR_POLL_CNTL not working.
Signed-off-by: Wentao Lou <Wentao.Lou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_dp_auxch.c')
0 files changed, 0 insertions, 0 deletions