diff options
| author | Konrad Dybcio <konrad.dybcio@somainline.org> | 2021-01-18 17:15:58 +0100 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2021-01-31 11:34:36 -0800 |
| commit | 33a7808ce1aea6e2edc1af25db25928137940c02 (patch) | |
| tree | 408e60299ec4f722f2d96e36fb6103ab2fdb692b /drivers/gpu/drm | |
| parent | d21fc5dfc3dfe51429b7b55f23e79db7815048c7 (diff) | |
| download | linux-33a7808ce1aea6e2edc1af25db25928137940c02.tar.gz | |
drm/msm/dsi: Correct io_start for MSM8994 (20nm PHY)
The previous registers were *almost* correct, but instead of
PHYs, they were pointing at DSI PLLs, resulting in the PHY id
autodetection failing miserably.
Fixes: dcefc117cc19 ("drm/msm/dsi: Add support for msm8x94")
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c index 1afb7c579dbb..eca86bf448f7 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c @@ -139,7 +139,7 @@ const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs = { .disable = dsi_20nm_phy_disable, .init = msm_dsi_phy_init_common, }, - .io_start = { 0xfd998300, 0xfd9a0300 }, + .io_start = { 0xfd998500, 0xfd9a0500 }, .num_dsi_phy = 2, }; |