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authorMiquel Raynal <miquel.raynal@bootlin.com>2020-08-27 10:52:08 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2020-09-30 16:44:15 +0200
commitb5156335ac37f186812090795ed27884a76c3266 (patch)
tree8c9ba5faf10e168ab9b38a624be4c3a0c07c4018 /drivers/mtd/nand/raw/nand_base.c
parentd7157ff49a5b5845b37b8f2bf31607f0af295ef1 (diff)
downloadlinux-b5156335ac37f186812090795ed27884a76c3266.tar.gz
mtd: rawnand: Use the NAND framework user_conf object for ECC flags
Instead of storing the ECC flags in chip->ecc.options, use nanddev->ecc.user_conf.flags. There is currently only one to save: NAND_ECC_MAXIMIZE. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-21-miquel.raynal@bootlin.com
Diffstat (limited to 'drivers/mtd/nand/raw/nand_base.c')
-rw-r--r--drivers/mtd/nand/raw/nand_base.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 8bb3e4ee4bfb..3af9223e5240 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5012,9 +5012,6 @@ static int rawnand_dt_init(struct nand_chip *chip)
if (of_get_nand_on_flash_bbt(dn))
chip->bbt_options |= NAND_BBT_USE_FLASH;
- if (of_property_read_bool(dn, "nand-ecc-maximize"))
- chip->ecc.options |= NAND_ECC_MAXIMIZE;
-
of_get_nand_ecc_user_config(nand);
of_get_nand_ecc_legacy_user_config(chip);
@@ -5145,6 +5142,7 @@ static void nand_scan_ident_cleanup(struct nand_chip *chip)
static int nand_set_ecc_soft_ops(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct nand_ecc_ctrl *ecc = &chip->ecc;
if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT))
@@ -5220,7 +5218,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
* used.
*/
if (mtd->ooblayout == nand_get_large_page_ooblayout() &&
- ecc->options & NAND_ECC_MAXIMIZE) {
+ nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) {
int steps, bytes;
/* Always prefer 1k blocks over 512bytes ones */
@@ -5460,11 +5458,12 @@ nand_maximize_ecc(struct nand_chip *chip,
* @caps: ECC engine caps info structure
* @oobavail: OOB size that the ECC engine can use
*
- * Choose the ECC configuration according to following logic
+ * Choose the ECC configuration according to following logic.
*
* 1. If both ECC step size and ECC strength are already set (usually by DT)
* then check if it is supported by this controller.
- * 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
+ * 2. If the user provided the nand-ecc-maximize property, then select maximum
+ * ECC strength.
* 3. Otherwise, try to match the ECC step size and ECC strength closest
* to the chip's requirement. If available OOB size can't fit the chip
* requirement then fallback to the maximum ECC step size and ECC strength.
@@ -5475,6 +5474,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
const struct nand_ecc_caps *caps, int oobavail)
{
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize))
return -EINVAL;
@@ -5482,7 +5482,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
if (chip->ecc.size && chip->ecc.strength)
return nand_check_ecc_caps(chip, caps, oobavail);
- if (chip->ecc.options & NAND_ECC_MAXIMIZE)
+ if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH)
return nand_maximize_ecc(chip, caps, oobavail);
if (!nand_match_ecc_req(chip, caps, oobavail))