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authorMarc Kleine-Budde <mkl@pengutronix.de>2020-12-16 00:17:45 +0100
committerMarc Kleine-Budde <mkl@pengutronix.de>2021-01-06 15:15:41 +0100
commit1c5d0fc48b3aef66128b10bcf40ff782f32b3909 (patch)
tree77815ea8f69f6a3da38e335f7a405ffa58815f8d /drivers/net/can/m_can/tcan4x5x-core.c
parent1e81d5258d741ef6b0e6d865ee386dfc5fd95060 (diff)
downloadlinux-1c5d0fc48b3aef66128b10bcf40ff782f32b3909.tar.gz
can: tcan4x5x: rework SPI access
This patch reworks the SPI access and fixes several probems: - tcan4x5x_regmap_gather_write(), tcan4x5x_regmap_read(): Do not place variable "addr" on stack and use it as buffer for SPI transfer. Buffers for SPI transfers must be allocated from DMA save memory. - tcan4x5x_regmap_gather_write(), tcan4x5x_regmap_read(): Halfe number of SPI transfers by using a single buffer + memcpy(). This improves the performance, especially on SPI controllers, which use interrupt based transfers. - Use "8" bits per word, not "32". This makes it possible to use this driver on SoCs like the Raspberry Pi, which SPI host controller drivers only support 8 bits per word. Note: this breaks half duplex only controllers. Support for them will be re-added in the next patch. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-16-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'drivers/net/can/m_can/tcan4x5x-core.c')
-rw-r--r--drivers/net/can/m_can/tcan4x5x-core.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/can/m_can/tcan4x5x-core.c b/drivers/net/can/m_can/tcan4x5x-core.c
index 739b8f89a335..d37843a74663 100644
--- a/drivers/net/can/m_can/tcan4x5x-core.c
+++ b/drivers/net/can/m_can/tcan4x5x-core.c
@@ -380,7 +380,7 @@ static int tcan4x5x_can_probe(struct spi_device *spi)
spi_set_drvdata(spi, priv);
/* Configure the SPI bus */
- spi->bits_per_word = 32;
+ spi->bits_per_word = 8;
ret = spi_setup(spi);
if (ret)
goto out_m_can_class_free_dev;