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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2022-11-11 10:41:06 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2022-11-14 14:20:41 +0100 |
| commit | e1ff91f9d2303cd4e706cc908bfca21cd17b9927 (patch) | |
| tree | aab9fcb0501757c38550fb478ba42aaa4db7f393 /drivers/pinctrl/mediatek/pinctrl-mt2712.c | |
| parent | 91d5c5060ee24fe8da88cd585bb43b843d2f0dce (diff) | |
| download | linux-e1ff91f9d2303cd4e706cc908bfca21cd17b9927.tar.gz | |
pinctrl: mediatek: Fix EINT pins input debounce time configuration
The External Interrupt Controller (EINTC) on all of the supported
MediaTek SoCs does support input debouncing, but not all of them
index the debounce time values (DBNC_SETTING registers) the same way.
Before this change, in some cases, as an example, requesting a debounce
time of 16 milliseconds would mistakenly set the relative DBNC_SETTING
register to 0x2, resulting in a way shorter debounce time of 500uS.
To fix the aforementioned issue, define three different debounce_time
arrays, reflecting the correct register index for each value and for
each register index variant, and make sure that each SoC pinctrl
driver uses the right one.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221111094106.18486-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/mediatek/pinctrl-mt2712.c')
| -rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt2712.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2712.c b/drivers/pinctrl/mediatek/pinctrl-mt2712.c index b921068f9e69..730a496848dc 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt2712.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt2712.c @@ -567,6 +567,7 @@ static const struct mtk_pinctrl_devdata mt2712_pinctrl_data = { .ports = 8, .ap_num = 229, .db_cnt = 40, + .db_time = debounce_time_mt2701, }, }; |