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* powerpc/fsl: Use new clockgen bindingScott Wood2018-12-211-61/+0
| | | | | | | | | | | The driver retains compatibility with old device trees, but we don't want the old nodes lying around to be copied, or used as a reference (some of the mux options are incorrect), or even just being clutter. Signed-off-by: Scott Wood <oss@buserror.net> Signed-off-by: Tang Yuantian <andy.tang@nxp.com> [scottwood: removed sysclk node added by Andy] Signed-off-by: Scott Wood <oss@buserror.net>
* powerpc/mpc85xx: Add FSL QorIQ DPAA FMan support to the SoC device tree(s)Igal Liberman2015-10-271-1/+87
| | | | | | | | | Based on prior work by Andy Fleming <afleming@freescale.com> Signed-off-by: Shruti Kanetkar <Shruti@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/mpc85xx: Add FSL QorIQ DPAA QMan support to device tree(s)Kumar Gala2015-06-021-0/+318
| | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> [Scott Wood: s/fsl,qman-channel-id/cell-index] Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
* powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support to device tree(s)Kumar Gala2015-03-231-1/+264
| | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/dts: Factorize the clock control nodeEmil Medve2014-11-071-27/+2
| | | | | | Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: I25ce24a25862b4ca460164159867abefe00ccdd1 Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc: dts: t4240: Change T4240 USB controller versionNikhil Badola2014-09-031-2/+2
| | | | | | | Change USB controller version to 2.5 in compatible string for T4240 Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* t4240/dts: Enable third elo3 DMA engine supportChunhe Lan2014-06-201-0/+1
| | | | | | | | | | T4240 has a third DMA engine controller, so add the corresponding DMA node into the dts file. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: reword commit message] Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/fsl: Updated device trees for platforms with corenet version 2Diana Craciun2014-05-221-1/+2
| | | | | | | | Updated the device trees according to the corenet-cf binding definition. Signed-off-by: Diana Craciun <Diana.Craciun@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/mpc85xx: Update clock nodes in device treeTang Yuantian2014-03-191-0/+86
| | | | | | | | | The following SoCs will be affected: p2041, p3041, p4080, p5020, p5040, b4420, b4860, t4240 Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* DMA: Freescale: Add new 8-channel DMA engine device tree nodesHongbo Zhang2013-11-131-2/+2
| | | | | | | | | Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds the device tree nodes for them. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* powerpc/dts: add MPIC v4.3 dts nodeMinghuan Lian2013-08-071-1/+1
| | | | | | | | | | | For the latest platform T4 and B4, MPIC controller has been updated to v4.3. This patch adds a new file to describe the latest MPIC. The MSI blocks number is increased to four, the registers number of each block is increased to sixteen. MSIIR1 has been added to access these sixteen MSI registers. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/fsl-booke: add the reg prop for pci bridge device node for T4/B4Kevin Hao2013-04-291-0/+4
| | | | | | | | | | | The reg property in the pci bridge device node is used to bind this device node to the pci bridge device. Then all the pci devices under this bridge could use the interrupt maps defined in this device node to do the irq translation. So if this property is missed, the pci traditional irq mechanism will not work. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Minor fixes to T4240 Si device treeKumar Gala2013-04-091-2/+2
| | | | | | | * Fix cpu unit address to match reg * Update compatible for rcpm & clockgen to be 2.0 instead of 2 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Update T4240 device config node in device treeKumar Gala2013-03-181-1/+1
| | | | | | | As the T4240 is based on corenet chassis v2.0 spec we update the global utilities (GUTS) device config compatiable to reflect this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Added device tree DCSR entries for T4240 Chassis v2 Debug IPStephen George2013-03-181-0/+131
| | | | | Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Add initial silicon device tree for T4240Kumar Gala2013-03-121-0/+307
Enable a baseline T4240 SoC to boot. There are several things missing from the device trees for T4240: * Proper PAMU topology information * DPAA related nodes (Qman, Bman, Fman, Rman, DCE) * Prefetch Manager * Thermal monitor unit * Interlaken Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>