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path: root/drivers/gpu/drm/i915/display/intel_bios.c
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* drm/i915: Parse DP/eDP max lane count from VBTVille Syrjälä2022-09-051-0/+16
* drm/i915/bios: Use hardcoded fp_timing size for generating LFP data pointersVille Syrjälä2022-09-021-28/+18
* drm/i915/bios: Validate fp_timing terminator presenceVille Syrjälä2022-09-021-28/+32
* drm/i915/bios: Copy the whole MIPI sequence blockVille Syrjälä2022-08-311-0/+7
* drm/i915/bios: Dump PNPID and panel nameVille Syrjälä2022-08-311-0/+23
* drm/i915: move vbt to display.vbtJani Nikula2022-08-311-106/+106
* drm/i915: move opregion to display.opregionJani Nikula2022-08-311-2/+2
* drm/i915/mtl: Add VBT port and AUX_CH mappingImre Deak2022-08-251-7/+7
* drm/i915/dsi: fix dual-link DSI backlight and CABC ports for display 11+Jani Nikula2022-08-181-4/+6
* Merge tag 'drm-intel-next-2022-07-06' of git://anongit.freedesktop.org/drm/dr...Dave Airlie2022-07-121-2/+6
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| * drm/i915/bios: debug log ddi port info after parsingJani Nikula2022-06-301-2/+6
* | Merge tag 'drm-intel-next-2022-06-22' of git://anongit.freedesktop.org/drm/dr...Dave Airlie2022-06-241-236/+416
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| * drm/i915/bios: calculate panel type as per child device index in VBTAnimesh Manna2022-06-201-2/+14
| * drm/i915/bios: Introduce panel_bits() and panel_bool()Ville Syrjälä2022-06-161-10/+21
| * drm/i915/bios: Don't parse the DPS panel type when the VBT does not have itVille Syrjälä2022-06-161-0/+8
| * drm/i915/bios: Move panel_type stuff out of parse_panel_options()Ville Syrjälä2022-06-161-8/+5
| * drm/i915/bios: split ddi port parsing and debug printingJani Nikula2022-06-151-28/+37
| * drm/i915/bios: no need to pass i915 to parse_ddi_port()Jani Nikula2022-06-151-3/+3
| * drm/i915/bios: use dvi and hdmi support helpersJani Nikula2022-06-151-2/+2
| * drm/i915: Parse max link rate from the eDP BDB blockVille Syrjälä2022-06-081-0/+4
| * drm/i915: Update eDP fast link training link rate parsingVille Syrjälä2022-06-081-12/+20
| * drm/i915: Treat DMRRS as static DRRSVille Syrjälä2022-06-011-4/+20
| * drm/i915: Parse VRR capability from VBTVille Syrjälä2022-06-011-0/+5
| * drm/i915/bios: Determine panel type via PNPID matchVille Syrjälä2022-05-271-13/+85
| * drm/i915/bios: Split VBT data into per-panel vs. global partsVille Syrjälä2022-05-271-174/+197
| * drm/i915/bios: Split VBT parsing to global vs. panel specific partsVille Syrjälä2022-05-271-11/+15
| * drm/i915/bios: Split parse_driver_features() into two partsVille Syrjälä2022-05-271-0/+11
| * drm/i915: Rename block_size()/block_offset()Ville Syrjälä2022-05-231-4/+4
* | drm: Drop drm_edid.h from drm_crtc.hVille Syrjälä2022-06-201-0/+1
* | Merge tag 'drm-intel-next-2022-05-06' of git://anongit.freedesktop.org/drm/dr...Dave Airlie2022-05-111-50/+295
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| * drm/i915/bios: Parse the seamless DRRS min refresh rateVille Syrjälä2022-05-051-1/+8
| * drm/i915/bios: Refactor panel_type codeVille Syrjälä2022-05-051-13/+53
| * drm/i915/bios: Extract get_panel_type()Ville Syrjälä2022-05-051-19/+39
| * drm/i915/bios: Assume panel_type==0 if the VBT has bogus dataVille Syrjälä2022-05-051-5/+6
| * drm/i915/bios: Get access to the tail end of the LFP data blockVille Syrjälä2022-05-051-1/+42
| * drm/i915/bios: Generate LFP data table pointers if the VBT lacks themVille Syrjälä2022-05-051-1/+133
| * drm/i915/bios: Reorder panel DTD parsingVille Syrjälä2022-05-051-30/+34
* | drm/display: Move DSC header and helpers into display-helper moduleThomas Zimmermann2022-04-251-0/+1
* | drm: Rename dp/ to display/Thomas Zimmermann2022-04-251-1/+1
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* drm/i915/bios: Validate the panel_name tableVille Syrjälä2022-04-121-1/+17
* drm/i915/bios: Trust the LFP data pointersVille Syrjälä2022-04-121-44/+16
* drm/i915/bios: Validate LFP data table pointersVille Syrjälä2022-04-121-1/+81
* drm/i915/bios: Use the copy of the LFP data table alwaysVille Syrjälä2022-04-121-7/+34
* drm/i915/bios: Make copies of VBT data blocksVille Syrjälä2022-04-121-57/+173
* drm/i915/bios: Use the cached BDB versionVille Syrjälä2022-04-121-27/+27
* drm/i915/bios: Extract struct lvds_lfp_data_ptr_tableVille Syrjälä2022-04-041-5/+5
* drm/i915: Use DRM_MODE_FMT+DRM_MODE_ARG()Ville Syrjälä2022-03-291-6/+6
* drm/i915: Polish drrs type enumVille Syrjälä2022-03-101-5/+5
* drm/i915: Read DRRS MSA timing delay from VBTVille Syrjälä2022-03-101-0/+3
* drm/i915: update new TMDS clock setting defined by VBTLee Shawn C2022-03-031-0/+6
generated by cgit (git 2.34.1) at 2025-02-23 18:24:43 +0000