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path: root/drivers/gpu/drm/i915/i915_reg.h
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* drm/i915/gt: Move ivb GT workarounds from init_clock_gating to workaroundsChris Wilson2020-06-161-1/+1
* Merge branch 'uaccess.i915' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds2020-06-101-1/+1
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| * i915: switch copy_perf_config_registers_or_number() to unsafe_put_user()Al Viro2020-05-011-1/+1
* | drm/i915/gen12: Add aux table invalidate for all enginesMika Kuoppala2020-05-071-0/+6
* | drm/i915/gen12: Invalidate aux table entries forciblyMika Kuoppala2020-05-071-0/+2
* | drm/i915/icp: Add Wa_14010685332Matt Roper2020-05-051-0/+1
* | drm/i915: Added required new PCode commandsStanislav Lisovskiy2020-05-051-0/+4
* | drm/i915/selftests: Add tiled blits selftestZbigniew Kempczyński2020-04-301-0/+2
* | drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTLMika Kuoppala2020-04-251-0/+1
* | drm/i915/gt: Use the RPM config register to determine clk frequenciesChris Wilson2020-04-241-25/+0
* | drm/i915/selftests: Check RPS controlsChris Wilson2020-04-201-0/+1
* | drm/i915: fix Sphinx build duplicate label warningJani Nikula2020-04-201-2/+2
* | drm/i915/tc/tgl: Implement TC cold sequencesJosé Roberto de Souza2020-04-171-0/+4
* | drm/i915/tc/icl: Implement TC cold sequencesJosé Roberto de Souza2020-04-171-0/+1
* | drm/i915/display: Enable DP Display Audio WAUma Shankar2020-04-171-0/+16
* | Merge tag 'topic/phy-compliance-2020-04-08' of git://anongit.freedesktop.org/...Joonas Lahtinen2020-04-161-0/+18
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| * | drm/i915/dp: Register definition for DP compliance registerAnimesh Manna2020-04-081-0/+18
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| * drm/i915/perf: Invalidate OA TLB on when closing perf streamUmesh Nerlige Ramappa2020-03-201-0/+2
* | drm/i915: Add YUV444 packed format support for skl+Stanislav Lisovskiy2020-04-161-1/+1
* | drm/i915/gt: Yield the timeslice if caught waiting on a user semaphoreChris Wilson2020-04-071-0/+1
* | drm/i915: Implement port sync for SKL+Ville Syrjälä2020-04-031-0/+3
* | drm/i915/tgl: Add definitions for VRR registers and bitsAditya Swarup2020-03-271-0/+90
* | drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2Ville Syrjälä2020-03-271-6/+4
* | drm/i915/color: Extract icl_read_luts()Swati Sharma2020-03-181-0/+6
* | drm/i915/perf: Invalidate OA TLB on when closing perf streamUmesh Nerlige Ramappa2020-03-181-0/+2
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* drm/i915: Add Wa_1406306137:icl,ehlMatt Roper2020-03-131-0/+1
* drm/i915: Add Wa_1604278689:icl,ehlMatt Roper2020-03-131-0/+1
* drm/i915: Add missing HDMI audio pixel clocks for gen12Kai Vehmanen2020-03-111-0/+4
* drm/i915: Fix readout of PIPEGCMAXVille Syrjälä2020-03-091-1/+0
* drm/i915/tgl: Add Wa_1409085225, Wa_14010229206Matt Atwood2020-03-021-0/+3
* drm/i915/tgl: Implement Wa_1409804808José Roberto de Souza2020-03-021-2/+3
* drm/i915: Set up PIPE_MISC truncate bit on tgl+Ville Syrjälä2020-02-271-0/+1
* drm/i915: remove ICP_PP_CONTROLLucas De Marchi2020-02-271-10/+0
* drm/i915/tgl: Add Wa_22010178259:tglMatt Roper2020-02-211-0/+1
* drm/i915/tgl: Program MBUS_ABOX{1,2}_CTL during display initMatt Roper2020-02-201-0/+2
* drm/i915: Parametrize PFIT_PIPEVille Syrjälä2020-02-201-0/+1
* drm/i915/debugfs: Remove i915_energy_uJTvrtko Ursulin2020-02-081-2/+0
* drm/i915: Implement Wa_1607090982Mika Kuoppala2020-02-071-0/+2
* drm/i915: Disable tesselation clock gating on tgl A0Mika Kuoppala2020-02-071-0/+1
* drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy2020-02-051-3/+3
* drm/i915: Polish WM_LINETIME register stuffVille Syrjälä2020-01-311-7/+7
* drm/i915: add extra slice common debug registersLionel Landwerlin2020-01-301-0/+2
* drm/i915/gt: Hook up CS_MASTER_ERROR_INTERRUPTChris Wilson2020-01-291-1/+4
* drm/i915: add Wa_14010594013: icl,ehlMatt Atwood2020-01-161-0/+1
* drm/i915/tgl: Add Wa_1409825376 to tglRadhakrishna Sripada2020-01-151-0/+3
* drm/i915/gen11: Add additional pcode status valuesMatt Roper2020-01-141-0/+2
* drm/i915/display/icl+: Do not program clockgatingJosé Roberto de Souza2020-01-081-20/+0
* drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media ...Dhinakaran Pandiyan2020-01-071-0/+1
* drm/i915: Add Wa_1407352427:icl,ehlMatt Roper2019-12-311-0/+1
* drm/i915/tgl: Extend Wa_1408615072 to tglMatt Roper2019-12-271-0/+3
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