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path: root/drivers/net/wireless/realtek/rtw89/pci.c
Commit message (Expand)AuthorAgeFilesLines
* wifi: rtw89: pci: mask out unsupported TX channelsPing-Ke Shih2022-09-281-0/+16
* wifi: rtw89: pci: update LTR settingsPing-Ke Shih2022-09-191-4/+4
* wifi: rtw89: pci: concentrate control function of TX DMA channelChin-Yen Lee2022-09-191-8/+23
* wifi: rtw89: correct enable functions of HCI/PCI DMAChin-Yen Lee2022-09-191-65/+38
* wifi: rtw89: 8852c: L1 DMA reset has offloaded to FWZong-Zhe Yang2022-09-191-0/+6
* wifi: rtw89: pci: correct TX resource checking in low power modePing-Ke Shih2022-09-021-0/+2
* wifi: rtw89: pci: fix interrupt stuck after leaving low power modePing-Ke Shih2022-09-021-1/+2
* wifi: rtw89: pci: correct suspend/resume setting for variant chipsChin-Yen Lee2022-09-021-8/+23
* wifi: rtw89: pci: enable CLK_REQ, ASPM, L1 and L1ss for 8852cChin-Yen Lee2022-09-021-24/+67
* wifi: rtw89: pci: fix PCI PHY auto adaption by using software restoreChia-Yuan Li2022-09-021-0/+71
* rtw89: 8852c: disable dma during mac initPo-Hao Huang2022-09-021-0/+2
* wifi: rtw89: declare support for mac80211 chanctx ops by chipZong-Zhe Yang2022-09-021-12/+8
* wifi: rtw89: 8852a: adjust IMR for SER L1Zong-Zhe Yang2022-07-291-1/+1
* wifi: rtw89: pci: fix PCI doesn't reclaim TX BD properlyPing-Ke Shih2022-06-211-3/+6
* wifi: rtw89: add UNEXP debug mask to keep monitor messages unexpected to happ...Ping-Ke Shih2022-06-211-3/+4
* rtw89: pci: handle hardware watchdog timeout interrupt statusPing-Ke Shih2022-05-301-3/+6
* rtw89: pci: only mask out INT indicator register for disable interrupt v1Ping-Ke Shih2022-05-171-3/+0
* rtw89: pci: allow to process RPP prior to TX BDPing-Ke Shih2022-04-241-11/+10
* rtw89: ps: access TX/RX rings via another registers in low power modePing-Ke Shih2022-04-241-2/+101
* rtw89: ser: re-enable interrupt in threadfn if under_recoveryPing-Ke Shih2022-04-241-1/+1
* rtw89: pci: add a separate interrupt handler for low power modePing-Ke Shih2022-04-241-0/+23
* rtw89: pci: reclaim TX BD only if it really needPing-Ke Shih2022-04-241-4/+10
* rtw89: pci: add variant RPWM/CPWM to enter low power modePing-Ke Shih2022-04-241-6/+8
* rtw89: pci: add variant IMR/ISR and configure functionsPing-Ke Shih2022-04-241-29/+139
* rtw89: pci: correct return value handling of rtw89_write16_mdio_mask()Ping-Ke Shih2022-04-131-2/+2
* rtw89: pci: add L1 settingsPing-Ke Shih2022-04-061-0/+18
* rtw89: pci: add deglitch settingPing-Ke Shih2022-04-061-11/+16
* rtw89: pci: set address info registers depends on chipsPing-Ke Shih2022-04-061-5/+8
* rtw89: pci: add LTR setting for v1 chipPing-Ke Shih2022-04-061-2/+56
* rtw89: pci: refine pci pre_init functionChia-Yuan Li2022-04-061-31/+127
* rtw89: pci: add pci attributes to configure operating modePing-Ke Shih2022-04-061-15/+118
* rtw89: pci: add register definition to rtw89_pci_info to generalize pci codePing-Ke Shih2022-04-061-30/+108
* rtw89: support variant of fill_txdescPing-Ke Shih2022-04-061-4/+4
* rtw89: pci: support variant of fill_txaddr_infoPing-Ke Shih2022-04-061-7/+57
* rtw89: add chip_info::h2c_desc_size/fill_txdesc_fwcmd to support new chipsPing-Ke Shih2022-04-061-4/+6
* rtw89: ser: control hci interrupts on/off by stateZong-Zhe Yang2022-04-061-0/+29
* rtw89: pci: use a struct to describe all registers address related to DMA cha...Ping-Ke Shih2022-03-101-21/+14
* rtw89: pci: add V1 of PCI channel addressPing-Ke Shih2022-03-101-76/+106
* rtw89: pci: add struct rtw89_pci_infoPing-Ke Shih2022-03-101-0/+1
* rtw89: use pci_read/write_config instead of dbi read/writeChin-Yen Lee2022-01-281-75/+53
* rtw89: extract modules by chipsetZong-Zhe Yang2022-01-281-26/+7
* rtw89: remove unneeded semicolonYang Li2021-10-201-1/+1
* rtw89: add Realtek 802.11ax driverPing-Ke Shih2021-10-131-0/+3060
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