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path: root/drivers/net/wireless/realtek/rtw89/reg.h
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* wifi: rtw89: pci: update LTR settingsPing-Ke Shih2022-09-191-0/+1
* wifi: rtw89: mac: set NAV upper to 25msPing-Ke Shih2022-09-191-0/+1
* wifi: rtw89: initialize DMA of CMACPing-Ke Shih2022-09-191-0/+22
* wifi: rtw89: coex: Combine set grant WL/BT and correct the debug logChing-Te Ku2022-09-191-0/+12
* wifi: rtw89: set response rate selectionChia-Yuan Li2022-09-121-0/+21
* wifi: rtw89: 8852c: set TX to single path TX on path B in 6GHz bandYi-Tang Chiu2022-09-121-6/+6
* wifi: rtw89: 8852c: enlarge polling timeout of RX DCKPing-Ke Shih2022-09-121-0/+1
* wifi: rtw89: 8852c: enable the interference cancellation of MU-MIMO on 6GHzPing-Ke Shih2022-09-121-0/+2
* wifi: rtw89: add DIG register struct to share common algorithmEric Huang2022-09-121-0/+20
* wifi: rtw89: support TX diversity for 1T2R chipsetPing-Ke Shih2022-09-121-0/+6
* wifi: rtw89: pci: fix PCI PHY auto adaption by using software restoreChia-Yuan Li2022-09-021-0/+12
* wifi: rtw89: 8852c: set TBTT shift configurationChia-Yuan Li2022-09-021-0/+2
* rtw89: 8852c: adjust mactxen delay of mac/phy interfaceChia-Yuan Li2022-09-021-0/+1
* rtw89: 8852a: update HW setting on BBZong-Zhe Yang2022-09-021-1/+2
* wifi: rtw89: 8852a: correct WDE IMR settingsChia-Yuan Li2022-08-091-13/+8
* rtw89: 8852c: add settings to decrease the effect of DCHsuan Hung2022-05-111-0/+14
* rtw89: 8852c: correct register definitions used by 8852cPing-Ke Shih2022-05-041-2/+1
* rtw89: correct AID settings of beamformeePing-Ke Shih2022-05-041-0/+5
* rtw89: 8852c: rfk: add DPKPing-Ke Shih2022-05-031-0/+49
* rtw89: 8852c: rfk: add IQKPing-Ke Shih2022-05-031-4/+51
* rtw89: 8852c: rfk: add RX DCKPing-Ke Shih2022-05-031-1/+8
* rtw89: 8852c: rfk: add LCKPing-Ke Shih2022-05-031-0/+2
* rtw89: 8852c: rfk: add DACKPing-Ke Shih2022-05-031-7/+89
* rtw89: 8852c: add chip_ops related to BTCPing-Ke Shih2022-04-241-0/+7
* rtw89: 8852c: configure default BB TX/RX pathPing-Ke Shih2022-04-241-2/+74
* rtw89: 8852c: add set channel of BB partPing-Ke Shih2022-04-231-4/+89
* rtw89: 8852c: set channel of MAC partPing-Ke Shih2022-04-231-0/+4
* rtw89: 8852c: add set channel function of RF partPing-Ke Shih2022-04-231-0/+24
* rtw89: 8852c: add efuse gain offset parserPing-Ke Shih2022-04-231-0/+19
* rtw89: 8852c: add BB initial and reset functionsPing-Ke Shih2022-04-231-0/+26
* rtw89: 8852c: phy: configure TSSI bandedgePing-Ke Shih2022-04-231-0/+5
* rtw89: 8852c: add 8852c specific BT-coexistence initial functionChia-Yuan Li2022-04-121-0/+33
* rtw89: 8852c: disable firmware watchdog if CPU disabledChia-Yuan Li2022-04-121-0/+16
* rtw89: reset BA CAMPing-Ke Shih2022-04-121-0/+2
* rtw89: ser: configure top ERR IMR for firmware to recoverPing-Ke Shih2022-04-121-0/+29
* rtw89: ser: configure C-MAC interrupt maskChia-Yuan Li2022-04-121-1/+299
* rtw89: ser: configure D-MAC interrupt maskChia-Yuan Li2022-04-121-0/+863
* rtw89: update ptcl_initPing-Ke Shih2022-04-061-0/+24
* rtw89: update TMAC parametersPing-Ke Shih2022-04-061-0/+29
* rtw89: initialize NAV controlPing-Ke Shih2022-04-061-0/+10
* rtw89: update scheduler settingPing-Ke Shih2022-04-061-0/+12
* rtw89: 8852c: update security engine settingPing-Ke Shih2022-04-061-0/+3
* rtw89: add chip_ops::{enable,disable}_bb_rf to support v1 chipPing-Ke Shih2022-04-061-0/+6
* rtw89: update STA scheduler parameters for v1 chipPing-Ke Shih2022-04-061-0/+9
* rtw89: extend dmac_pre_init to support 8852CPing-Ke Shih2022-04-061-0/+1
* rtw89: pci: add LTR setting for v1 chipPing-Ke Shih2022-04-061-0/+22
* rtw89: pci: refine pci pre_init functionChia-Yuan Li2022-04-061-0/+31
* rtw89: pci: add register definition to rtw89_pci_info to generalize pci codePing-Ke Shih2022-04-061-0/+40
* rtw89: implement stop and resume channels transmission v1Ping-Ke Shih2022-03-171-0/+7
* rtw89: 8852c: add mac_ctrl_path and mac_cfg_gnt APIsChia-Yuan Li2022-03-171-0/+25
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