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| author | Duggapu, Chinni B <chinni.b.duggapu@intel.com> | 2022-11-07 14:47:31 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-11-11 06:20:12 +0000 |
| commit | b9e702c3c9bfe7bfb6bbcff44603add64e1787bf (patch) | |
| tree | 4e3d6853d54c6facc962175c9e02853e9595caa6 | |
| parent | 6d55ad9a592ba3bbc9392a67fd8c936279b73a45 (diff) | |
| download | edk2-b9e702c3c9bfe7bfb6bbcff44603add64e1787bf.tar.gz | |
UefiCpuPkg/ResetVector:Add Option to reserve 4K region at 4GB
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4140
Some implementations may need to keep the initial Reset code to be
separated out from rest of the code.This request is to add padding at
lower 4K region below 4 GB which will result having only few jmp
instructions and data at that region.
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
| -rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm index 7538192876..fe5bbea803 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm @@ -21,7 +21,15 @@ ALIGN 16 ; located just below 0x100000000 (4GB) in the firmware device.
;
%ifdef ALIGN_TOP_TO_4K_FOR_PAGING
- TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0
+ TIMES (0x1000 - ($ - EndOfPageTables)) DB 0
+;
+; Pad the VTF0 Reset code for Bsp & Ap to 4k aligned block.
+; Some implementations may need to keep the initial Reset code
+; to be separated out from rest of the code.
+; This padding will make sure lower 4K region below 4 GB may
+; only contains few jmp instructions and data.
+;
+ TIMES (0x1000 - 0x20) DB 0
%endif
applicationProcessorEntryPoint:
|