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| author | Abner Chang <abner.chang@hpe.com> | 2020-04-23 21:52:31 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-04-29 02:52:08 +0000 |
| commit | f60d5ca97f25121de20d057c0e8618700905e4e0 (patch) | |
| tree | 8cb531e82e6a480569ae51bcbe5e1504142f00bd /BaseTools/Source/Python/Common | |
| parent | 178938b2b9b4c8c66c29c3f39baaa15a469d5721 (diff) | |
| download | edk2-f60d5ca97f25121de20d057c0e8618700905e4e0.tar.gz | |
BaseTools: BaseTools changes for RISC-V platform.
Python code changes for building EDK2 RISC-V platform.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Co-authored-by: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Diffstat (limited to 'BaseTools/Source/Python/Common')
| -rw-r--r-- | BaseTools/Source/Python/Common/DataType.py | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/BaseTools/Source/Python/Common/DataType.py b/BaseTools/Source/Python/Common/DataType.py index 8d80b41089..fb88f20cc4 100644 --- a/BaseTools/Source/Python/Common/DataType.py +++ b/BaseTools/Source/Python/Common/DataType.py @@ -3,6 +3,7 @@ #
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+# Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
@@ -52,7 +53,9 @@ TAB_ARCH_ARM = 'ARM' TAB_ARCH_EBC = 'EBC'
TAB_ARCH_AARCH64 = 'AARCH64'
-ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_COMMON}
+TAB_ARCH_RISCV64 = 'RISCV64'
+
+ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_RISCV64, TAB_ARCH_COMMON}
SUP_MODULE_BASE = 'BASE'
SUP_MODULE_SEC = 'SEC'
|