diff options
| author | Jeff Fan <jeff.fan@intel.com> | 2015-08-25 06:37:27 +0000 |
|---|---|---|
| committer | vanjeff <vanjeff@Edk2> | 2015-08-25 06:37:27 +0000 |
| commit | 669f2b584dd5baf58bdef8b0ca54f182c5f5d430 (patch) | |
| tree | e320afea08e3b299718826a2e81b0ede56fdf3e1 /CryptoPkg/Library/IntrinsicLib/Ia32/MathLShiftS64.c | |
| parent | dcfa39fd63a76c504a69ee87a68d7faa3e5638f7 (diff) | |
| download | edk2-UDK2010.SR1.tar.gz | |
Copy head(r18255) from main trunk excluding UNI files.UDK2010.SR1
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2010.SR1@18304 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'CryptoPkg/Library/IntrinsicLib/Ia32/MathLShiftS64.c')
| -rw-r--r-- | CryptoPkg/Library/IntrinsicLib/Ia32/MathLShiftS64.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/CryptoPkg/Library/IntrinsicLib/Ia32/MathLShiftS64.c b/CryptoPkg/Library/IntrinsicLib/Ia32/MathLShiftS64.c new file mode 100644 index 0000000000..0c0835d400 --- /dev/null +++ b/CryptoPkg/Library/IntrinsicLib/Ia32/MathLShiftS64.c @@ -0,0 +1,54 @@ +/** @file
+ 64-bit Math Worker Function.
+ The 32-bit versions of C compiler generate calls to library routines
+ to handle 64-bit math. These functions use non-standard calling conventions.
+
+Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+/*
+ * Shifts a 64-bit signed value left by a particular number of bits.
+ */
+__declspec(naked) void __cdecl _allshl (void)
+{
+ _asm {
+ ;
+ ; Handle shifting of 64 or more bits (return 0)
+ ;
+ cmp cl, 64
+ jae short ReturnZero
+
+ ;
+ ; Handle shifting of between 0 and 31 bits
+ ;
+ cmp cl, 32
+ jae short More32
+ shld edx, eax, cl
+ shl eax, cl
+ ret
+
+ ;
+ ; Handle shifting of between 32 and 63 bits
+ ;
+More32:
+ mov edx, eax
+ xor eax, eax
+ and cl, 31
+ shl edx, cl
+ ret
+
+ReturnZero:
+ xor eax,eax
+ xor edx,edx
+ ret
+ }
+}
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