IntelFsp2Pkg: Fixing TemporaryRamSize Configurability option.HEADmaster

Issue : Configuring TemporaryRamSize using FSP-T arch UPD
(added as part of Spec 2.5) is not working as expected.

Root cause : Code is reading the ImageAttribute from the wrong
address which confirms the TemporaryRamSize Configurability,
hence the TemporaryRamSize UPD is ignored. This is because
the code expects the FspInfoheader Offset to be in ESI/RSI
(from which ImageAttribute read) is not guaranteed as per the
current implementation.

Fix : Modified code to make sure that ESI/RSI contains the
FspInfoheader offset by time the code reads the ImageAttribute.

Tests : Verified the fix on Both 32 Bit and 64 Bit FSP Binaries
by configuring the TemporaryRamSize using the FSPT Arch UPD.

Signed-off-by: Aravind P R <aravind.p.r@intel.com>

1 files changed, 11 insertions, 0 deletions

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
index 088bd7ee7f..90de12f9af 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
@@ -185,6 +185,16 @@ endstruc
 global ASM_PFX(LoadUpdPointerToECX)

 ASM_PFX(LoadUpdPointerToECX):

   ;

+  ; Inputs:

+  ;   esp -> stack with FsptUpdDataPtr parameter

+  ; Outputs:

+  ;   eax -> Address of FspInfoHeader

+  ;   ecx -> Address of FSP-T UPD structure

+  ; Register Usage:

+  ;   ebp is used for return address.

+  ;   All others reserved.

+  ;

+

   ; esp + 4 is input UPD parameter

   ; If esp + 4 is NULL the default UPD should be used

   ; ecx will be the UPD region that should be used

@@ -600,6 +610,7 @@ ASM_PFX(TempRamInitApi):
   SAVE_EDX

 

   CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param

+  mov       esi, eax                     ; eax contains FspInfoHeader address after previous call

   SAVE_ECX                               ; save UPD param to slot 3 in xmm6

 

   mov       edx, ASM_PFX(PcdGet32 (PcdTemporaryRamSize))