IntelFsp2Pkg: Fsp T new ARCH UPD Support

Changes to support spec changes

1. Remove usage of Pcd.
2. Change code to validate the Temporary Ram size input.
3. Consume the input saved in YMM Register

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chiu Chasel <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ni Ray <ray.ni@intel.com>

Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Reviewed-by: Chiu Chasel <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

1 files changed, 10 insertions, 2 deletions

diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index 40e063e944..e07aa401e6 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -139,7 +139,7 @@ typedef struct {
 ///

 typedef struct {

   ///

-  /// Revision of the structure is 2 for this version of the specification.

+  /// Revision of the structure is 3 for this version of the specification.

   ///

   UINT8                   Revision;

   UINT8                   Reserved[3];

@@ -152,7 +152,15 @@ typedef struct {
   /// occurring during FSP execution.

   ///

   EFI_PHYSICAL_ADDRESS    FspDebugHandler;

-  UINT8                   Reserved1[16];

+  ///

+  /// FspTemporaryRamSize is Optional & valid only when

+  /// FSP image attribute (BIT4) is set. If Programmed as Zero, Platform

+  /// recommended value will be used, otherwise input value will be used

+  /// to configure TemporaryRamSize. Refer FSP Integration guide for valid

+  /// TemporaryRamSize range for each platform.

+  ///

+  UINT32                  FspTemporaryRamSize;

+  UINT8                   Reserved1[12];

 } FSPT_ARCH2_UPD;

 

 ///