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authorHongbin1 Zhang <hongbin1.zhang@intel.com>2024-12-17 16:12:20 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2024-12-20 07:40:28 +0000
commit124ed0f6d83ad5548a4d8f3e436aad0fa4230f76 (patch)
treefe506b0e6d8d3f7e3b548e90ce9672d270c95274 /IntelFsp2Pkg
parent1d1e0474d76b70617065c103fe5d781e3bf31dfc (diff)
downloadedk2-124ed0f6d83ad5548a4d8f3e436aad0fa4230f76.tar.gz
IntelFsp2Pkg : Add FSP-I arch config PPI
Add FSP-I arch config PPI header file and GUID for supporting FSP-I to get Bootloader MM FV address and length, Bootloader MM FV context Data address and length under dispatch mode Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com> Cc: Ted Kuo <ted.kuo@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Diffstat (limited to 'IntelFsp2Pkg')
-rw-r--r--IntelFsp2Pkg/Include/Ppi/FspiArchConfigPpi.h54
-rw-r--r--IntelFsp2Pkg/IntelFsp2Pkg.dec6
2 files changed, 59 insertions, 1 deletions
diff --git a/IntelFsp2Pkg/Include/Ppi/FspiArchConfigPpi.h b/IntelFsp2Pkg/Include/Ppi/FspiArchConfigPpi.h
new file mode 100644
index 0000000000..7f2d4a817d
--- /dev/null
+++ b/IntelFsp2Pkg/Include/Ppi/FspiArchConfigPpi.h
@@ -0,0 +1,54 @@
+/** @file
+ Header file for FSP-I Arch Config PPI for Dispatch mode
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _FSPI_ARCH_CONFIG_PPI_H_
+#define _FSPI_ARCH_CONFIG_PPI_H_
+
+#define FSPI_ARCH_CONFIG_PPI_REVISION 0x1
+
+///
+/// Global ID for the FSPI_ARCH_CONFIG_PPI.
+///
+#define FSPI_ARCH_CONFIG_GUID \
+ { \
+ 0x15735ef9, 0x84ac, 0x4e34, { 0x98, 0x86, 0x56, 0xee, 0xcf, 0x73, 0xec, 0x0f } \
+ }
+
+///
+/// This PPI provides FSP-I Arch Config PPI.
+///
+typedef struct {
+ ///
+ /// Revision of the structure is 1 for this version of the specification.
+ ///
+ UINT8 Revision;
+ UINT8 Reserved[3];
+ ///
+ /// Pointer to the bootloader SMM firmware volume (FV).
+ ///
+ VOID *BootloaderSmmFvBaseAddress;
+ ///
+ /// The length in bytes of the bootloader SMM firmware volume (FV).
+ ///
+ UINTN BootloaderSmmFvLength;
+ ///
+ /// Pointer to the bootloader SMM FV context data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP MM Foundation.
+ ///
+ VOID *BootloaderSmmFvContextData;
+ ///
+ /// The length in bytes of the bootloader SMM FV context data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP MM Foundation.
+ ///
+ UINT16 BootloaderSmmFvContextDataLength;
+} FSPI_ARCH_CONFIG_PPI;
+
+extern EFI_GUID gFspiArchConfigPpiGuid;
+
+#endif // _FSPI_ARCH_CONFIG_PPI_H_
diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dec b/IntelFsp2Pkg/IntelFsp2Pkg.dec
index 8fe6b64f99..889fb783d4 100644
--- a/IntelFsp2Pkg/IntelFsp2Pkg.dec
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.dec
@@ -1,7 +1,7 @@
## @file
# Provides driver and definitions to build fsp in EDKII bios.
#
-# Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2024, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -67,6 +67,10 @@
#
gEdkiiPeiVariablePpiGuid = { 0xe7b2cd04, 0x4b14, 0x44c2, {0xb7, 0x48, 0xce, 0xaf, 0x2b, 0x66, 0x4a, 0xb0}}
+ #
+ # PPI for Architectural configuration data for FSP-I
+ #
+ gFspiArchConfigPpiGuid = { 0x15735ef9, 0x84ac, 0x4e34, {0x98, 0x86, 0x56, 0xee, 0xcf, 0x73, 0xec, 0x0f}}
[Guids]
#