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| author | Jiaxin Wu <jiaxin.wu@intel.com> | 2021-04-01 18:50:53 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-04-06 00:43:49 +0000 |
| commit | 4ac02962017c77bf38b462f970c884c2dc7931cf (patch) | |
| tree | feef65278a2bffae6c6c6aacc63c7d1599cc911b /MdePkg/Library/BaseLib/Ia32 | |
| parent | f95cdd316c3d56e8f76b5044be54b9645e1dc60f (diff) | |
| download | edk2-4ac02962017c77bf38b462f970c884c2dc7931cf.tar.gz | |
MdePkg/BaseLib: Add support for the XSETBV instruction
*v2: refine the coding format.
https://bugzilla.tianocore.org/show_bug.cgi?id=3284
This patch is to support XSETBV instruction so as to support
Extended Control Register(XCR) write.
Extended Control Register(XCR) read has already been supported
by below commit to support XGETBV instruction:
9b3ca509abd4e45439bbdfe2c2fa8780c950320a
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Ni Ray <ray.ni@intel.com>
Cc: Yao Jiewen <jiewen.yao@intel.com>
Signed-off-by: Jiaxin Wu <Jiaxin.wu@intel.com>
Signed-off-by: Zhang Hongbin1 <hongbin1.zhang@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Diffstat (limited to 'MdePkg/Library/BaseLib/Ia32')
| -rw-r--r-- | MdePkg/Library/BaseLib/Ia32/XSetBv.nasm | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm b/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm new file mode 100644 index 0000000000..cf638d9a4d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm @@ -0,0 +1,34 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+; XSetBv.nasm
+;
+; Abstract:
+;
+; AsmXSetBv function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmXSetBv (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmXSetBv)
+ASM_PFX(AsmXSetBv):
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ mov ecx, [esp + 4]
+ xsetbv
+ ret
|