diff options
| author | Chao Li <lichao@loongson.cn> | 2023-10-12 11:35:11 +0800 |
|---|---|---|
| committer | Liming Gao <gaoliming@byosoft.com.cn> | 2024-02-06 23:51:47 +0800 |
| commit | bc0b418cbac5f8e533eede5499ac8e9e703db0ba (patch) | |
| tree | 2220231febbed3d0d978b254a3da63b0c70b0a21 /MdePkg/Library | |
| parent | 0565a8e885e48ca4bea95f47dad04d3d9968b447 (diff) | |
| download | edk2-bc0b418cbac5f8e533eede5499ac8e9e703db0ba.tar.gz | |
MdePkg: Add IOCSR operation for LoongArch
Add IoCsrRead8, IoCsrRead16, IoCsrRead32, IoCsrRead64, IoCsrWrite8,
IoCsrWrite16, IoCsrWrite32, IoCsrWrite64 to operate the IOCSR registers
of LoongArch architecture.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Diffstat (limited to 'MdePkg/Library')
| -rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 1 | ||||
| -rw-r--r-- | MdePkg/Library/BaseLib/LoongArch64/IoCsr.S | 120 |
2 files changed, 121 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index 7c46306883..4dbe94be71 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -413,6 +413,7 @@ LoongArch64/Csr.c
LoongArch64/InternalSwitchStack.c
LoongArch64/AsmCsr.S | GCC
+ LoongArch64/IoCsr.S | GCC
LoongArch64/GetInterruptState.S | GCC
LoongArch64/EnableInterrupts.S | GCC
LoongArch64/DisableInterrupts.S | GCC
diff --git a/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S b/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S new file mode 100644 index 0000000000..a659908bc4 --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S @@ -0,0 +1,120 @@ +#------------------------------------------------------------------------------
+#
+# LoongArch ASM IO CSR operation functions
+#
+# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX (IoCsrRead8)
+ASM_GLOBAL ASM_PFX (IoCsrRead16)
+ASM_GLOBAL ASM_PFX (IoCsrRead32)
+ASM_GLOBAL ASM_PFX (IoCsrRead64)
+
+ASM_GLOBAL ASM_PFX (IoCsrWrite8)
+ASM_GLOBAL ASM_PFX (IoCsrWrite16)
+ASM_GLOBAL ASM_PFX (IoCsrWrite32)
+ASM_GLOBAL ASM_PFX (IoCsrWrite64)
+
+#/**
+# IO CSR read byte operation.
+#
+# @param[in] Select IO CSR read instruction select values.
+#
+# @return The return value of iocsrrd.b instruction.
+#
+#**/
+ASM_PFX (IoCsrRead8):
+ iocsrrd.b $a0, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR read half word operation.
+#
+# @param[in] Select IO CSR read instruction select values.
+#
+# @return The return value of iocsrrd.h instruction.
+#
+#**/
+ASM_PFX (IoCsrRead16):
+ iocsrrd.h $a0, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR read word operation.
+#
+# @param[in] Select IO CSR read instruction select values.
+#
+# @return The return value of iocsrrd.w instruction.
+#
+#**/
+ASM_PFX (IoCsrRead32):
+ iocsrrd.w $a0, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR read double word operation. Only for LoongArch64.
+#
+# @param[in] Select IO CSR read instruction select values.
+#
+# @return The return value of iocsrrd.d instruction.
+#
+#**/
+ASM_PFX (IoCsrRead64):
+ iocsrrd.d $a0, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR write byte operation.
+#
+# @param[in] Select IO CSR write instruction select values.
+# @param[in] Value The iocsrwr.b will write the value.
+#
+# @return VOID.
+#
+#**/
+ASM_PFX (IoCsrWrite8):
+ iocsrwr.b $a1, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR write half word operation.
+#
+# @param[in] Select IO CSR write instruction select values.
+# @param[in] Value The iocsrwr.h will write the value.
+#
+# @return VOID.
+#
+#**/
+ASM_PFX (IoCsrWrite16):
+ iocsrwr.h $a1, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR write word operation.
+#
+# @param[in] Select IO CSR write instruction select values.
+# @param[in] Value The iocsrwr.w will write the value.
+#
+# @return VOID.
+#
+#**/
+ASM_PFX (IoCsrWrite32):
+ iocsrwr.w $a1, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR write double word operation. Only for LoongArch64.
+#
+# @param[in] Select IO CSR write instruction select values.
+# @param[in] Value The iocsrwr.d will write the value.
+#
+# @return VOID.
+#
+#**/
+ASM_PFX (IoCsrWrite64):
+ iocsrwr.d $a1, $a0
+ jirl $zero, $ra, 0
+ .end
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