StandaloneMmPkg: Introduce PI_MM_CPU_DRIVER_EP protocol.

This patch introduces a PI_MM_CPU_DRIVER_EP protocol to handle
Mmcommunication request based on the CPU driver.
Previously the CPU driver entry point was retrieved using the
gEfiArmTfCpuDriverEntryPoint HOB.
However, this practice is incorrect as StandaloneMM must be a HOB
consumer and not a HOB producer.

Therefore, remove the CPU entry HOB gEfiArmTfCpuDriverEntryPoint,
and replace it with the CPU driver entry protocol
EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL.
The EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL installed in
StandaloneMmCpuInitialize() will be used by the code in
Arm/StandaloneMmCoreEntryPoint.

This protocol is used like below:
 +=====+
 |StandaloneMmCore|
 +=====+
    |
    CEntryPoint()
    ===================
      |
      ProcessModuleEntryPointList()
        |
        +--> StandaloneMmMain()
        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
               |   // Load StandaloneMmCpu driver which implements
               |   // CpuDriverEntryPoint used by DelegatedEventLoop().
               |   // and install the gEdkiiPiMmCpuDriverEpProtocolGuid.
       --------------
        |
        ... // Get CpuDriverEntryPoint implemented by
        // StandaloneMmCpu driver with gEdkiiPiMmCpuDriverEpProtocolGuid
        |
        DelegatedEventLoop() // Handle request by delegating it to
                             // CpuDriverEntryPoint.

Signed-off-by: Levi Yun <yeoreum.yun@arm.com>

1 files changed, 3 insertions, 1 deletions

diff --git a/StandaloneMmPkg/StandaloneMmPkg.dec b/StandaloneMmPkg/StandaloneMmPkg.dec
index dc2313ea12..067094d057 100644
--- a/StandaloneMmPkg/StandaloneMmPkg.dec
+++ b/StandaloneMmPkg/StandaloneMmPkg.dec
@@ -47,13 +47,15 @@
   gEfiMmPeiMmramMemoryReserveGuid          = { 0x0703f912, 0xbf8d, 0x4e2a, { 0xbe, 0x07, 0xab, 0x27, 0x25, 0x25, 0xc5, 0x92 }}

 

   gEfiStandaloneMmNonSecureBufferGuid      = { 0xf00497e3, 0xbfa2, 0x41a1, { 0x9d, 0x29, 0x54, 0xc2, 0xe9, 0x37, 0x21, 0xc5 }}

-  gEfiMmCpuDriverEpDescriptorGuid          = { 0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 }}

 

   gEventMmDispatchGuid                     = { 0x7e6efffa, 0x69b4, 0x4c1b, { 0xa4, 0xc7, 0xaf, 0xf9, 0xc9, 0x24, 0x4f, 0xee }}

 

 [Ppis]

   gMmCoreFvLocationPpiGuid                 = { 0x47a00618, 0x237a, 0x4386, { 0x8f, 0xc5, 0x2a, 0x86, 0xd8, 0xac, 0x41, 0x05 }}

 

+[Protocols]

+  gEdkiiPiMmCpuDriverEpProtocolGuid          = { 0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 }}

+

 [PcdsFixedAtBuild, PcdsPatchableInModule]

   ## Maximum permitted encapsulation levels of sections in a firmware volume,

   #  in the MM phase. Minimum value is 1. Sections nested more deeply are rejected.