UefiCpuPkg/PiSmmCpuDxeSmm: Refactor code to create default Page Table

For MM:
Since all accessible NON-MMRAM memory and attribute shall be in
ResourceDescriptor HOBs for MM, the page table for MM can be finalized
and created in the default Page.

For SMM:
There are still 2 steps for the finalized default Page:
1. Create default Page
2. update the page table in the first SMI when SMM ready to lock
   happen

This patch to refactor the GenSmmPageTable() function to create the
default Page Table for Both SMM and MM:
1. Create NonMmram MemoryRegion
2. Gen NonMmram MemoryRegion PageTable
3. Gen MMRAM Range PageTable
4. Consider PcdCpuSmmStackGuard & PcdNullPointerDetectionPropertyMask
   cases.

Meanwhile, mXdSupported needs to be initialized before GenSmmPageTable since
it's required by GenSmmPageTable function. So, move the mXdSupported init
from CheckFeatureSupported to the common EntryPoint function.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>

1 files changed, 0 insertions, 27 deletions

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
index f3ef4df0b0..ba83c37cbf 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
@@ -884,33 +884,6 @@ CheckFeatureSupported (
     }

   }

 

-  if (mXdSupported) {

-    AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);

-    if (RegEax <= CPUID_EXTENDED_FUNCTION) {

-      //

-      // Extended CPUID functions are not supported on this processor.

-      //

-      mXdSupported = FALSE;

-      PatchInstructionX86 (gPatchXdSupported, mXdSupported, 1);

-    }

-

-    AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &RegEdx);

-    if ((RegEdx & CPUID1_EDX_XD_SUPPORT) == 0) {

-      //

-      // Execute Disable Bit feature is not supported on this processor.

-      //

-      mXdSupported = FALSE;

-      PatchInstructionX86 (gPatchXdSupported, mXdSupported, 1);

-    }

-

-    if (StandardSignatureIsAuthenticAMD ()) {

-      //

-      // AMD processors do not support MSR_IA32_MISC_ENABLE

-      //

-      PatchInstructionX86 (gPatchMsrIa32MiscEnableSupported, FALSE, 1);

-    }

-  }

-

   if (mBtsSupported) {

     AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);

     if ((RegEdx & CPUID1_EDX_BTS_AVAILABLE) != 0) {