diff options
author | Jiaxin Wu <jiaxin.wu@intel.com> | 2024-06-25 00:18:14 +0800 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-08-28 15:25:27 +0000 |
commit | 23c5ee6e23b96cdceb5813bfc7d27e2c54a332a5 (patch) | |
tree | d8ffeb2047a47176539400e6150a1f2bc586d165 /UefiCpuPkg/PiSmmCpuDxeSmm | |
parent | 5547d1487c630fd66c99fd529dddf8d09c075681 (diff) | |
download | edk2-23c5ee6e23b96cdceb5813bfc7d27e2c54a332a5.tar.gz |
UefiCpuPkg/PiSmmCpuDxeSmm: Move GetAcpiS3EnableFlag into DxeSmm code
MM can not use the dynamic PCD, so, Move GetAcpiS3EnableFlag into
DxeSmm code. This can make PiSmmCpuEntryCommon to be a function
for SMM and MM.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm')
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 12 | ||||
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuCommon.h | 1 | ||||
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 12 |
3 files changed, 13 insertions, 12 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index cb77c3b5ea..f3b7d44ab8 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -248,15 +248,3 @@ InitSmmS3ResumeState ( InitSmmS3Cr3 ((UINTN *)&SmmS3ResumeState->SmmS3Cr3);
}
}
-
-/**
- Get ACPI S3 enable flag.
-
-**/
-VOID
-GetAcpiS3EnableFlag (
- VOID
- )
-{
- mAcpiS3Enable = PcdGetBool (PcdAcpiS3Enable);
-}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuCommon.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuCommon.h index da59b07460..821c0b9488 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuCommon.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuCommon.h @@ -269,6 +269,7 @@ extern UINT8 mSmmSaveStateRegisterLma; extern BOOLEAN mBtsSupported;
extern UINTN mMsrDsAreaSize;
+extern BOOLEAN mAcpiS3Enable;
#define PAGE_TABLE_POOL_ALIGNMENT BASE_128KB
#define PAGE_TABLE_POOL_UNIT_SIZE BASE_128KB
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index 29cba42e7a..d1280db490 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -12,6 +12,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include "PiSmmCpuCommon.h"
/**
+ Get ACPI S3 enable flag.
+
+**/
+VOID
+GetAcpiS3EnableFlag (
+ VOID
+ )
+{
+ mAcpiS3Enable = PcdGetBool (PcdAcpiS3Enable);
+}
+
+/**
Extract NumberOfCpus, MaxNumberOfCpus and EFI_PROCESSOR_INFORMATION for all CPU from gEfiMpServiceProtocolGuid.
@param[out] NumberOfCpus Pointer to NumberOfCpus.
|