diff options
| author | Heinrich Schuchardt <heinrich.schuchardt@canonical.com> | 2024-09-16 23:12:18 +0200 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-10-04 04:53:21 +0000 |
| commit | f8c738577f813bbe6cb017cfbb29b70582ab32b4 (patch) | |
| tree | 912940249114ed2b0d925ad527a577cbd3cf172e /UefiCpuPkg/UefiCpuPkg.dsc | |
| parent | 28dd588ca80c61c4bea9294785d5d884ad3f2c41 (diff) | |
| download | edk2-f8c738577f813bbe6cb017cfbb29b70582ab32b4.tar.gz | |
UefiCpuPkg: RiscV64: initialize FPU
The OpenSSL library uses floating point registers.
The is no guarantee that a prior firmware stage has enabled the FPU.
Provide a library BaseRiscVFpuLib to
* Enable the FPU and set it to state 'dirty'.
* Clear the fcsr CSR.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Diffstat (limited to 'UefiCpuPkg/UefiCpuPkg.dsc')
| -rw-r--r-- | UefiCpuPkg/UefiCpuPkg.dsc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index f173bba87e..d7f8e422d4 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -224,6 +224,7 @@ [Components.RISCV64]
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf
+ UefiCpuPkg/Library/BaseRiscVFpuLib/BaseRiscVFpuLib.inf
UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf
UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf
UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
|