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authorJiaxin Wu <jiaxin.wu@intel.com>2024-05-24 15:17:59 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2024-08-28 15:25:27 +0000
commit39d9e15a9ed47ca3a72c06d4279c390869fd2793 (patch)
tree195138de8e910357a3872352ee4f794fc0b447a5 /UefiCpuPkg
parent2c5d329e20f0a50af58c572af332825f8cb40ad5 (diff)
downloadedk2-39d9e15a9ed47ca3a72c06d4279c390869fd2793.tar.gz
UefiCpuPkg: Add MM CPU Sync Config definitions
MM CPU Sync Config controls how BSP synchronizes with APs in x86 SMM environment. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Dun Tan <dun.tan@intel.com> Co-authored-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com> Cc: Wei6 Xu <wei6.xu@intel.com> Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/Include/Guid/MmCpuSyncConfig.h53
-rw-r--r--UefiCpuPkg/UefiCpuPkg.dec3
2 files changed, 56 insertions, 0 deletions
diff --git a/UefiCpuPkg/Include/Guid/MmCpuSyncConfig.h b/UefiCpuPkg/Include/Guid/MmCpuSyncConfig.h
new file mode 100644
index 0000000000..16d96a8290
--- /dev/null
+++ b/UefiCpuPkg/Include/Guid/MmCpuSyncConfig.h
@@ -0,0 +1,53 @@
+/** @file
+ This file defines MM_CPU_SYNC_CONFIG which controls how BSP synchronizes with APs
+ in x86 SMM environment.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef MM_CPU_SYNC_CONFIG_H_
+#define MM_CPU_SYNC_CONFIG_H_
+
+///
+/// The GUID of the MmCpuSyncConfig GUIDed HOB.
+///
+#define MM_CPU_SYNC_CONFIG_HOB_GUID \
+ { \
+ 0x8b90bd26, 0xe4f9, 0x45c2, {0x92, 0xa2, 0x9e, 0xac, 0xe6, 0x0e, 0x9d, 0xcc} \
+ }
+
+typedef enum {
+ MmCpuSyncModeTradition,
+ MmCpuSyncModeRelaxedAp,
+ MmCpuSyncModeMax
+} MM_CPU_SYNC_MODE;
+
+///
+/// The structure defines the data layout of the MmCpuSyncConfig GUIDed HOB.
+///
+typedef struct {
+ ///
+ /// 0: Traditional CPU synchronization method is used when processing an SMI.
+ /// 1: Relaxed CPU synchronization method is used when processing an SMI.
+ ///
+ MM_CPU_SYNC_MODE RelaxedApMode;
+
+ ///
+ /// The 1st BSP/AP synchronization timeout value in SMM.
+ /// The value shall match with the PcdCpuSmmApSyncTimeout.
+ ///
+ UINT64 Timeout;
+
+ ///
+ /// The 2nd BSP/AP synchronization timeout value in SMM.
+ /// The value shall match with the PcdCpuSmmApSyncTimeout2.
+ ///
+ UINT64 Timeout2;
+} MM_CPU_SYNC_CONFIG;
+
+extern EFI_GUID gMmCpuSyncConfigHobGuid;
+
+#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 140500d521..5ae4af3e36 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -114,6 +114,9 @@
## Include/Guid/MmProfileData.h
gMmProfileDataHobGuid = { 0x26ef081d, 0x19b0, 0x4c42, { 0xa2, 0x57, 0xa7, 0xf5, 0x9f, 0x8b, 0xd0, 0x38 }}
+ ## Include/Guid/MmCpuSyncConfig.h
+ gMmCpuSyncConfigHobGuid = { 0x8b90bd26, 0xe4f9, 0x45c2, { 0x92, 0xa2, 0x9e, 0xac, 0xe6, 0x0e, 0x9d, 0xcc }}
+
[Protocols]
## Include/Protocol/SmmCpuService.h
gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}