blob: ed223b852d3431e4a62698bb7da2ffe00cbe01bf (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
|
/** @file
RISC-V Boot Protocol mandatory for RISC-V UEFI platforms.
@par Revision Reference:
The protocol specification can be found at
https://github.com/riscv-non-isa/riscv-uefi
Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef RISCV_BOOT_PROTOCOL_H_
#define RISCV_BOOT_PROTOCOL_H_
typedef struct _RISCV_EFI_BOOT_PROTOCOL RISCV_EFI_BOOT_PROTOCOL;
#define RISCV_EFI_BOOT_PROTOCOL_REVISION 0x00010000
#define RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION \
RISCV_EFI_BOOT_PROTOCOL_REVISION
typedef
EFI_STATUS
(EFIAPI *EFI_GET_BOOT_HARTID)(
IN RISCV_EFI_BOOT_PROTOCOL *This,
OUT UINTN *BootHartId
);
typedef struct _RISCV_EFI_BOOT_PROTOCOL {
UINT64 Revision;
EFI_GET_BOOT_HARTID GetBootHartId;
} RISCV_EFI_BOOT_PROTOCOL;
#endif
|
