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| author | Michael Brown <mcb30@ipxe.org> | 2015-11-22 19:17:24 +0000 |
|---|---|---|
| committer | Michael Brown <mcb30@ipxe.org> | 2015-11-22 19:17:24 +0000 |
| commit | f3c2da7d4a0e7cf3ab3e9cc3c49517aedb9cf4cc (patch) | |
| tree | 93520fed8d1cad81d7e4793bf1b9e6d7ce458612 | |
| parent | fff9281b8454dadf5e31c297af904959fe35800b (diff) | |
| download | ipxe-f3c2da7d4a0e7cf3ab3e9cc3c49517aedb9cf4cc.tar.gz | |
[intel] Correct definition of receive overrun bit
Reported-by: Robin Smidsrød <robin@smidsrod.no>
Tested-by: Robin Smidsrød <robin@smidsrod.no>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
| -rw-r--r-- | src/drivers/net/intel.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/net/intel.h b/src/drivers/net/intel.h index 436229ef6..16a72a11b 100644 --- a/src/drivers/net/intel.h +++ b/src/drivers/net/intel.h @@ -99,8 +99,8 @@ struct intel_descriptor { #define INTEL_IRQ_TXQE 0x00000002UL /**< Transmit queue empty */ #define INTEL_IRQ_LSC 0x00000004UL /**< Link status change */ #define INTEL_IRQ_RXDMT0 0x00000010UL /**< Receive queue low */ +#define INTEL_IRQ_RXO 0x00000040UL /**< Receive overrun */ #define INTEL_IRQ_RXT0 0x00000080UL /**< Receive timer */ -#define INTEL_IRQ_RXO 0x00000400UL /**< Receive overrun */ /** Interrupt Mask Set/Read Register */ #define INTEL_IMS 0x000d0UL |