[arm] Split out 32-bit-specific code to arch/arm32

Signed-off-by: Michael Brown <mcb30@ipxe.org>

17 files changed, 1121 insertions, 0 deletions

diff --git a/src/arch/arm32/Makefile b/src/arch/arm32/Makefile
new file mode 100644
index 000000000..3a7c09230
--- /dev/null
+++ b/src/arch/arm32/Makefile
@@ -0,0 +1,23 @@
+# ARM32-specific directories containing source files
+#
+SRCDIRS		+= arch/arm32/core
+SRCDIRS		+= arch/arm32/libgcc
+
+# ARM32-specific flags
+#
+CFLAGS		+= -mthumb -mcpu=cortex-a15 -mabi=aapcs -mfloat-abi=soft
+CFLAGS		+= -mword-relocations
+ASFLAGS		+= -mthumb -mcpu=cortex-a15
+
+# EFI requires -fshort-wchar, and nothing else currently uses wchar_t
+#
+CFLAGS		+= -fshort-wchar
+
+# Include common ARM Makefile
+MAKEDEPS	+= arch/arm/Makefile
+include arch/arm/Makefile
+
+# Include platform-specific Makefile
+#
+MAKEDEPS	+= arch/arm32/Makefile.$(PLATFORM)
+include arch/arm32/Makefile.$(PLATFORM)
diff --git a/src/arch/arm32/Makefile.efi b/src/arch/arm32/Makefile.efi
new file mode 100644
index 000000000..a06354f1d
--- /dev/null
+++ b/src/arch/arm32/Makefile.efi
@@ -0,0 +1,14 @@
+# -*- makefile -*- : Force emacs to use Makefile mode
+
+# Specify EFI image builder
+#
+ELF2EFI		= $(ELF2EFI32)
+
+# Specify EFI boot file
+#
+EFI_BOOT_FILE	= bootarm.efi
+
+# Include generic EFI Makefile
+#
+MAKEDEPS	+= arch/arm/Makefile.efi
+include arch/arm/Makefile.efi
diff --git a/src/arch/arm32/core/arm32_bigint.c b/src/arch/arm32/core/arm32_bigint.c
new file mode 100644
index 000000000..839bead18
--- /dev/null
+++ b/src/arch/arm32/core/arm32_bigint.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2016 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ *
+ * You can also choose to distribute this program under the terms of
+ * the Unmodified Binary Distribution Licence (as given in the file
+ * COPYING.UBDL), provided that you have satisfied its requirements.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#include <stdint.h>
+#include <string.h>
+#include <ipxe/bigint.h>
+
+/** @file
+ *
+ * Big integer support
+ */
+
+/**
+ * Multiply big integers
+ *
+ * @v multiplicand0	Element 0 of big integer to be multiplied
+ * @v multiplier0	Element 0 of big integer to be multiplied
+ * @v result0		Element 0 of big integer to hold result
+ * @v size		Number of elements
+ */
+void bigint_multiply_raw ( const uint32_t *multiplicand0,
+			   const uint32_t *multiplier0,
+			   uint32_t *result0, unsigned int size ) {
+	const bigint_t ( size ) __attribute__ (( may_alias )) *multiplicand =
+		( ( const void * ) multiplicand0 );
+	const bigint_t ( size ) __attribute__ (( may_alias )) *multiplier =
+		( ( const void * ) multiplier0 );
+	bigint_t ( size * 2 ) __attribute__ (( may_alias )) *result =
+		( ( void * ) result0 );
+	unsigned int i;
+	unsigned int j;
+	uint32_t multiplicand_element;
+	uint32_t multiplier_element;
+	uint32_t *result_elements;
+	uint32_t discard_low;
+	uint32_t discard_high;
+	uint32_t discard_temp;
+
+	/* Zero result */
+	memset ( result, 0, sizeof ( *result ) );
+
+	/* Multiply integers one element at a time */
+	for ( i = 0 ; i < size ; i++ ) {
+		multiplicand_element = multiplicand->element[i];
+		for ( j = 0 ; j < size ; j++ ) {
+			multiplier_element = multiplier->element[j];
+			result_elements = &result->element[ i + j ];
+			/* Perform a single multiply, and add the
+			 * resulting double-element into the result,
+			 * carrying as necessary.  The carry can
+			 * never overflow beyond the end of the
+			 * result, since:
+			 *
+			 *     a < 2^{n}, b < 2^{n} => ab < 2^{2n}
+			 */
+			__asm__ __volatile__ ( "umull %1, %2, %5, %6\n\t"
+					       "ldr %3, [%0]\n\t"
+					       "adds %3, %1\n\t"
+					       "stmia %0!, {%3}\n\t"
+					       "ldr %3, [%0]\n\t"
+					       "adcs %3, %2\n\t"
+					       "stmia %0!, {%3}\n\t"
+					       "bcc 2f\n\t"
+					       "\n1:\n\t"
+					       "ldr %3, [%0]\n\t"
+					       "adcs %3, #0\n\t"
+					       "stmia %0!, {%3}\n\t"
+					       "bcs 1b\n\t"
+					       "\n2:\n\t"
+					       : "+l" ( result_elements ),
+						 "=l" ( discard_low ),
+						 "=l" ( discard_high ),
+						 "=l" ( discard_temp ),
+						 "+m" ( *result )
+					       : "l" ( multiplicand_element ),
+						 "l" ( multiplier_element )
+					       : "cc" );
+		}
+	}
+}
diff --git a/src/arch/arm32/core/setjmp.S b/src/arch/arm32/core/setjmp.S
new file mode 100644
index 000000000..7e7b0fe58
--- /dev/null
+++ b/src/arch/arm32/core/setjmp.S
@@ -0,0 +1,32 @@
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
+
+	.text
+	.arm
+
+/*
+ * Save stack context for non-local goto
+ */
+	.globl	setjmp
+	.type	setjmp, %function
+setjmp:
+	/* Store registers */
+	stmia	r0, { r4, r5, r6, r7, r8, r9, r10, fp, sp, lr }
+	/* Return 0 when returning as setjmp() */
+	mov	r0, #0
+	bx	lr
+	.size	setjmp, . - setjmp
+
+/*
+ * Non-local jump to a saved stack context
+ */
+	.globl	longjmp
+	.type	longjmp, %function
+longjmp:
+	/* Restore registers */
+	ldmia	r0, { r4, r5, r6, r7, r8, r9, r10, fp, sp, lr }
+	/* Force result to non-zero */
+	movs	r0, r1
+	moveq	r0, #1
+	/* Return to setjmp() caller */
+	bx	lr
+	.size	longjmp, . - longjmp
diff --git a/src/arch/arm32/include/bits/bigint.h b/src/arch/arm32/include/bits/bigint.h
new file mode 100644
index 000000000..103c6c489
--- /dev/null
+++ b/src/arch/arm32/include/bits/bigint.h
@@ -0,0 +1,316 @@
+#ifndef _BITS_BIGINT_H
+#define _BITS_BIGINT_H
+
+/** @file
+ *
+ * Big integer support
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#include <stdint.h>
+#include <string.h>
+#include <strings.h>
+
+/** Element of a big integer */
+typedef uint32_t bigint_element_t;
+
+/**
+ * Initialise big integer
+ *
+ * @v value0		Element 0 of big integer to initialise
+ * @v size		Number of elements
+ * @v data		Raw data
+ * @v len		Length of raw data
+ */
+static inline __attribute__ (( always_inline )) void
+bigint_init_raw ( uint32_t *value0, unsigned int size,
+		  const void *data, size_t len ) {
+	size_t pad_len = ( sizeof ( bigint_t ( size ) ) - len );
+	uint8_t *value_byte = ( ( void * ) value0 );
+	const uint8_t *data_byte = ( data + len );
+
+	/* Copy raw data in reverse order, padding with zeros */
+	while ( len-- )
+		*(value_byte++) = *(--data_byte);
+	while ( pad_len-- )
+		*(value_byte++) = 0;
+}
+
+/**
+ * Add big integers
+ *
+ * @v addend0		Element 0 of big integer to add
+ * @v value0		Element 0 of big integer to be added to
+ * @v size		Number of elements
+ */
+static inline __attribute__ (( always_inline )) void
+bigint_add_raw ( const uint32_t *addend0, uint32_t *value0,
+		 unsigned int size ) {
+	bigint_t ( size ) __attribute__ (( may_alias )) *value =
+		( ( void * ) value0 );
+	uint32_t *discard_addend;
+	uint32_t *discard_value;
+	uint32_t *discard_end;
+	uint32_t discard_addend_i;
+	uint32_t discard_value_i;
+
+	__asm__ __volatile__ ( "adds %2, %0, %8, lsl #2\n\t" /* clear CF */
+			       "\n1:\n\t"
+			       "ldmia %0!, {%3}\n\t"
+			       "ldr %4, [%1]\n\t"
+			       "adcs %4, %3\n\t"
+			       "stmia %1!, {%4}\n\t"
+			       "teq %0, %2\n\t"
+			       "bne 1b\n\t"
+			       : "=l" ( discard_addend ),
+				 "=l" ( discard_value ),
+				 "=l" ( discard_end ),
+				 "=l" ( discard_addend_i ),
+				 "=l" ( discard_value_i ),
+				 "+m" ( *value )
+			       : "0" ( addend0 ), "1" ( value0 ), "l" ( size )
+			       : "cc" );
+}
+
+/**
+ * Subtract big integers
+ *
+ * @v subtrahend0	Element 0 of big integer to subtract
+ * @v value0		Element 0 of big integer to be subtracted from
+ * @v size		Number of elements
+ */
+static inline __attribute__ (( always_inline )) void
+bigint_subtract_raw ( const uint32_t *subtrahend0, uint32_t *value0,
+		      unsigned int size ) {
+	bigint_t ( size ) __attribute__ (( may_alias )) *value =
+		( ( void * ) value0 );
+	uint32_t *discard_subtrahend;
+	uint32_t *discard_value;
+	uint32_t *discard_end;
+	uint32_t discard_subtrahend_i;
+	uint32_t discard_value_i;
+
+	__asm__ __volatile__ ( "add %2, %0, %8, lsl #2\n\t"
+			       "cmp %2, %0\n\t" /* set CF */
+			       "\n1:\n\t"
+			       "ldmia %0!, {%3}\n\t"
+			       "ldr %4, [%1]\n\t"
+			       "sbcs %4, %3\n\t"
+			       "stmia %1!, {%4}\n\t"
+			       "teq %0, %2\n\t"
+			       "bne 1b\n\t"
+			       : "=l" ( discard_subtrahend ),
+				 "=l" ( discard_value ),
+				 "=l" ( discard_end ),
+				 "=l" ( discard_subtrahend_i ),
+				 "=l" ( discard_value_i ),
+				 "+m" ( *value )
+			       : "0" ( subtrahend0 ), "1" ( value0 ),
+				 "l" ( size )
+			       : "cc" );
+}
+
+/**
+ * Rotate big integer left
+ *
+ * @v value0		Element 0 of big integer
+ * @v size		Number of elements
+ */
+static inline __attribute__ (( always_inline )) void
+bigint_rol_raw ( uint32_t *value0, unsigned int size ) {
+	bigint_t ( size ) __attribute__ (( may_alias )) *value =
+		( ( void * ) value0 );
+	uint32_t *discard_value;
+	uint32_t *discard_end;
+	uint32_t discard_value_i;
+
+	__asm__ __volatile__ ( "adds %1, %0, %5, lsl #2\n\t" /* clear CF */
+			       "\n1:\n\t"
+			       "ldr %2, [%0]\n\t"
+			       "adcs %2, %2\n\t"
+			       "stmia %0!, {%2}\n\t"
+			       "teq %0, %1\n\t"
+			       "bne 1b\n\t"
+			       : "=l" ( discard_value ),
+				 "=l" ( discard_end ),
+				 "=l" ( discard_value_i ),
+				 "+m" ( *value )
+			       : "0" ( value0 ), "1" ( size )
+			       : "cc" );
+}
+
+/**
+ * Rotate big integer right
+ *
+ * @v value0		Element 0 of big integer
+ * @v size		Number of elements
+ */
+static inline __attribute__ (( always_inline )) void
+bigint_ror_raw ( uint32_t *value0, unsigned int size ) {
+	bigint_t ( size ) __attribute__ (( may_alias )) *value =
+		( ( void * ) value0 );
+	uint32_t *discard_value;
+	uint32_t *discard_end;
+	uint32_t discard_value_i;
+
+	__asm__ __volatile__ ( "adds %1, %0, %5, lsl #2\n\t" /* clear CF */
+			       "\n1:\n\t"
+			       "ldmdb %1!, {%2}\n\t"
+			       "rrxs %2, %2\n\t"
+			       "str %2, [%1]\n\t"
+			       "teq %0, %1\n\t"
+			       "bne 1b\n\t"
+			       : "=l" ( discard_value ),
+				 "=l" ( discard_end ),
+				 "=l" ( discard_value_i ),
+				 "+m" ( *value )
+			       : "0" ( value0 ), "1" ( size )
+			       : "cc" );
+}
+
+/**
+ * Test if big integer is equal to zero
+ *
+ * @v value0		Element 0 of big integer
+ * @v size		Number of elements
+ * @ret is_zero		Big integer is equal to zero
+ */
+static inline __attribute__ (( always_inline, pure )) int
+bigint_is_zero_raw ( const uint32_t *value0, unsigned int size ) {
+	const uint32_t *value = value0;
+	uint32_t value_i;
+
+	do {
+		value_i = *(value++);
+		if ( value_i )
+			break;
+	} while ( --size );
+
+	return ( value_i == 0 );
+}
+
+/**
+ * Compare big integers
+ *
+ * @v value0		Element 0 of big integer
+ * @v reference0	Element 0 of reference big integer
+ * @v size		Number of elements
+ * @ret geq		Big integer is greater than or equal to the reference
+ */
+static inline __attribute__ (( always_inline, pure )) int
+bigint_is_geq_raw ( const uint32_t *value0, const uint32_t *reference0,
+		    unsigned int size ) {
+	const uint32_t *value = ( value0 + size );
+	const uint32_t *reference = ( reference0 + size );
+	uint32_t value_i;
+	uint32_t reference_i;
+
+	do {
+		value_i = *(--value);
+		reference_i = *(--reference);
+		if ( value_i != reference_i )
+			break;
+	} while ( --size );
+
+	return ( value_i >= reference_i );
+}
+
+/**
+ * Test if bit is set in big integer
+ *
+ * @v value0		Element 0 of big integer
+ * @v size		Number of elements
+ * @v bit		Bit to test
+ * @ret is_set		Bit is set
+ */
+static inline __attribute__ (( always_inline )) int
+bigint_bit_is_set_raw ( const uint32_t *value0, unsigned int size,
+			unsigned int bit ) {
+	const bigint_t ( size ) __attribute__ (( may_alias )) *value =
+		( ( const void * ) value0 );
+	unsigned int index = ( bit / ( 8 * sizeof ( value->element[0] ) ) );
+	unsigned int subindex = ( bit % ( 8 * sizeof ( value->element[0] ) ) );
+
+	return ( value->element[index] & ( 1 << subindex ) );
+}
+
+/**
+ * Find highest bit set in big integer
+ *
+ * @v value0		Element 0 of big integer
+ * @v size		Number of elements
+ * @ret max_bit		Highest bit set + 1 (or 0 if no bits set)
+ */
+static inline __attribute__ (( always_inline )) int
+bigint_max_set_bit_raw ( const uint32_t *value0, unsigned int size ) {
+	const uint32_t *value = ( value0 + size );
+	int max_bit = ( 8 * sizeof ( bigint_t ( size ) ) );
+	uint32_t value_i;
+
+	do {
+		value_i = *(--value);
+		max_bit -= ( 32 - fls ( value_i ) );
+		if ( value_i )
+			break;
+	} while ( --size );
+
+	return max_bit;
+}
+
+/**
+ * Grow big integer
+ *
+ * @v source0		Element 0 of source big integer
+ * @v source_size	Number of elements in source big integer
+ * @v dest0		Element 0 of destination big integer
+ * @v dest_size		Number of elements in destination big integer
+ */
+static inline __attribute__ (( always_inline )) void
+bigint_grow_raw ( const uint32_t *source0, unsigned int source_size,
+		  uint32_t *dest0, unsigned int dest_size ) {
+	unsigned int pad_size = ( dest_size - source_size );
+
+	memcpy ( dest0, source0, sizeof ( bigint_t ( source_size ) ) );
+	memset ( ( dest0 + source_size ), 0, sizeof ( bigint_t ( pad_size ) ) );
+}
+
+/**
+ * Shrink big integer
+ *
+ * @v source0		Element 0 of source big integer
+ * @v source_size	Number of elements in source big integer
+ * @v dest0		Element 0 of destination big integer
+ * @v dest_size		Number of elements in destination big integer
+ */
+static inline __attribute__ (( always_inline )) void
+bigint_shrink_raw ( const uint32_t *source0, unsigned int source_size __unused,
+		    uint32_t *dest0, unsigned int dest_size ) {
+
+	memcpy ( dest0, source0, sizeof ( bigint_t ( dest_size ) ) );
+}
+
+/**
+ * Finalise big integer
+ *
+ * @v value0		Element 0 of big integer to finalise
+ * @v size		Number of elements
+ * @v out		Output buffer
+ * @v len		Length of output buffer
+ */
+static inline __attribute__ (( always_inline )) void
+bigint_done_raw ( const uint32_t *value0, unsigned int size __unused,
+		  void *out, size_t len ) {
+	const uint8_t *value_byte = ( ( const void * ) value0 );
+	uint8_t *out_byte = ( out + len );
+
+	/* Copy raw data in reverse order */
+	while ( len-- )
+		*(--out_byte) = *(value_byte++);
+}
+
+extern void bigint_multiply_raw ( const uint32_t *multiplicand0,
+				  const uint32_t *multiplier0,
+				  uint32_t *value0, unsigned int size );
+
+#endif /* _BITS_BIGINT_H */
diff --git a/src/arch/arm32/include/bits/bitops.h b/src/arch/arm32/include/bits/bitops.h
new file mode 100644
index 000000000..9a5fe14c2
--- /dev/null
+++ b/src/arch/arm32/include/bits/bitops.h
@@ -0,0 +1,100 @@
+#ifndef _BITS_BITOPS_H
+#define _BITS_BITOPS_H
+
+/** @file
+ *
+ * ARM bit operations
+ *
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#include <stdint.h>
+
+/**
+ * Test and set bit atomically
+ *
+ * @v bit		Bit to set
+ * @v bits		Bit field
+ * @ret old		Old value of bit (zero or non-zero)
+ */
+static inline __attribute__ (( always_inline )) int
+test_and_set_bit ( unsigned int bit, volatile void *bits ) {
+	unsigned int index = ( bit / 32 );
+	unsigned int offset = ( bit % 32 );
+	volatile uint32_t *dword = ( ( ( volatile uint32_t * ) bits ) + index );
+	uint32_t mask = ( 1UL << offset );
+	uint32_t old;
+	uint32_t new;
+	uint32_t flag;
+
+	__asm__ __volatile__ ( "\n1:\n\t"
+			       "ldrex %0, %3\n\t"
+			       "orr %1, %0, %4\n\t"
+			       "strex %2, %1, %3\n\t"
+			       "tst %2, %2\n\t"
+			       "bne 1b\n\t"
+			       : "=&r" ( old ), "=&r" ( new ), "=&l" ( flag ),
+				 "+Q" ( *dword )
+			       : "r" ( mask )
+			       : "cc" );
+
+	return ( old & mask );
+}
+
+/**
+ * Test and clear bit atomically
+ *
+ * @v bit		Bit to set
+ * @v bits		Bit field
+ * @ret old		Old value of bit (zero or non-zero)
+ */
+static inline __attribute__ (( always_inline )) int
+test_and_clear_bit ( unsigned int bit, volatile void *bits ) {
+	unsigned int index = ( bit / 32 );
+	unsigned int offset = ( bit % 32 );
+	volatile uint32_t *dword = ( ( ( volatile uint32_t * ) bits ) + index );
+	uint32_t mask = ( 1UL << offset );
+	uint32_t old;
+	uint32_t new;
+	uint32_t flag;
+
+	__asm__ __volatile__ ( "\n1:\n\t"
+			       "ldrex %0, %3\n\t"
+			       "bic %1, %0, %4\n\t"
+			       "strex %2, %1, %3\n\t"
+			       "tst %2, %2\n\t"
+			       "bne 1b\n\t"
+			       : "=&r" ( old ), "=&r" ( new ), "=&l" ( flag ),
+				 "+Q" ( *dword )
+			       : "r" ( mask )
+			       : "cc" );
+
+	return ( old & mask );
+}
+
+/**
+ * Set bit atomically
+ *
+ * @v bit		Bit to set
+ * @v bits		Bit field
+ */
+static inline __attribute__ (( always_inline )) void
+set_bit ( unsigned int bit, volatile void *bits ) {
+
+	test_and_set_bit ( bit, bits );
+}
+
+/**
+ * Clear bit atomically
+ *
+ * @v bit		Bit to set
+ * @v bits		Bit field
+ */
+static inline __attribute__ (( always_inline )) void
+clear_bit ( unsigned int bit, volatile void *bits ) {
+
+	test_and_clear_bit ( bit, bits );
+}
+
+#endif /* _BITS_BITOPS_H */
diff --git a/src/arch/arm32/include/bits/byteswap.h b/src/arch/arm32/include/bits/byteswap.h
new file mode 100644
index 000000000..1fc884bd8
--- /dev/null
+++ b/src/arch/arm32/include/bits/byteswap.h
@@ -0,0 +1,52 @@
+#ifndef _BITS_BYTESWAP_H
+#define _BITS_BYTESWAP_H
+
+/** @file
+ *
+ * Byte-order swapping functions
+ *
+ */
+
+#include <stdint.h>
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+static inline __attribute__ (( always_inline, const )) uint16_t
+__bswap_variable_16 ( uint16_t x ) {
+	__asm__ ( "rev16 %0, %1" : "=l" ( x ) : "l" ( x ) );
+	return x;
+}
+
+static inline __attribute__ (( always_inline )) void
+__bswap_16s ( uint16_t *x ) {
+	*x = __bswap_variable_16 ( *x );
+}
+
+static inline __attribute__ (( always_inline, const )) uint32_t
+__bswap_variable_32 ( uint32_t x ) {
+	__asm__ ( "rev %0, %1" : "=l" ( x ) : "l" ( x ) );
+	return x;
+}
+
+static inline __attribute__ (( always_inline )) void
+__bswap_32s ( uint32_t *x ) {
+	*x = __bswap_variable_32 ( *x );
+}
+
+static inline __attribute__ (( always_inline, const )) uint64_t
+__bswap_variable_64 ( uint64_t x ) {
+	uint32_t in_high = ( x >> 32 );
+	uint32_t in_low = ( x & 0xffffffffUL );
+	uint32_t out_high = __bswap_variable_32 ( in_low );
+	uint32_t out_low = __bswap_variable_32 ( in_high );
+
+	return ( ( ( ( uint64_t ) out_high ) << 32 ) |
+		 ( ( uint64_t ) out_low ) );
+}
+
+static inline __attribute__ (( always_inline )) void
+__bswap_64s ( uint64_t *x ) {
+	*x = __bswap_variable_64 ( *x );
+}
+
+#endif
diff --git a/src/arch/arm32/include/bits/compiler.h b/src/arch/arm32/include/bits/compiler.h
new file mode 100644
index 000000000..e420cf922
--- /dev/null
+++ b/src/arch/arm32/include/bits/compiler.h
@@ -0,0 +1,16 @@
+#ifndef _BITS_COMPILER_H
+#define _BITS_COMPILER_H
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+/** Dummy relocation type */
+#define RELOC_TYPE_NONE R_ARM_NONE
+
+#ifndef ASSEMBLY
+
+#define __asmcall
+#define __libgcc
+
+#endif /* ASSEMBLY */
+
+#endif /*_BITS_COMPILER_H */
diff --git a/src/arch/arm32/include/bits/profile.h b/src/arch/arm32/include/bits/profile.h
new file mode 100644
index 000000000..2b15d1604
--- /dev/null
+++ b/src/arch/arm32/include/bits/profile.h
@@ -0,0 +1,30 @@
+#ifndef _BITS_PROFILE_H
+#define _BITS_PROFILE_H
+
+/** @file
+ *
+ * Profiling
+ *
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#include <stdint.h>
+
+/**
+ * Get profiling timestamp
+ *
+ * @ret timestamp	Timestamp
+ */
+static inline __attribute__ (( always_inline )) uint64_t
+profile_timestamp ( void ) {
+	uint32_t cycles;
+
+	/* Read cycle counter */
+	__asm__ __volatile__ ( "mcr p15, 0, %1, c9, c12, 0\n\t"
+			       "mrc p15, 0, %0, c9, c13, 0\n\t"
+			       : "=r" ( cycles ) : "r" ( 1 ) );
+	return cycles;
+}
+
+#endif /* _BITS_PROFILE_H */
diff --git a/src/arch/arm32/include/bits/stdint.h b/src/arch/arm32/include/bits/stdint.h
new file mode 100644
index 000000000..fe1f9946a
--- /dev/null
+++ b/src/arch/arm32/include/bits/stdint.h
@@ -0,0 +1,23 @@
+#ifndef _BITS_STDINT_H
+#define _BITS_STDINT_H
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+typedef __SIZE_TYPE__		size_t;
+typedef signed long		ssize_t;
+typedef signed long		off_t;
+
+typedef unsigned char		uint8_t;
+typedef unsigned short		uint16_t;
+typedef unsigned int		uint32_t;
+typedef unsigned long long	uint64_t;
+
+typedef signed char		int8_t;
+typedef signed short		int16_t;
+typedef signed int		int32_t;
+typedef signed long long	int64_t;
+
+typedef unsigned long		physaddr_t;
+typedef unsigned long		intptr_t;
+
+#endif /* _BITS_STDINT_H */
diff --git a/src/arch/arm32/include/bits/strings.h b/src/arch/arm32/include/bits/strings.h
new file mode 100644
index 000000000..adbd5f4b4
--- /dev/null
+++ b/src/arch/arm32/include/bits/strings.h
@@ -0,0 +1,85 @@
+#ifndef _BITS_STRINGS_H
+#define _BITS_STRINGS_H
+
+/** @file
+ *
+ * String functions
+ *
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+/**
+ * Find first (i.e. least significant) set bit
+ *
+ * @v value		Value
+ * @ret lsb		Least significant bit set in value (LSB=1), or zero
+ */
+static inline __attribute__ (( always_inline )) int __ffsl ( long value ) {
+	unsigned long bits = value;
+	unsigned long lsb;
+	unsigned int lz;
+
+	/* Extract least significant set bit */
+	lsb = ( bits & -bits );
+
+	/* Count number of leading zeroes before LSB */
+	__asm__ ( "clz %0, %1" : "=r" ( lz ) : "r" ( lsb ) );
+
+	return ( 32 - lz );
+}
+
+/**
+ * Find first (i.e. least significant) set bit
+ *
+ * @v value		Value
+ * @ret lsb		Least significant bit set in value (LSB=1), or zero
+ */
+static inline __attribute__ (( always_inline )) int __ffsll ( long long value ){
+	unsigned long high = ( value >> 32 );
+	unsigned long low = ( value >> 0 );
+
+	if ( low ) {
+		return ( __ffsl ( low ) );
+	} else if ( high ) {
+		return ( 32 + __ffsl ( high ) );
+	} else {
+		return 0;
+	}
+}
+
+/**
+ * Find last (i.e. most significant) set bit
+ *
+ * @v value		Value
+ * @ret msb		Most significant bit set in value (LSB=1), or zero
+ */
+static inline __attribute__ (( always_inline )) int __flsl ( long value ) {
+	unsigned int lz;
+
+	/* Count number of leading zeroes */
+	__asm__ ( "clz %0, %1" : "=r" ( lz ) : "r" ( value ) );
+
+	return ( 32 - lz );
+}
+
+/**
+ * Find last (i.e. most significant) set bit
+ *
+ * @v value		Value
+ * @ret msb		Most significant bit set in value (LSB=1), or zero
+ */
+static inline __attribute__ (( always_inline )) int __flsll ( long long value ){
+	unsigned long high = ( value >> 32 );
+	unsigned long low = ( value >> 0 );
+
+	if ( high ) {
+		return ( 32 + __flsl ( high ) );
+	} else if ( low ) {
+		return ( __flsl ( low ) );
+	} else {
+		return 0;
+	}
+}
+
+#endif /* _BITS_STRINGS_H */
diff --git a/src/arch/arm32/include/efi/ipxe/dhcp_arch.h b/src/arch/arm32/include/efi/ipxe/dhcp_arch.h
new file mode 100644
index 000000000..f403d4ce8
--- /dev/null
+++ b/src/arch/arm32/include/efi/ipxe/dhcp_arch.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2015 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ *
+ * You can also choose to distribute this program under the terms of
+ * the Unmodified Binary Distribution Licence (as given in the file
+ * COPYING.UBDL), provided that you have satisfied its requirements.
+ */
+
+#ifndef _DHCP_ARCH_H
+#define _DHCP_ARCH_H
+
+/** @file
+ *
+ * Architecture-specific DHCP options
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#include <ipxe/dhcp.h>
+
+#define DHCP_ARCH_VENDOR_CLASS_ID \
+	DHCP_STRING ( 'P', 'X', 'E', 'C', 'l', 'i', 'e', 'n', 't', ':',      \
+		      'A', 'r', 'c', 'h', ':', '0', '0', '0', '0', '7', ':', \
+		      'U', 'N', 'D', 'I', ':', '0', '0', '3', '0', '1', '0' )
+
+#define DHCP_ARCH_CLIENT_ARCHITECTURE \
+	DHCP_WORD ( DHCP_CLIENT_ARCHITECTURE_EFI )
+
+#define DHCP_ARCH_CLIENT_NDI DHCP_OPTION ( 1 /* UNDI */ , 3, 10 /* v3.10 */ )
+
+#endif
diff --git a/src/arch/arm32/include/gdbmach.h b/src/arch/arm32/include/gdbmach.h
new file mode 100644
index 000000000..cd152eedd
--- /dev/null
+++ b/src/arch/arm32/include/gdbmach.h
@@ -0,0 +1,45 @@
+#ifndef GDBMACH_H
+#define GDBMACH_H
+
+/** @file
+ *
+ * GDB architecture specifics
+ *
+ * This file declares functions for manipulating the machine state and
+ * debugging context.
+ *
+ */
+
+#include <stdint.h>
+
+typedef unsigned long gdbreg_t;
+
+/* Register snapshot */
+enum {
+	/* Not yet implemented */
+	GDBMACH_NREGS,
+};
+
+#define GDBMACH_SIZEOF_REGS ( GDBMACH_NREGS * sizeof ( gdbreg_t ) )
+
+static inline void gdbmach_set_pc ( gdbreg_t *regs, gdbreg_t pc ) {
+	/* Not yet implemented */
+	( void ) regs;
+	( void ) pc;
+}
+
+static inline void gdbmach_set_single_step ( gdbreg_t *regs, int step ) {
+	/* Not yet implemented */
+	( void ) regs;
+	( void ) step;
+}
+
+static inline void gdbmach_breakpoint ( void ) {
+	/* Not yet implemented */
+}
+
+extern int gdbmach_set_breakpoint ( int type, unsigned long addr, size_t len,
+				    int enable );
+extern void gdbmach_init ( void );
+
+#endif /* GDBMACH_H */
diff --git a/src/arch/arm32/include/limits.h b/src/arch/arm32/include/limits.h
new file mode 100644
index 000000000..bb48b75ab
--- /dev/null
+++ b/src/arch/arm32/include/limits.h
@@ -0,0 +1,61 @@
+#ifndef LIMITS_H
+#define LIMITS_H	1
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+/* Number of bits in a `char' */
+#define CHAR_BIT	8
+
+/* Minimum and maximum values a `signed char' can hold */
+#define SCHAR_MIN	(-128)
+#define SCHAR_MAX	127
+
+/* Maximum value an `unsigned char' can hold. (Minimum is 0.) */
+#define UCHAR_MAX	255
+
+/* Minimum and maximum values a `char' can hold */
+#define CHAR_MIN	SCHAR_MIN
+#define CHAR_MAX	SCHAR_MAX
+
+/* Minimum and maximum values a `signed short int' can hold */
+#define SHRT_MIN	(-32768)
+#define SHRT_MAX	32767
+
+/* Maximum value an `unsigned short' can hold. (Minimum is 0.) */
+#define USHRT_MAX	65535
+
+
+/* Minimum and maximum values a `signed int' can hold */
+#define INT_MIN		(-INT_MAX - 1)
+#define INT_MAX		2147483647
+
+/* Maximum value an `unsigned int' can hold. (Minimum is 0.) */
+#define UINT_MAX	4294967295U
+
+
+/* Minimum and maximum values a `signed int' can hold */
+#define INT_MAX		2147483647
+#define INT_MIN		(-INT_MAX - 1)
+
+
+/* Maximum value an `unsigned int' can hold. (Minimum is 0.) */
+#define UINT_MAX	4294967295U
+
+
+/* Minimum and maximum values a `signed long' can hold */
+#define LONG_MAX	2147483647
+#define LONG_MIN	(-LONG_MAX - 1L)
+
+/* Maximum value an `unsigned long' can hold. (Minimum is 0.) */
+#define ULONG_MAX	4294967295UL
+
+/* Minimum and maximum values a `signed long long' can hold */
+#define LLONG_MAX	9223372036854775807LL
+#define LLONG_MIN	(-LONG_MAX - 1LL)
+
+
+/* Maximum value an `unsigned long long' can hold. (Minimum is 0.) */
+#define ULLONG_MAX	18446744073709551615ULL
+
+
+#endif /* LIMITS_H */
diff --git a/src/arch/arm32/include/setjmp.h b/src/arch/arm32/include/setjmp.h
new file mode 100644
index 000000000..4828b47a2
--- /dev/null
+++ b/src/arch/arm32/include/setjmp.h
@@ -0,0 +1,38 @@
+#ifndef _SETJMP_H
+#define _SETJMP_H
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#include <stdint.h>
+
+/** A jump buffer */
+typedef struct {
+	/** Saved r4 */
+	uint32_t r4;
+	/** Saved r5 */
+	uint32_t r5;
+	/** Saved r6 */
+	uint32_t r6;
+	/** Saved r7 */
+	uint32_t r7;
+	/** Saved r8 */
+	uint32_t r8;
+	/** Saved r9 */
+	uint32_t r9;
+	/** Saved r10 */
+	uint32_t r10;
+	/** Saved frame pointer (r11) */
+	uint32_t fp;
+	/** Saved stack pointer (r13) */
+	uint32_t sp;
+	/** Saved link register (r14) */
+	uint32_t lr;
+} jmp_buf[1];
+
+extern int __asmcall __attribute__ (( returns_twice ))
+setjmp ( jmp_buf env );
+
+extern void __asmcall __attribute__ (( noreturn ))
+longjmp ( jmp_buf env, int val );
+
+#endif /* _SETJMP_H */
diff --git a/src/arch/arm32/libgcc/lldivmod.S b/src/arch/arm32/libgcc/lldivmod.S
new file mode 100644
index 000000000..910be4b78
--- /dev/null
+++ b/src/arch/arm32/libgcc/lldivmod.S
@@ -0,0 +1,50 @@
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
+
+	.text
+	.thumb
+
+/**
+ * Unsigned long long division
+ *
+ * @v r1:r0		Dividend
+ * @v r3:r2		Divisor
+ * @ret r1:r0		Quotient
+ * @ret r3:r2		Remainder
+ */
+	.section ".text.__aeabi_uldivmod", "ax", %progbits
+	.globl	__aeabi_uldivmod
+	.type	__aeabi_uldivmod, %function
+__aeabi_uldivmod:
+	/* Allocate stack space for remainder and pointer to remainder */
+	push	{r0, r1, r2, r3, r4, lr}
+	/* Call __udivmoddi4() */
+	add	r4, sp, #8
+	str	r4, [sp]
+	bl	__udivmoddi4
+	/* Retrieve remainder and return */
+	add	sp, sp, #8
+	pop	{r2, r3, r4, pc}
+	.size	__aeabi_uldivmod, . - __aeabi_uldivmod
+
+/**
+ * Signed long long division
+ *
+ * @v r1:r0		Dividend
+ * @v r3:r2		Divisor
+ * @ret r1:r0		Quotient
+ * @ret r3:r2		Remainder
+ */
+	.section ".text.__aeabi_ldivmod", "ax", %progbits
+	.globl	__aeabi_ldivmod
+	.type	__aeabi_ldivmod, %function
+__aeabi_ldivmod:
+	/* Allocate stack space for remainder and pointer to remainder */
+	push	{r0, r1, r2, r3, r4, lr}
+	/* Call __divmoddi4() */
+	add	r4, sp, #8
+	str	r4, [sp]
+	bl	__divmoddi4
+	/* Retrieve remainder and return */
+	add	sp, sp, #8
+	pop	{r2, r3, r4, pc}
+	.size	__aeabi_ldivmod, . - __aeabi_ldivmod
diff --git a/src/arch/arm32/libgcc/llshift.S b/src/arch/arm32/libgcc/llshift.S
new file mode 100644
index 000000000..cc16e2615
--- /dev/null
+++ b/src/arch/arm32/libgcc/llshift.S
@@ -0,0 +1,88 @@
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
+
+	.text
+	.arm
+
+/**
+ * Logical shift left
+ *
+ * @v r1:r0		Value to shift
+ * @v r2		Shift amount
+ * @ret r1:r0		Shifted value
+ */
+	.section ".text.__aeabi_llsl", "ax", %progbits
+	.globl	__aeabi_llsl
+	.type	__aeabi_llsl, %function
+__aeabi_llsl:
+	/* r3 = ( shift - 32 ) */
+	subs	r3, r2, #32
+	/* If shift >= 32, then
+	 *   high = ( low << ( shift - 32 ) )
+	 */
+	movpl	r1, r0, lsl r3
+	/* If shift < 32, then
+	 *   high = ( ( high << shift ) | ( low >> ( 32 - shift ) ) )
+	 */
+	movmi	r1, r1, lsl r2
+	rsbmi	r3, r2, #32
+	orrmi	r1, r1, r0, lsr r3
+	/* low = ( low << shift ) */
+	mov	r0, r0, lsl r2
+	bx	lr
+	.size	__aeabi_llsl, . - __aeabi_llsl
+
+/**
+ * Logical shift right
+ *
+ * @v r1:r0		Value to shift
+ * @v r2		Shift amount
+ * @ret r1:r0		Shifted value
+ */
+	.section ".text.__aeabi_llsr", "ax", %progbits
+	.globl	__aeabi_llsr
+	.type	__aeabi_llsr, %function
+__aeabi_llsr:
+	/* r3 = ( shift - 32 ) */
+	subs	r3, r2, #32
+	/* If shift >= 32, then
+	 *   low = ( high >> ( shift - 32 ) )
+	 */
+	movpl	r0, r1, lsr r3
+	/* If shift < 32, then
+	 *   low = ( ( low >> shift ) | ( high << ( 32 - shift ) ) )
+	 */
+	movmi	r0, r0, lsr r2
+	rsbmi	r3, r2, #32
+	orrmi	r0, r0, r1, lsl r3
+	/* high = ( high >> shift ) */
+	mov	r1, r1, lsr r2
+	bx	lr
+	.size	__aeabi_llsr, . - __aeabi_llsr
+
+/**
+ * Arithmetic shift right
+ *
+ * @v r1:r0		Value to shift
+ * @v r2		Shift amount
+ * @ret r1:r0		Shifted value
+ */
+	.section ".text.__aeabi_lasr", "ax", %progbits
+	.globl	__aeabi_lasr
+	.type	__aeabi_lasr, %function
+__aeabi_lasr:
+	/* r3 = ( shift - 32 ) */
+	subs	r3, r2, #32
+	/* If shift >= 32, then
+	 *   low = ( high >> ( shift - 32 ) )
+	 */
+	movpl	r0, r1, asr r3
+	/* If shift < 32, then
+	 *   low = ( ( low >> shift ) | ( high << ( 32 - shift ) ) )
+	 */
+	movmi	r0, r0, lsr r2
+	rsbmi	r3, r2, #32
+	orrmi	r0, r0, r1, lsl r3
+	/* high = ( high >> shift ) */
+	mov	r1, r1, asr r2
+	bx	lr
+	.size	__aeabi_lasr, . - __aeabi_lasr