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-rw-r--r--src/include/ipxe/efi/IndustryStandard/Acpi10.h489
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Acpi20.h364
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Acpi30.h466
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Acpi40.h1049
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Acpi50.h1529
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Acpi51.h1640
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Acpi60.h1894
-rw-r--r--src/include/ipxe/efi/IndustryStandard/AcpiAml.h313
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Bluetooth.h41
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Pci22.h869
-rw-r--r--src/include/ipxe/efi/IndustryStandard/PeImage.h614
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Tpm12.h2010
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Tpm20.h2006
-rw-r--r--src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h394
-rw-r--r--src/include/ipxe/efi/IndustryStandard/Usb.h285
15 files changed, 7092 insertions, 6871 deletions
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi10.h b/src/include/ipxe/efi/IndustryStandard/Acpi10.h
index 78570479b..e9a561c22 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi10.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi10.h
@@ -1,20 +1,15 @@
/** @file
ACPI 1.0b definitions from the ACPI Specification, revision 1.0b
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2020, Arm Limited. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_1_0_H_
#define _ACPI_1_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/AcpiAml.h>
@@ -23,8 +18,8 @@ FILE_LICENCE ( BSD3 );
/// excluding the RSD PTR structure.
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_COMMON_HEADER;
#pragma pack(1)
@@ -32,84 +27,84 @@ typedef struct {
/// The common ACPI description table header. This structure prefaces most ACPI tables.
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT8 Revision;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT64 OemTableId;
- UINT32 OemRevision;
- UINT32 CreatorId;
- UINT32 CreatorRevision;
+ UINT32 Signature;
+ UINT32 Length;
+ UINT8 Revision;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT64 OemTableId;
+ UINT32 OemRevision;
+ UINT32 CreatorId;
+ UINT32 CreatorRevision;
} EFI_ACPI_DESCRIPTION_HEADER;
#pragma pack()
//
-// Define for Desriptor
+// Define for Descriptor
//
-#define ACPI_SMALL_ITEM_FLAG 0x00
-#define ACPI_LARGE_ITEM_FLAG 0x01
+#define ACPI_SMALL_ITEM_FLAG 0x00
+#define ACPI_LARGE_ITEM_FLAG 0x01
//
// Small Item Descriptor Name
//
-#define ACPI_SMALL_IRQ_DESCRIPTOR_NAME 0x04
-#define ACPI_SMALL_DMA_DESCRIPTOR_NAME 0x05
-#define ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME 0x06
-#define ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME 0x07
-#define ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME 0x08
-#define ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME 0x09
-#define ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME 0x0E
-#define ACPI_SMALL_END_TAG_DESCRIPTOR_NAME 0x0F
+#define ACPI_SMALL_IRQ_DESCRIPTOR_NAME 0x04
+#define ACPI_SMALL_DMA_DESCRIPTOR_NAME 0x05
+#define ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME 0x06
+#define ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME 0x07
+#define ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME 0x08
+#define ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME 0x09
+#define ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME 0x0E
+#define ACPI_SMALL_END_TAG_DESCRIPTOR_NAME 0x0F
//
// Large Item Descriptor Name
//
-#define ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x01
-#define ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME 0x04
-#define ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x05
-#define ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME 0x06
-#define ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x07
-#define ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x08
-#define ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME 0x09
-#define ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0A
+#define ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x01
+#define ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME 0x04
+#define ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x05
+#define ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME 0x06
+#define ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x07
+#define ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x08
+#define ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME 0x09
+#define ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0A
//
// Small Item Descriptor Value
//
-#define ACPI_IRQ_NOFLAG_DESCRIPTOR 0x22
-#define ACPI_IRQ_DESCRIPTOR 0x23
-#define ACPI_DMA_DESCRIPTOR 0x2A
-#define ACPI_START_DEPENDENT_DESCRIPTOR 0x30
-#define ACPI_START_DEPENDENT_EX_DESCRIPTOR 0x31
-#define ACPI_END_DEPENDENT_DESCRIPTOR 0x38
-#define ACPI_IO_PORT_DESCRIPTOR 0x47
-#define ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 0x4B
-#define ACPI_END_TAG_DESCRIPTOR 0x79
+#define ACPI_IRQ_NOFLAG_DESCRIPTOR 0x22
+#define ACPI_IRQ_DESCRIPTOR 0x23
+#define ACPI_DMA_DESCRIPTOR 0x2A
+#define ACPI_START_DEPENDENT_DESCRIPTOR 0x30
+#define ACPI_START_DEPENDENT_EX_DESCRIPTOR 0x31
+#define ACPI_END_DEPENDENT_DESCRIPTOR 0x38
+#define ACPI_IO_PORT_DESCRIPTOR 0x47
+#define ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 0x4B
+#define ACPI_END_TAG_DESCRIPTOR 0x79
//
// Large Item Descriptor Value
//
-#define ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 0x81
-#define ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 0x85
-#define ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 0x86
-#define ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 0x87
-#define ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 0x88
-#define ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 0x89
-#define ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 0x8A
-#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
+#define ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 0x81
+#define ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 0x85
+#define ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 0x86
+#define ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 0x87
+#define ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 0x88
+#define ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 0x89
+#define ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 0x8A
+#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
//
// Resource Type
//
-#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00
-#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01
-#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02
+#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00
+#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01
+#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02
///
/// Power Management Timer frequency is fixed at 3.579545MHz.
///
-#define ACPI_TIMER_FREQUENCY 3579545
+#define ACPI_TIMER_FREQUENCY 3579545
//
// Ensure proper structure formats
@@ -117,87 +112,87 @@ typedef struct {
#pragma pack(1)
///
-/// The commond definition of QWORD, DWORD, and WORD
+/// The common definition of QWORD, DWORD, and WORD
/// Address Space Descriptors.
///
typedef PACKED struct {
- UINT8 Desc;
- UINT16 Len;
- UINT8 ResType;
- UINT8 GenFlag;
- UINT8 SpecificFlag;
- UINT64 AddrSpaceGranularity;
- UINT64 AddrRangeMin;
- UINT64 AddrRangeMax;
- UINT64 AddrTranslationOffset;
- UINT64 AddrLen;
+ UINT8 Desc;
+ UINT16 Len;
+ UINT8 ResType;
+ UINT8 GenFlag;
+ UINT8 SpecificFlag;
+ UINT64 AddrSpaceGranularity;
+ UINT64 AddrRangeMin;
+ UINT64 AddrRangeMax;
+ UINT64 AddrTranslationOffset;
+ UINT64 AddrLen;
} EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR;
typedef PACKED union {
- UINT8 Byte;
+ UINT8 Byte;
PACKED struct {
- UINT8 Length : 3;
- UINT8 Name : 4;
- UINT8 Type : 1;
+ UINT8 Length : 3;
+ UINT8 Name : 4;
+ UINT8 Type : 1;
} Bits;
} ACPI_SMALL_RESOURCE_HEADER;
typedef PACKED struct {
PACKED union {
- UINT8 Byte;
+ UINT8 Byte;
PACKED struct {
- UINT8 Name : 7;
- UINT8 Type : 1;
- }Bits;
+ UINT8 Name : 7;
+ UINT8 Type : 1;
+ } Bits;
} Header;
- UINT16 Length;
+ UINT16 Length;
} ACPI_LARGE_RESOURCE_HEADER;
///
/// IRQ Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT16 Mask;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 Mask;
} EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR;
///
/// IRQ Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT16 Mask;
- UINT8 Information;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 Mask;
+ UINT8 Information;
} EFI_ACPI_IRQ_DESCRIPTOR;
///
/// DMA Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT8 ChannelMask;
- UINT8 Information;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT8 ChannelMask;
+ UINT8 Information;
} EFI_ACPI_DMA_DESCRIPTOR;
///
/// I/O Port Descriptor
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT8 Information;
- UINT16 BaseAddressMin;
- UINT16 BaseAddressMax;
- UINT8 Alignment;
- UINT8 Length;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT8 Information;
+ UINT16 BaseAddressMin;
+ UINT16 BaseAddressMax;
+ UINT8 Alignment;
+ UINT8 Length;
} EFI_ACPI_IO_PORT_DESCRIPTOR;
///
/// Fixed Location I/O Port Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT16 BaseAddress;
- UINT8 Length;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 BaseAddress;
+ UINT8 Length;
} EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR;
///
@@ -295,17 +290,17 @@ typedef PACKED struct {
/// The End tag identifies an end of resource data.
///
typedef struct {
- UINT8 Desc;
- UINT8 Checksum;
+ UINT8 Desc;
+ UINT8 Checksum;
} EFI_ACPI_END_TAG_DESCRIPTOR;
//
// General use definitions
//
-#define EFI_ACPI_RESERVED_BYTE 0x00
-#define EFI_ACPI_RESERVED_WORD 0x0000
-#define EFI_ACPI_RESERVED_DWORD 0x00000000
-#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
+#define EFI_ACPI_RESERVED_BYTE 0x00
+#define EFI_ACPI_RESERVED_WORD 0x0000
+#define EFI_ACPI_RESERVED_DWORD 0x00000000
+#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
//
// Resource Type Specific Flags
@@ -313,76 +308,86 @@ typedef struct {
//
// Bit [0] : Write Status, _RW
//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)
//
// Bit [2:1] : Memory Attributes, _MEM
//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)
//
// Bit [4:3] : Memory Attributes, _MTP
//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)
-#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)
+#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)
//
// Bit [5] : Memory to I/O Translation, _TTP
//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)
//
// IRQ Information
// Ref ACPI specification 6.4.2.1
//
-#define EFI_ACPI_IRQ_SHARABLE_MASK 0x10
-#define EFI_ACPI_IRQ_SHARABLE 0x10
+#define EFI_ACPI_IRQ_SHARABLE_MASK 0x10
+#define EFI_ACPI_IRQ_SHARABLE 0x10
-#define EFI_ACPI_IRQ_POLARITY_MASK 0x08
-#define EFI_ACPI_IRQ_HIGH_TRUE 0x00
-#define EFI_ACPI_IRQ_LOW_FALSE 0x08
+#define EFI_ACPI_IRQ_POLARITY_MASK 0x08
+#define EFI_ACPI_IRQ_HIGH_TRUE 0x00
+#define EFI_ACPI_IRQ_LOW_FALSE 0x08
-#define EFI_ACPI_IRQ_MODE 0x01
-#define EFI_ACPI_IRQ_LEVEL_TRIGGERED 0x00
-#define EFI_ACPI_IRQ_EDGE_TRIGGERED 0x01
+#define EFI_ACPI_IRQ_MODE 0x01
+#define EFI_ACPI_IRQ_LEVEL_TRIGGERED 0x00
+#define EFI_ACPI_IRQ_EDGE_TRIGGERED 0x01
//
// DMA Information
// Ref ACPI specification 6.4.2.2
//
-#define EFI_ACPI_DMA_SPEED_TYPE_MASK 0x60
-#define EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00
-#define EFI_ACPI_DMA_SPEED_TYPE_A 0x20
-#define EFI_ACPI_DMA_SPEED_TYPE_B 0x40
-#define EFI_ACPI_DMA_SPEED_TYPE_F 0x60
+#define EFI_ACPI_DMA_SPEED_TYPE_MASK 0x60
+#define EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00
+#define EFI_ACPI_DMA_SPEED_TYPE_A 0x20
+#define EFI_ACPI_DMA_SPEED_TYPE_B 0x40
+#define EFI_ACPI_DMA_SPEED_TYPE_F 0x60
-#define EFI_ACPI_DMA_BUS_MASTER_MASK 0x04
-#define EFI_ACPI_DMA_BUS_MASTER 0x04
+#define EFI_ACPI_DMA_BUS_MASTER_MASK 0x04
+#define EFI_ACPI_DMA_BUS_MASTER 0x04
-#define EFI_ACPI_DMA_TRANSFER_TYPE_MASK 0x03
-#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x00
-#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x01
-#define EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x10
+#define EFI_ACPI_DMA_TRANSFER_TYPE_MASK 0x03
+#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x00
+#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x01
+#define EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x02
//
// IO Information
// Ref ACPI specification 6.4.2.5
//
-#define EFI_ACPI_IO_DECODE_MASK 0x01
-#define EFI_ACPI_IO_DECODE_16_BIT 0x01
-#define EFI_ACPI_IO_DECODE_10_BIT 0x00
+#define EFI_ACPI_IO_DECODE_MASK 0x01
+#define EFI_ACPI_IO_DECODE_16_BIT 0x01
+#define EFI_ACPI_IO_DECODE_10_BIT 0x00
//
// Memory Information
// Ref ACPI specification 6.4.3.4
//
-#define EFI_ACPI_MEMORY_WRITE_STATUS_MASK 0x01
-#define EFI_ACPI_MEMORY_WRITABLE 0x01
-#define EFI_ACPI_MEMORY_NON_WRITABLE 0x00
+#define EFI_ACPI_MEMORY_WRITE_STATUS_MASK 0x01
+#define EFI_ACPI_MEMORY_WRITABLE 0x01
+#define EFI_ACPI_MEMORY_NON_WRITABLE 0x00
+
+//
+// Interrupt Vector Flags definitions for Extended Interrupt Descriptor
+// Ref ACPI specification 6.4.3.6
+//
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_PRODUCER_CONSUMER_MASK BIT0
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_MODE_MASK BIT1
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_POLARITY_MASK BIT2
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_SHARABLE_MASK BIT3
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_WAKE_CAPABLITY_MASK BIT4
//
// Ensure proper structure formats
@@ -396,11 +401,11 @@ typedef struct {
/// Root System Description Pointer Structure.
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Reserved;
- UINT32 RsdtAddress;
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Reserved;
+ UINT32 RsdtAddress;
} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
//
@@ -412,52 +417,52 @@ typedef struct {
///
/// RSDT Revision (as defined in ACPI 1.0b specification).
///
-#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT).
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 IntModel;
- UINT8 Reserved1;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 Reserved2;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 Reserved3;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT8 Reserved4;
- UINT8 Reserved5;
- UINT8 Reserved6;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 IntModel;
+ UINT8 Reserved1;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 Reserved2;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 Reserved3;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT8 Reserved4;
+ UINT8 Reserved5;
+ UINT8 Reserved6;
+ UINT32 Flags;
} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -465,63 +470,63 @@ typedef struct {
///
#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01
-#define EFI_ACPI_1_0_INT_MODE_DUAL_PIC 0
-#define EFI_ACPI_1_0_INT_MODE_MULTIPLE_APIC 1
+#define EFI_ACPI_1_0_INT_MODE_DUAL_PIC 0
+#define EFI_ACPI_1_0_INT_MODE_MULTIPLE_APIC 1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_1_0_WBINVD BIT0
-#define EFI_ACPI_1_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_1_0_PROC_C1 BIT2
-#define EFI_ACPI_1_0_P_LVL2_UP BIT3
-#define EFI_ACPI_1_0_PWR_BUTTON BIT4
-#define EFI_ACPI_1_0_SLP_BUTTON BIT5
-#define EFI_ACPI_1_0_FIX_RTC BIT6
-#define EFI_ACPI_1_0_RTC_S4 BIT7
-#define EFI_ACPI_1_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_1_0_DCK_CAP BIT9
+#define EFI_ACPI_1_0_WBINVD BIT0
+#define EFI_ACPI_1_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_1_0_PROC_C1 BIT2
+#define EFI_ACPI_1_0_P_LVL2_UP BIT3
+#define EFI_ACPI_1_0_PWR_BUTTON BIT4
+#define EFI_ACPI_1_0_SLP_BUTTON BIT5
+#define EFI_ACPI_1_0_FIX_RTC BIT6
+#define EFI_ACPI_1_0_RTC_S4 BIT7
+#define EFI_ACPI_1_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_1_0_DCK_CAP BIT9
///
/// Firmware ACPI Control Structure.
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT8 Reserved[40];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT8 Reserved[40];
} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
/// Firmware Control Structure Feature Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_1_0_S4BIOS_F BIT0
+#define EFI_ACPI_1_0_S4BIOS_F BIT0
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform-specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 1.0b specification).
///
-#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_1_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_1_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -542,71 +547,71 @@ typedef struct {
/// Processor Local APIC Structure Definition.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 SystemVectorBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 SystemVectorBase;
} EFI_ACPI_1_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterruptVector;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterruptVector;
+ UINT16 Flags;
} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Non-Maskable Interrupt Source Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterruptVector;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterruptVector;
} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicInti;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicInti;
} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;
//
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi20.h b/src/include/ipxe/efi/IndustryStandard/Acpi20.h
index f5ff44c9c..ad28120b2 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi20.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi20.h
@@ -1,29 +1,23 @@
/** @file
ACPI 2.0 definitions from the ACPI Specification, revision 2.0
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_2_0_H_
#define _ACPI_2_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi10.h>
//
-// Define for Desriptor
+// Define for Descriptor
//
-#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02
+#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02
-#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82
+#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82
//
// Ensure proper structure formats
@@ -53,11 +47,11 @@ typedef PACKED struct {
/// ACPI 2.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 Reserved;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 Reserved;
+ UINT64 Address;
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
//
@@ -78,29 +72,29 @@ typedef struct {
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_2_0_COMMON_HEADER;
//
@@ -112,7 +106,7 @@ typedef struct {
///
/// RSDT Revision (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -123,64 +117,64 @@ typedef struct {
///
/// XSDT Revision (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT8 Reserved2[3];
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -191,53 +185,53 @@ typedef struct {
//
// Fixed ACPI Description Table Preferred Power Management Profile
//
-#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
-#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
-#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
-#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
-#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4
-#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
-#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
+#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
+#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
+#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
+#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
+#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4
+#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
+#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
//
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_2_0_8042 BIT1
+#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_2_0_8042 BIT1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_2_0_WBINVD BIT0
-#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_2_0_PROC_C1 BIT2
-#define EFI_ACPI_2_0_P_LVL2_UP BIT3
-#define EFI_ACPI_2_0_PWR_BUTTON BIT4
-#define EFI_ACPI_2_0_SLP_BUTTON BIT5
-#define EFI_ACPI_2_0_FIX_RTC BIT6
-#define EFI_ACPI_2_0_RTC_S4 BIT7
-#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_2_0_DCK_CAP BIT9
-#define EFI_ACPI_2_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_2_0_SEALED_CASE BIT11
-#define EFI_ACPI_2_0_HEADLESS BIT12
-#define EFI_ACPI_2_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_2_0_WBINVD BIT0
+#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_2_0_PROC_C1 BIT2
+#define EFI_ACPI_2_0_P_LVL2_UP BIT3
+#define EFI_ACPI_2_0_PWR_BUTTON BIT4
+#define EFI_ACPI_2_0_SLP_BUTTON BIT5
+#define EFI_ACPI_2_0_FIX_RTC BIT6
+#define EFI_ACPI_2_0_RTC_S4 BIT7
+#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_2_0_DCK_CAP BIT9
+#define EFI_ACPI_2_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_2_0_SEALED_CASE BIT11
+#define EFI_ACPI_2_0_HEADLESS BIT12
+#define EFI_ACPI_2_0_CPU_SW_SLP BIT13
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved[31];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved[31];
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -249,28 +243,28 @@ typedef struct {
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_2_0_S4BIOS_F BIT0
+#define EFI_ACPI_2_0_S4BIOS_F BIT0
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_2_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_2_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -295,127 +289,127 @@ typedef struct {
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
///
/// Local SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 Reserved;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 Reserved;
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -423,11 +417,11 @@ typedef struct {
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -513,7 +507,7 @@ typedef struct {
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi30.h b/src/include/ipxe/efi/IndustryStandard/Acpi30.h
index abaa72128..c7dfd5c7c 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi30.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi30.h
@@ -1,29 +1,23 @@
/** @file
ACPI 3.0 definitions from the ACPI Specification Revision 3.0b October 10, 2006
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_3_0_H_
#define _ACPI_3_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi20.h>
//
-// Define for Desriptor
+// Define for Descriptor
//
-#define ACPI_LARGE_EXTENDED_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0B
+#define ACPI_LARGE_EXTENDED_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0B
-#define ACPI_EXTENDED_ADDRESS_SPACE_DESCRIPTOR 0x8B
+#define ACPI_EXTENDED_ADDRESS_SPACE_DESCRIPTOR 0x8B
//
// Ensure proper structure formats
@@ -53,12 +47,12 @@ typedef PACKED struct {
//
// Memory Type Specific Flags
//
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UC 0x0000000000000001
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WC 0x0000000000000002
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WT 0x0000000000000004
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WB 0x0000000000000008
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UCE 0x0000000000000010
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_NV 0x0000000000008000
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UC 0x0000000000000001
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WC 0x0000000000000002
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WT 0x0000000000000004
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WB 0x0000000000000008
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UCE 0x0000000000000010
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_NV 0x0000000000008000
//
// Ensure proper structure formats
@@ -69,11 +63,11 @@ typedef PACKED struct {
/// ACPI 3.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE;
//
@@ -103,29 +97,29 @@ typedef struct {
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 3.0b spec.)
///
-#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 3.0b) says current value is 2
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 3.0b) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_3_0_COMMON_HEADER;
//
@@ -137,7 +131,7 @@ typedef struct {
///
/// RSDT Revision (as defined in ACPI 3.0 spec.)
///
-#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -148,64 +142,64 @@ typedef struct {
///
/// XSDT Revision (as defined in ACPI 3.0 spec.)
///
-#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT8 Reserved2[3];
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
} EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -229,50 +223,50 @@ typedef struct {
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_3_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_3_0_8042 BIT1
-#define EFI_ACPI_3_0_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_3_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_3_0_8042 BIT1
+#define EFI_ACPI_3_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS BIT4
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_3_0_WBINVD BIT0
-#define EFI_ACPI_3_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_3_0_PROC_C1 BIT2
-#define EFI_ACPI_3_0_P_LVL2_UP BIT3
-#define EFI_ACPI_3_0_PWR_BUTTON BIT4
-#define EFI_ACPI_3_0_SLP_BUTTON BIT5
-#define EFI_ACPI_3_0_FIX_RTC BIT6
-#define EFI_ACPI_3_0_RTC_S4 BIT7
-#define EFI_ACPI_3_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_3_0_DCK_CAP BIT9
-#define EFI_ACPI_3_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_3_0_SEALED_CASE BIT11
-#define EFI_ACPI_3_0_HEADLESS BIT12
-#define EFI_ACPI_3_0_CPU_SW_SLP BIT13
-#define EFI_ACPI_3_0_PCI_EXP_WAK BIT14
-#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_3_0_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_3_0_WBINVD BIT0
+#define EFI_ACPI_3_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_3_0_PROC_C1 BIT2
+#define EFI_ACPI_3_0_P_LVL2_UP BIT3
+#define EFI_ACPI_3_0_PWR_BUTTON BIT4
+#define EFI_ACPI_3_0_SLP_BUTTON BIT5
+#define EFI_ACPI_3_0_FIX_RTC BIT6
+#define EFI_ACPI_3_0_RTC_S4 BIT7
+#define EFI_ACPI_3_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_3_0_DCK_CAP BIT9
+#define EFI_ACPI_3_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_3_0_SEALED_CASE BIT11
+#define EFI_ACPI_3_0_HEADLESS BIT12
+#define EFI_ACPI_3_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_3_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_3_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved[31];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved[31];
} EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -284,7 +278,7 @@ typedef struct {
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_3_0_S4BIOS_F BIT0
+#define EFI_ACPI_3_0_S4BIOS_F BIT0
//
// Differentiated System Description Table,
@@ -293,29 +287,29 @@ typedef struct {
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 3.0 spec.)
///
-#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_3_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_3_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -340,57 +334,57 @@ typedef struct {
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_3_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_3_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -404,43 +398,43 @@ typedef struct {
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_3_0_IO_SAPIC_STRUCTURE;
///
@@ -448,51 +442,51 @@ typedef struct {
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_3_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 3.0 spec.)
///
-#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -500,11 +494,11 @@ typedef struct {
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -517,9 +511,9 @@ typedef struct {
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -539,52 +533,52 @@ typedef struct {
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT8 Reserved[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT8 Reserved[4];
} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_3_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_3_0_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_3_0_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_3_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_3_0_MEMORY_NONVOLATILE (1 << 2)
///
/// System Locality Distance Information Table (SLIT).
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -692,7 +686,7 @@ typedef struct {
#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi40.h b/src/include/ipxe/efi/IndustryStandard/Acpi40.h
index 5fcad3e42..f6c70d74a 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi40.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi40.h
@@ -1,20 +1,14 @@
/** @file
ACPI 4.0 definitions from the ACPI Specification Revision 4.0a April 5, 2010
- Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2010 - 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_4_0_H_
#define _ACPI_4_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi30.h>
@@ -27,11 +21,11 @@ FILE_LICENCE ( BSD3 );
/// ACPI 4.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE;
//
@@ -61,29 +55,29 @@ typedef struct {
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 4.0b spec.)
///
-#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 4.0a) says current value is 2
+#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 4.0a) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_4_0_COMMON_HEADER;
//
@@ -95,7 +89,7 @@ typedef struct {
///
/// RSDT Revision (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -106,64 +100,64 @@ typedef struct {
///
/// XSDT Revision (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT8 Reserved2[3];
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
} EFI_ACPI_4_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -187,52 +181,52 @@ typedef struct {
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_4_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_4_0_8042 BIT1
-#define EFI_ACPI_4_0_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_4_0_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_4_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_4_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_4_0_8042 BIT1
+#define EFI_ACPI_4_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_4_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_4_0_PCIE_ASPM_CONTROLS BIT4
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_4_0_WBINVD BIT0
-#define EFI_ACPI_4_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_4_0_PROC_C1 BIT2
-#define EFI_ACPI_4_0_P_LVL2_UP BIT3
-#define EFI_ACPI_4_0_PWR_BUTTON BIT4
-#define EFI_ACPI_4_0_SLP_BUTTON BIT5
-#define EFI_ACPI_4_0_FIX_RTC BIT6
-#define EFI_ACPI_4_0_RTC_S4 BIT7
-#define EFI_ACPI_4_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_4_0_DCK_CAP BIT9
-#define EFI_ACPI_4_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_4_0_SEALED_CASE BIT11
-#define EFI_ACPI_4_0_HEADLESS BIT12
-#define EFI_ACPI_4_0_CPU_SW_SLP BIT13
-#define EFI_ACPI_4_0_PCI_EXP_WAK BIT14
-#define EFI_ACPI_4_0_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_4_0_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_4_0_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_4_0_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_4_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_4_0_WBINVD BIT0
+#define EFI_ACPI_4_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_4_0_PROC_C1 BIT2
+#define EFI_ACPI_4_0_P_LVL2_UP BIT3
+#define EFI_ACPI_4_0_PWR_BUTTON BIT4
+#define EFI_ACPI_4_0_SLP_BUTTON BIT5
+#define EFI_ACPI_4_0_FIX_RTC BIT6
+#define EFI_ACPI_4_0_RTC_S4 BIT7
+#define EFI_ACPI_4_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_4_0_DCK_CAP BIT9
+#define EFI_ACPI_4_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_4_0_SEALED_CASE BIT11
+#define EFI_ACPI_4_0_HEADLESS BIT12
+#define EFI_ACPI_4_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_4_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_4_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_4_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_4_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_4_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_4_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved0[3];
- UINT32 OspmFlags;
- UINT8 Reserved1[24];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
} EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -244,14 +238,14 @@ typedef struct {
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_4_0_S4BIOS_F BIT0
-#define EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F BIT1
+#define EFI_ACPI_4_0_S4BIOS_F BIT0
+#define EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F BIT1
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_4_0_OSPM_64BIT_WAKE__F BIT0
+#define EFI_ACPI_4_0_OSPM_64BIT_WAKE__F BIT0
//
// Differentiated System Description Table,
@@ -260,29 +254,29 @@ typedef struct {
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_4_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_4_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_4_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_4_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+#define EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_4_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_4_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -309,57 +303,57 @@ typedef struct {
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_4_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_4_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_4_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_4_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -373,43 +367,43 @@ typedef struct {
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_4_0_IO_SAPIC_STRUCTURE;
///
@@ -417,75 +411,75 @@ typedef struct {
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_4_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_4_0_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_4_0_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[2];
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 AcpiProcessorUid;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
} EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
///
/// Local x2APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 AcpiProcessorUid;
- UINT8 LocalX2ApicLint;
- UINT8 Reserved[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
} EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -493,11 +487,11 @@ typedef struct {
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_4_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -510,9 +504,9 @@ typedef struct {
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_4_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -533,57 +527,57 @@ typedef struct {
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
} EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_4_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_4_0_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_4_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_4_0_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_4_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_4_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_4_0_MEMORY_NONVOLATILE (1 << 2)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved1[2];
- UINT32 ProximityDomain;
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 ClockDomain;
- UINT8 Reserved2[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
} EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
///
@@ -591,8 +585,8 @@ typedef struct {
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_4_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -604,14 +598,14 @@ typedef struct {
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 Reserved[8];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
} EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
///
/// CPEP Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
//
// CPEP processor structure types.
@@ -622,82 +616,83 @@ typedef struct {
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT32 PollingInterval;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
} EFI_ACPI_4_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 OffsetProxDomInfo;
- UINT32 MaximumNumberOfProximityDomains;
- UINT32 MaximumNumberOfClockDomains;
- UINT64 MaximumPhysicalAddress;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
} EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
///
/// MSCT Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
- UINT8 Revision;
- UINT8 Length;
- UINT32 ProximityDomainRangeLow;
- UINT32 ProximityDomainRangeHigh;
- UINT32 MaximumProcessorCapacity;
- UINT64 MaximumMemoryCapacity;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
} EFI_ACPI_4_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
///
/// Boot Error Record Table (BERT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 BootErrorRegionLength;
- UINT64 BootErrorRegion;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
} EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_HEADER;
///
/// BERT Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
- UINT32 UncorrectableErrorValid:1;
- UINT32 CorrectableErrorValid:1;
- UINT32 MultipleUncorrectableErrors:1;
- UINT32 MultipleCorrectableErrors:1;
- UINT32 ErrorDataEntryCount:10;
- UINT32 Reserved:18;
+ UINT32 UncorrectableErrorValid : 1;
+ UINT32 CorrectableErrorValid : 1;
+ UINT32 MultipleUncorrectableErrors : 1;
+ UINT32 MultipleCorrectableErrors : 1;
+ UINT32 ErrorDataEntryCount : 10;
+ UINT32 Reserved : 18;
} EFI_ACPI_4_0_ERROR_BLOCK_STATUS;
///
/// Boot Error Region Definition
///
typedef struct {
- EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_4_0_BOOT_ERROR_REGION_STRUCTURE;
//
// Boot Error Severity types
//
#define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_4_0_ERROR_SEVERITY_RECOVERABLE 0x00
#define EFI_ACPI_4_0_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_4_0_ERROR_SEVERITY_NONE 0x03
@@ -706,14 +701,14 @@ typedef struct {
/// Generic Error Data Entry Definition
///
typedef struct {
- UINT8 SectionType[16];
- UINT32 ErrorSeverity;
- UINT16 Revision;
- UINT8 ValidationBits;
- UINT8 Flags;
- UINT32 ErrorDataLength;
- UINT8 FruId[16];
- UINT8 FruText[20];
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
} EFI_ACPI_4_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
///
@@ -725,14 +720,14 @@ typedef struct {
/// HEST - Hardware Error Source Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 ErrorSourceCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
} EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
///
/// HEST Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
@@ -748,383 +743,383 @@ typedef struct {
//
// Error Source structure flags.
//
-#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
-#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT64 GlobalCapabilityInitData;
- UINT64 GlobalControlInitData;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[7];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
} EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
- UINT8 BankNumber;
- UINT8 ClearStatusOnInitialization;
- UINT8 StatusDataFormat;
- UINT8 Reserved0;
- UINT32 ControlRegisterMsrAddress;
- UINT64 ControlInitData;
- UINT32 StatusRegisterMsrAddress;
- UINT32 AddressRegisterMsrAddress;
- UINT32 MiscRegisterMsrAddress;
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
} EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
-#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
-#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
-#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
//
// Hardware Error Notification types. All other values are reserved
//
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
- UINT16 Type:1;
- UINT16 PollInterval:1;
- UINT16 SwitchToPollingThresholdValue:1;
- UINT16 SwitchToPollingThresholdWindow:1;
- UINT16 ErrorThresholdValue:1;
- UINT16 ErrorThresholdWindow:1;
- UINT16 Reserved:10;
+ UINT16 Type : 1;
+ UINT16 PollInterval : 1;
+ UINT16 SwitchToPollingThresholdValue : 1;
+ UINT16 SwitchToPollingThresholdWindow : 1;
+ UINT16 ErrorThresholdValue : 1;
+ UINT16 ErrorThresholdWindow : 1;
+ UINT16 Reserved : 10;
} EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
- UINT32 PollInterval;
- UINT32 Vector;
- UINT32 SwitchToPollingThresholdValue;
- UINT32 SwitchToPollingThresholdWindow;
- UINT32 ErrorThresholdValue;
- UINT32 ErrorThresholdWindow;
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
} EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[3];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
} EFI_ACPI_4_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
} EFI_ACPI_4_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 RootErrorCommand;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
} EFI_ACPI_4_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_4_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 SecondaryUncorrectableErrorMask;
- UINT32 SecondaryUncorrectableErrorSeverity;
- UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_4_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT16 RelatedSourceId;
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
- EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT32 ErrorStatusBlockLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
} EFI_ACPI_4_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
///
/// Generic Error Status Definition
///
typedef struct {
- EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_4_0_GENERIC_ERROR_STATUS_STRUCTURE;
///
/// ERST - Error Record Serialization Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 SerializationHeaderSize;
- UINT8 Reserved0[4];
- UINT32 InstructionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
} EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
///
/// ERST Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
///
/// ERST Serialization Actions
///
-#define EFI_ACPI_4_0_ERST_BEGIN_WRITE_OPERATION 0x00
-#define EFI_ACPI_4_0_ERST_BEGIN_READ_OPERATION 0x01
-#define EFI_ACPI_4_0_ERST_BEGIN_CLEAR_OPERATION 0x02
-#define EFI_ACPI_4_0_ERST_END_OPERATION 0x03
-#define EFI_ACPI_4_0_ERST_SET_RECORD_OFFSET 0x04
-#define EFI_ACPI_4_0_ERST_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_4_0_ERST_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_4_0_ERST_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_4_0_ERST_GET_RECORD_IDENTIFIER 0x08
-#define EFI_ACPI_4_0_ERST_SET_RECORD_IDENTIFIER 0x09
-#define EFI_ACPI_4_0_ERST_GET_RECORD_COUNT 0x0A
-#define EFI_ACPI_4_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
-#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
-#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
-#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+#define EFI_ACPI_4_0_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_4_0_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_4_0_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_4_0_ERST_END_OPERATION 0x03
+#define EFI_ACPI_4_0_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_4_0_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_4_0_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_4_0_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_4_0_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_4_0_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_4_0_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_4_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
///
/// ERST Action Command Status
///
-#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_4_0_EINJ_STATUS_NOT_ENOUGH_SPACE 0x01
-#define EFI_ACPI_4_0_EINJ_STATUS_HARDWARE_NOT_AVAILABLE 0x02
-#define EFI_ACPI_4_0_EINJ_STATUS_FAILED 0x03
-#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_STORE_EMPTY 0x04
-#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_NOT_FOUND 0x05
+#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_4_0_EINJ_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_4_0_EINJ_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_4_0_EINJ_STATUS_FAILED 0x03
+#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
-#define EFI_ACPI_4_0_ERST_READ_REGISTER 0x00
-#define EFI_ACPI_4_0_ERST_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_4_0_ERST_WRITE_REGISTER 0x02
-#define EFI_ACPI_4_0_ERST_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_4_0_ERST_NOOP 0x04
-#define EFI_ACPI_4_0_ERST_LOAD_VAR1 0x05
-#define EFI_ACPI_4_0_ERST_LOAD_VAR2 0x06
-#define EFI_ACPI_4_0_ERST_STORE_VAR1 0x07
-#define EFI_ACPI_4_0_ERST_ADD 0x08
-#define EFI_ACPI_4_0_ERST_SUBTRACT 0x09
-#define EFI_ACPI_4_0_ERST_ADD_VALUE 0x0A
-#define EFI_ACPI_4_0_ERST_SUBTRACT_VALUE 0x0B
-#define EFI_ACPI_4_0_ERST_STALL 0x0C
-#define EFI_ACPI_4_0_ERST_STALL_WHILE_TRUE 0x0D
-#define EFI_ACPI_4_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
-#define EFI_ACPI_4_0_ERST_GOTO 0x0F
-#define EFI_ACPI_4_0_ERST_SET_SRC_ADDRESS_BASE 0x10
-#define EFI_ACPI_4_0_ERST_SET_DST_ADDRESS_BASE 0x11
-#define EFI_ACPI_4_0_ERST_MOVE_DATA 0x12
+#define EFI_ACPI_4_0_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_4_0_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_4_0_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_4_0_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_4_0_ERST_NOOP 0x04
+#define EFI_ACPI_4_0_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_4_0_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_4_0_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_4_0_ERST_ADD 0x08
+#define EFI_ACPI_4_0_ERST_SUBTRACT 0x09
+#define EFI_ACPI_4_0_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_4_0_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_4_0_ERST_STALL 0x0C
+#define EFI_ACPI_4_0_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_4_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_4_0_ERST_GOTO 0x0F
+#define EFI_ACPI_4_0_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_4_0_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_4_0_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
-#define EFI_ACPI_4_0_ERST_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_4_0_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
- UINT8 SerializationAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_4_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
///
/// EINJ - Error Injection Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 InjectionHeaderSize;
- UINT8 InjectionFlags;
- UINT8 Reserved0[3];
- UINT32 InjectionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
} EFI_ACPI_4_0_ERROR_INJECTION_TABLE_HEADER;
///
/// EINJ Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_ERROR_INJECTION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
-#define EFI_ACPI_4_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
-#define EFI_ACPI_4_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
-#define EFI_ACPI_4_0_EINJ_SET_ERROR_TYPE 0x02
-#define EFI_ACPI_4_0_EINJ_GET_ERROR_TYPE 0x03
-#define EFI_ACPI_4_0_EINJ_END_OPERATION 0x04
-#define EFI_ACPI_4_0_EINJ_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_4_0_EINJ_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_4_0_EINJ_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_4_0_EINJ_TRIGGER_ERROR 0xFF
+#define EFI_ACPI_4_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_4_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_4_0_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_4_0_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_4_0_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_4_0_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_4_0_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_4_0_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_4_0_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
-#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_4_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
-#define EFI_ACPI_4_0_EINJ_STATUS_INVALID_ACCESS 0x02
+#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_4_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_4_0_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
-#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
-#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
-#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
-#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
-#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
-#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
-#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
-#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
-#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
-#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
-#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
-#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
///
/// EINJ Injection Instructions
///
-#define EFI_ACPI_4_0_EINJ_READ_REGISTER 0x00
-#define EFI_ACPI_4_0_EINJ_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER 0x02
-#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_4_0_EINJ_NOOP 0x04
+#define EFI_ACPI_4_0_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_4_0_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_4_0_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
-#define EFI_ACPI_4_0_EINJ_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_4_0_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
- UINT8 InjectionAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_4_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
///
/// EINJ Trigger Action Table
///
typedef struct {
- UINT32 HeaderSize;
- UINT32 Revision;
- UINT32 TableSize;
- UINT32 EntryCount;
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
} EFI_ACPI_4_0_EINJ_TRIGGER_ACTION_TABLE;
//
@@ -1272,7 +1267,7 @@ typedef struct {
#define EFI_ACPI_4_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_4_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi50.h b/src/include/ipxe/efi/IndustryStandard/Acpi50.h
index df9e71531..7d57b9ff9 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi50.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi50.h
@@ -2,33 +2,28 @@
ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.
Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
- Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_5_0_H_
#define _ACPI_5_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi40.h>
//
-// Define for Desriptor
+// Define for Descriptor
//
-#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
-#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
-#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
+#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
+#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
+#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
-#define ACPI_FIXED_DMA_DESCRIPTOR 0x55
-#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
-#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
+#define ACPI_FIXED_DMA_DESCRIPTOR 0x55
+#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
+#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
#pragma pack(1)
@@ -36,10 +31,10 @@ FILE_LICENCE ( BSD3 );
/// Generic DMA Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT16 DmaRequestLine;
- UINT16 DmaChannel;
- UINT8 DmaTransferWidth;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 DmaRequestLine;
+ UINT16 DmaChannel;
+ UINT8 DmaTransferWidth;
} EFI_ACPI_FIXED_DMA_DESCRIPTOR;
///
@@ -61,8 +56,8 @@ typedef PACKED struct {
UINT16 VendorDataLength;
} EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;
-#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
-#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
+#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
+#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
///
/// Serial Bus Resource Descriptor (Generic)
@@ -76,7 +71,7 @@ typedef PACKED struct {
UINT16 TypeSpecificFlags;
UINT8 TypeSpecificRevisionId;
UINT16 TypeDataLength;
-// Type specific data
+ // Type specific data
} EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;
#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
@@ -148,21 +143,21 @@ typedef PACKED struct {
/// ACPI 5.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;
//
// Generic Address Space Address IDs
//
-#define EFI_ACPI_5_0_SYSTEM_MEMORY 0
-#define EFI_ACPI_5_0_SYSTEM_IO 1
-#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
-#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
-#define EFI_ACPI_5_0_SMBUS 4
+#define EFI_ACPI_5_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_5_0_SYSTEM_IO 1
+#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_5_0_SMBUS 4
#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
#define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
@@ -183,29 +178,29 @@ typedef struct {
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
+#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_5_0_COMMON_HEADER;
//
@@ -217,7 +212,7 @@ typedef struct {
///
/// RSDT Revision (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -228,66 +223,66 @@ typedef struct {
///
/// XSDT Revision (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT8 Reserved2[3];
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
} EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -312,55 +307,55 @@ typedef struct {
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_5_0_8042 BIT1
-#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
-#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
+#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_5_0_8042 BIT1
+#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_0_WBINVD BIT0
-#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_5_0_PROC_C1 BIT2
-#define EFI_ACPI_5_0_P_LVL2_UP BIT3
-#define EFI_ACPI_5_0_PWR_BUTTON BIT4
-#define EFI_ACPI_5_0_SLP_BUTTON BIT5
-#define EFI_ACPI_5_0_FIX_RTC BIT6
-#define EFI_ACPI_5_0_RTC_S4 BIT7
-#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_5_0_DCK_CAP BIT9
-#define EFI_ACPI_5_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_5_0_SEALED_CASE BIT11
-#define EFI_ACPI_5_0_HEADLESS BIT12
-#define EFI_ACPI_5_0_CPU_SW_SLP BIT13
-#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
-#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
-#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
-#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
+#define EFI_ACPI_5_0_WBINVD BIT0
+#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_5_0_PROC_C1 BIT2
+#define EFI_ACPI_5_0_P_LVL2_UP BIT3
+#define EFI_ACPI_5_0_PWR_BUTTON BIT4
+#define EFI_ACPI_5_0_SLP_BUTTON BIT5
+#define EFI_ACPI_5_0_FIX_RTC BIT6
+#define EFI_ACPI_5_0_RTC_S4 BIT7
+#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_5_0_DCK_CAP BIT9
+#define EFI_ACPI_5_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_5_0_SEALED_CASE BIT11
+#define EFI_ACPI_5_0_HEADLESS BIT12
+#define EFI_ACPI_5_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved0[3];
- UINT32 OspmFlags;
- UINT8 Reserved1[24];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
} EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -372,14 +367,14 @@ typedef struct {
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_0_S4BIOS_F BIT0
-#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
+#define EFI_ACPI_5_0_S4BIOS_F BIT0
+#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
+#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
//
// Differentiated System Description Table,
@@ -388,29 +383,29 @@ typedef struct {
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_5_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -439,57 +434,57 @@ typedef struct {
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_5_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -503,43 +498,43 @@ typedef struct {
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;
///
@@ -547,110 +542,110 @@ typedef struct {
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[2];
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 AcpiProcessorUid;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
///
/// Local x2APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 AcpiProcessorUid;
- UINT8 LocalX2ApicLint;
- UINT8 Reserved[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
} EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;
///
/// GIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT32 GicId;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ParkingProtocolVersion;
- UINT32 PerformanceInterruptGsiv;
- UINT64 ParkedAddress;
- UINT64 PhysicalBaseAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 GicId;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ParkingProtocolVersion;
+ UINT32 PerformanceInterruptGsiv;
+ UINT64 ParkedAddress;
+ UINT64 PhysicalBaseAddress;
} EFI_ACPI_5_0_GIC_STRUCTURE;
///
/// GIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_GIC_ENABLED BIT0
-#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
+#define EFI_ACPI_5_0_GIC_ENABLED BIT0
+#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
///
/// GIC Distributor Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicId;
- UINT64 PhysicalBaseAddress;
- UINT32 SystemVectorBase;
- UINT32 Reserved2;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 SystemVectorBase;
+ UINT32 Reserved2;
} EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -658,11 +653,11 @@ typedef struct {
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -675,9 +670,9 @@ typedef struct {
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -698,57 +693,57 @@ typedef struct {
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved1[2];
- UINT32 ProximityDomain;
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 ClockDomain;
- UINT8 Reserved2[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
///
@@ -756,8 +751,8 @@ typedef struct {
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -769,14 +764,14 @@ typedef struct {
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 Reserved[8];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
} EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
///
/// CPEP Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
//
// CPEP processor structure types.
@@ -787,66 +782,66 @@ typedef struct {
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT32 PollingInterval;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
} EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 OffsetProxDomInfo;
- UINT32 MaximumNumberOfProximityDomains;
- UINT32 MaximumNumberOfClockDomains;
- UINT64 MaximumPhysicalAddress;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
} EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
///
/// MSCT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
- UINT8 Revision;
- UINT8 Length;
- UINT32 ProximityDomainRangeLow;
- UINT32 ProximityDomainRangeHigh;
- UINT32 MaximumProcessorCapacity;
- UINT64 MaximumMemoryCapacity;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
} EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
///
/// ACPI RAS Feature Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier[12];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier[12];
} EFI_ACPI_5_0_RAS_FEATURE_TABLE;
///
/// RASF Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
///
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT16 Version;
- UINT8 RASCapabilities[16];
- UINT8 SetRASCapabilities[16];
- UINT16 NumberOfRASFParameterBlocks;
- UINT32 SetRASCapabilitiesStatus;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 RASCapabilities[16];
+ UINT8 SetRASCapabilities[16];
+ UINT16 NumberOfRASFParameterBlocks;
+ UINT32 SetRASCapabilitiesStatus;
} EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -864,52 +859,52 @@ typedef struct {
/// ACPI RASF Parameter Block structure for PATROL_SCRUB
///
typedef struct {
- UINT16 Type;
- UINT16 Version;
- UINT16 Length;
- UINT16 PatrolScrubCommand;
- UINT64 RequestedAddressRange[2];
- UINT64 ActualAddressRange[2];
- UINT16 Flags;
- UINT8 RequestedSpeed;
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
} EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
///
/// ACPI RASF Patrol Scrub command
///
-#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
-#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
-#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
///
/// Memory Power State Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier;
- UINT8 Reserved[3];
-// Memory Power Node Structure
-// Memory Power State Characteristics
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier;
+ UINT8 Reserved[3];
+ // Memory Power Node Structure
+ // Memory Power State Characteristics
} EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;
///
/// MPST Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
///
/// MPST Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT32 MemoryPowerCommandRegister;
- UINT32 MemoryPowerStatusRegister;
- UINT32 PowerStateId;
- UINT32 MemoryPowerNodeId;
- UINT64 MemoryEnergyConsumed;
- UINT64 ExpectedAveragePowerComsuned;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT32 MemoryPowerCommandRegister;
+ UINT32 MemoryPowerStatusRegister;
+ UINT32 PowerStateId;
+ UINT32 MemoryPowerNodeId;
+ UINT64 MemoryEnergyConsumed;
+ UINT64 ExpectedAveragePowerComsuned;
} EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -920,188 +915,188 @@ typedef struct {
///
/// ACPI MPST Memory Power command
///
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
///
/// MPST Memory Power Node Table
///
typedef struct {
- UINT8 PowerStateValue;
- UINT8 PowerStateInformationIndex;
+ UINT8 PowerStateValue;
+ UINT8 PowerStateInformationIndex;
} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;
typedef struct {
- UINT8 Flag;
- UINT8 Reserved;
- UINT16 MemoryPowerNodeId;
- UINT32 Length;
- UINT64 AddressBase;
- UINT64 AddressLength;
- UINT32 NumberOfPowerStates;
- UINT32 NumberOfPhysicalComponents;
-//EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
-//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
+ UINT8 Flag;
+ UINT8 Reserved;
+ UINT16 MemoryPowerNodeId;
+ UINT32 Length;
+ UINT64 AddressBase;
+ UINT64 AddressLength;
+ UINT32 NumberOfPowerStates;
+ UINT32 NumberOfPhysicalComponents;
+ // EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
+ // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
} EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
typedef struct {
- UINT16 MemoryPowerNodeCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerNodeCount;
+ UINT8 Reserved[2];
} EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;
///
/// MPST Memory Power State Characteristics Table
///
typedef struct {
- UINT8 PowerStateStructureID;
- UINT8 Flag;
- UINT16 Reserved;
- UINT32 AveragePowerConsumedInMPS0;
- UINT32 RelativePowerSavingToMPS0;
- UINT64 ExitLatencyToMPS0;
+ UINT8 PowerStateStructureID;
+ UINT8 Flag;
+ UINT16 Reserved;
+ UINT32 AveragePowerConsumedInMPS0;
+ UINT32 RelativePowerSavingToMPS0;
+ UINT64 ExitLatencyToMPS0;
} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
typedef struct {
- UINT16 MemoryPowerStateCharacteristicsCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerStateCharacteristicsCount;
+ UINT8 Reserved[2];
} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
///
/// Memory Topology Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved;
} EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;
///
/// PMTT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
///
/// Common Memory Aggregator Device Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Reserved;
- UINT16 Length;
- UINT16 Flags;
- UINT16 Reserved1;
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved1;
} EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Memory Aggregator Device Type
///
-#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
-#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
-#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2
///
/// Socket Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 SocketIdentifier;
- UINT16 Reserved;
-//EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 SocketIdentifier;
+ UINT16 Reserved;
+ // EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
} EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// MemoryController Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT32 ReadLatency;
- UINT32 WriteLatency;
- UINT32 ReadBandwidth;
- UINT32 WriteBandwidth;
- UINT16 OptimalAccessUnit;
- UINT16 OptimalAccessAlignment;
- UINT16 Reserved;
- UINT16 NumberOfProximityDomains;
-//UINT32 ProximityDomain[NumberOfProximityDomains];
-//EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 OptimalAccessUnit;
+ UINT16 OptimalAccessAlignment;
+ UINT16 Reserved;
+ UINT16 NumberOfProximityDomains;
+ // UINT32 ProximityDomain[NumberOfProximityDomains];
+ // EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
} EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// DIMM Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 PhysicalComponentIdentifier;
- UINT16 Reserved;
- UINT32 SizeOfDimm;
- UINT32 SmbiosHandle;
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 PhysicalComponentIdentifier;
+ UINT16 Reserved;
+ UINT32 SizeOfDimm;
+ UINT32 SmbiosHandle;
} EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Boot Graphics Resource Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
///
/// 2-bytes (16 bit) version ID. This value must be 1.
///
- UINT16 Version;
+ UINT16 Version;
///
/// 1-byte status field indicating current status about the table.
/// Bits[7:1] = Reserved (must be zero)
/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
///
- UINT8 Status;
+ UINT8 Status;
///
/// 1-byte enumerated type field indicating format of the image.
/// 0 = Bitmap
/// 1 - 255 Reserved (for future use)
///
- UINT8 ImageType;
+ UINT8 ImageType;
///
/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
/// of the image bitmap.
///
- UINT64 ImageAddress;
+ UINT64 ImageAddress;
///
/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetX;
+ UINT32 ImageOffsetX;
///
/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetY;
+ UINT32 ImageOffsetY;
} EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;
///
/// BGRT Revision
///
-#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
+#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
///
/// BGRT Version
///
-#define EFI_ACPI_5_0_BGRT_VERSION 0x01
+#define EFI_ACPI_5_0_BGRT_VERSION 0x01
///
/// BGRT Status
///
-#define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
-#define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
-#define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
-#define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
+#define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
+#define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
+#define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
+#define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
///
/// BGRT Image Type
@@ -1111,26 +1106,26 @@ typedef struct {
///
/// FPDT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
///
/// FPDT Performance Record Types
///
-#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
-#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
+#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
+#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
///
/// FPDT Performance Record Revision
///
-#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
-#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
+#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
+#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
///
/// FPDT Runtime Performance Record Types
///
-#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
-#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
-#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
///
/// FPDT Runtime Performance Record Revision
@@ -1143,77 +1138,77 @@ typedef struct {
/// FPDT Performance Record header
///
typedef struct {
- UINT16 Type;
- UINT8 Length;
- UINT8 Revision;
+ UINT16 Type;
+ UINT8 Length;
+ UINT8 Revision;
} EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;
///
/// FPDT Performance Table header
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;
///
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
///
- UINT64 BootPerformanceTablePointer;
+ UINT64 BootPerformanceTablePointer;
} EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT S3 Performance Table Pointer Record Structure
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the S3 Performance Table.
///
- UINT64 S3PerformanceTablePointer;
+ UINT64 S3PerformanceTablePointer;
} EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT Firmware Basic Boot Performance Record Structure
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// Timer value logged at the beginning of firmware image execution.
/// This may not always be zero or near zero.
///
- UINT64 ResetEnd;
+ UINT64 ResetEnd;
///
/// Timer value logged just prior to loading the OS boot loader into memory.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 OsLoaderLoadImageStart;
+ UINT64 OsLoaderLoadImageStart;
///
/// Timer value logged just prior to launching the previously loaded OS boot loader image.
/// For non-UEFI compatible boots, the timer value logged will be just prior
/// to the INT 19h handler invocation.
///
- UINT64 OsLoaderStartImageStart;
+ UINT64 OsLoaderStartImageStart;
///
/// Timer value logged at the point when the OS loader calls the
/// ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesEntry;
+ UINT64 ExitBootServicesEntry;
///
- /// Timer value logged at the point just prior towhen the OS loader gaining
+ /// Timer value logged at the point just prior to when the OS loader gaining
/// control back from calls the ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesExit;
+ UINT64 ExitBootServicesExit;
} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
///
@@ -1225,7 +1220,7 @@ typedef struct {
// FPDT Firmware Basic Boot Performance Table
//
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1240,7 +1235,7 @@ typedef struct {
// FPDT Firmware S3 Boot Performance Table
//
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1250,124 +1245,125 @@ typedef struct {
/// FPDT Basic S3 Resume Performance Record
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// A count of the number of S3 resume cycles since the last full boot sequence.
///
- UINT32 ResumeCount;
+ UINT32 ResumeCount;
///
/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
/// OS waking vector. Only the most recent resume cycle's time is retained.
///
- UINT64 FullResume;
+ UINT64 FullResume;
///
/// Average timer value of all resume cycles logged since the last full boot
/// sequence, including the most recent resume. Note that the entire log of
/// timer values does not need to be retained in order to calculate this average.
///
- UINT64 AverageResume;
+ UINT64 AverageResume;
} EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;
///
/// FPDT Basic S3 Suspend Performance Record
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendStart;
+ UINT64 SuspendStart;
///
/// Timer value recorded at the final firmware write to SLP_TYP (or other
/// mechanism) used to trigger hardware entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendEnd;
+ UINT64 SuspendEnd;
} EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;
///
/// Firmware Performance Record Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
} EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
///
/// Generic Timer Description Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 PhysicalAddress;
- UINT32 GlobalFlags;
- UINT32 SecurePL1TimerGSIV;
- UINT32 SecurePL1TimerFlags;
- UINT32 NonSecurePL1TimerGSIV;
- UINT32 NonSecurePL1TimerFlags;
- UINT32 VirtualTimerGSIV;
- UINT32 VirtualTimerFlags;
- UINT32 NonSecurePL2TimerGSIV;
- UINT32 NonSecurePL2TimerFlags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 PhysicalAddress;
+ UINT32 GlobalFlags;
+ UINT32 SecurePL1TimerGSIV;
+ UINT32 SecurePL1TimerFlags;
+ UINT32 NonSecurePL1TimerGSIV;
+ UINT32 NonSecurePL1TimerFlags;
+ UINT32 VirtualTimerGSIV;
+ UINT32 VirtualTimerFlags;
+ UINT32 NonSecurePL2TimerGSIV;
+ UINT32 NonSecurePL2TimerFlags;
} EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;
///
/// GTDT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
///
/// Global Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
-#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
+#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
+#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
///
/// Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
///
/// Boot Error Record Table (BERT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 BootErrorRegionLength;
- UINT64 BootErrorRegion;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
} EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;
///
/// BERT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
- UINT32 UncorrectableErrorValid:1;
- UINT32 CorrectableErrorValid:1;
- UINT32 MultipleUncorrectableErrors:1;
- UINT32 MultipleCorrectableErrors:1;
- UINT32 ErrorDataEntryCount:10;
- UINT32 Reserved:18;
+ UINT32 UncorrectableErrorValid : 1;
+ UINT32 CorrectableErrorValid : 1;
+ UINT32 MultipleUncorrectableErrors : 1;
+ UINT32 MultipleCorrectableErrors : 1;
+ UINT32 ErrorDataEntryCount : 10;
+ UINT32 Reserved : 18;
} EFI_ACPI_5_0_ERROR_BLOCK_STATUS;
///
/// Boot Error Region Definition
///
typedef struct {
- EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;
//
// Boot Error Severity types
//
#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_5_0_ERROR_SEVERITY_RECOVERABLE 0x00
#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
@@ -1376,14 +1372,14 @@ typedef struct {
/// Generic Error Data Entry Definition
///
typedef struct {
- UINT8 SectionType[16];
- UINT32 ErrorSeverity;
- UINT16 Revision;
- UINT8 ValidationBits;
- UINT8 Flags;
- UINT32 ErrorDataLength;
- UINT8 FruId[16];
- UINT8 FruText[20];
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
} EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
///
@@ -1395,14 +1391,14 @@ typedef struct {
/// HEST - Hardware Error Source Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 ErrorSourceCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
} EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
///
/// HEST Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
@@ -1418,403 +1414,403 @@ typedef struct {
//
// Error Source structure flags.
//
-#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
-#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT64 GlobalCapabilityInitData;
- UINT64 GlobalControlInitData;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[7];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
- UINT8 BankNumber;
- UINT8 ClearStatusOnInitialization;
- UINT8 StatusDataFormat;
- UINT8 Reserved0;
- UINT32 ControlRegisterMsrAddress;
- UINT64 ControlInitData;
- UINT32 StatusRegisterMsrAddress;
- UINT32 AddressRegisterMsrAddress;
- UINT32 MiscRegisterMsrAddress;
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
-#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
-#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
-#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
//
// Hardware Error Notification types. All other values are reserved
//
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
- UINT16 Type:1;
- UINT16 PollInterval:1;
- UINT16 SwitchToPollingThresholdValue:1;
- UINT16 SwitchToPollingThresholdWindow:1;
- UINT16 ErrorThresholdValue:1;
- UINT16 ErrorThresholdWindow:1;
- UINT16 Reserved:10;
+ UINT16 Type : 1;
+ UINT16 PollInterval : 1;
+ UINT16 SwitchToPollingThresholdValue : 1;
+ UINT16 SwitchToPollingThresholdWindow : 1;
+ UINT16 ErrorThresholdValue : 1;
+ UINT16 ErrorThresholdWindow : 1;
+ UINT16 Reserved : 10;
} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
- UINT32 PollInterval;
- UINT32 Vector;
- UINT32 SwitchToPollingThresholdValue;
- UINT32 SwitchToPollingThresholdWindow;
- UINT32 ErrorThresholdValue;
- UINT32 ErrorThresholdWindow;
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[3];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
} EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
} EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 RootErrorCommand;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
} EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 SecondaryUncorrectableErrorMask;
- UINT32 SecondaryUncorrectableErrorSeverity;
- UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT16 RelatedSourceId;
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
- EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT32 ErrorStatusBlockLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
} EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
///
/// Generic Error Status Definition
///
typedef struct {
- EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;
///
/// ERST - Error Record Serialization Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 SerializationHeaderSize;
- UINT8 Reserved0[4];
- UINT32 InstructionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
} EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
///
/// ERST Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
///
/// ERST Serialization Actions
///
-#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
-#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
-#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
-#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
-#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
-#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
-#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
-#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
-#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
-#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
-#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
-#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
+#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
///
/// ERST Action Command Status
///
-#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
-#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
-#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
-#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
-#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
-#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
+#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
+#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
-#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
-#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
-#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_5_0_ERST_NOOP 0x04
-#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
-#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
-#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
-#define EFI_ACPI_5_0_ERST_ADD 0x08
-#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
-#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
-#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
-#define EFI_ACPI_5_0_ERST_STALL 0x0C
-#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
-#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
-#define EFI_ACPI_5_0_ERST_GOTO 0x0F
-#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
-#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
-#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
+#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_0_ERST_NOOP 0x04
+#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_5_0_ERST_ADD 0x08
+#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
+#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_5_0_ERST_STALL 0x0C
+#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_5_0_ERST_GOTO 0x0F
+#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
-#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
- UINT8 SerializationAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
///
/// EINJ - Error Injection Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 InjectionHeaderSize;
- UINT8 InjectionFlags;
- UINT8 Reserved0[3];
- UINT32 InjectionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
} EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;
///
/// EINJ Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
-#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
-#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
-#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
-#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
-#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
-#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
+#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
-#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
-#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
+#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
-#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
-#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
-#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
-#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
-#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
-#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
-#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
-#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
-#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
-#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
-#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
-#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
///
/// EINJ Injection Instructions
///
-#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
-#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
-#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_5_0_EINJ_NOOP 0x04
+#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_0_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
-#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
- UINT8 InjectionAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
///
/// EINJ Trigger Action Table
///
typedef struct {
- UINT32 HeaderSize;
- UINT32 Revision;
- UINT32 TableSize;
- UINT32 EntryCount;
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
} EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;
///
/// Platform Communications Channel Table (PCCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Flags;
- UINT64 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 Reserved;
} EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
///
/// PCCT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
///
/// PCCT Global Flags
///
-#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
+#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
//
// PCCT Subspace type
@@ -1825,25 +1821,25 @@ typedef struct {
/// PCC Subspace Structure Header
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
+ UINT8 Type;
+ UINT8 Length;
} EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;
///
/// Generic Communications Subspace Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[6];
- UINT64 BaseAddress;
- UINT64 AddressLength;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
- UINT64 DoorbellPreserve;
- UINT64 DoorbellWrite;
- UINT32 NominalLatency;
- UINT32 MaximumPeriodicAccessRate;
- UINT16 MinimumRequestTurnaroundTime;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
} EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;
///
@@ -1851,18 +1847,18 @@ typedef struct {
///
typedef struct {
- UINT8 Command;
- UINT8 Reserved:7;
- UINT8 GenerateSci:1;
+ UINT8 Command;
+ UINT8 Reserved : 7;
+ UINT8 GenerateSci : 1;
} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
typedef struct {
- UINT8 CommandComplete:1;
- UINT8 SciDoorbell:1;
- UINT8 Error:1;
- UINT8 PlatformNotification:1;
- UINT8 Reserved:4;
- UINT8 Reserved1;
+ UINT8 CommandComplete : 1;
+ UINT8 SciDoorbell : 1;
+ UINT8 Error : 1;
+ UINT8 PlatformNotification : 1;
+ UINT8 Reserved : 4;
+ UINT8 Reserved1;
} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
typedef struct {
@@ -2066,12 +2062,17 @@ typedef struct {
#define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
///
+/// "PCCT" Platform Communications Channel Table
+///
+#define EFI_ACPI_5_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
+
+///
/// "SLIC" MS Software Licensing Table Specification
///
#define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
@@ -2099,7 +2100,7 @@ typedef struct {
/// "WAET" Windows ACPI Emulated Devices Table
///
#define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
-#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
+#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
///
/// "WDAT" Watchdog Action Table
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi51.h b/src/include/ipxe/efi/IndustryStandard/Acpi51.h
index 1ca114cad..49bb972ef 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi51.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi51.h
@@ -2,21 +2,16 @@
ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016.
Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_5_1_H_
#define _ACPI_5_1_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi50.h>
@@ -29,21 +24,21 @@ FILE_LICENCE ( BSD3 );
/// ACPI 5.1 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;
//
// Generic Address Space Address IDs
//
-#define EFI_ACPI_5_1_SYSTEM_MEMORY 0
-#define EFI_ACPI_5_1_SYSTEM_IO 1
-#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2
-#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3
-#define EFI_ACPI_5_1_SMBUS 4
+#define EFI_ACPI_5_1_SYSTEM_MEMORY 0
+#define EFI_ACPI_5_1_SYSTEM_IO 1
+#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_5_1_SMBUS 4
#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A
#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F
@@ -64,29 +59,29 @@ typedef struct {
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2
+#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_5_1_COMMON_HEADER;
//
@@ -98,7 +93,7 @@ typedef struct {
///
/// RSDT Revision (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -109,73 +104,73 @@ typedef struct {
///
/// XSDT Revision (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT16 ArmBootArch;
- UINT8 MinorVersion;
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT16 ArmBootArch;
+ UINT8 MinorVersion;
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;
///
/// FADT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
+#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01
//
@@ -195,62 +190,62 @@ typedef struct {
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0
-#define EFI_ACPI_5_1_8042 BIT1
-#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4
-#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5
+#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0
+#define EFI_ACPI_5_1_8042 BIT1
+#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5
//
// Fixed ACPI Description Table Arm Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0
-#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1
+#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0
+#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_1_WBINVD BIT0
-#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1
-#define EFI_ACPI_5_1_PROC_C1 BIT2
-#define EFI_ACPI_5_1_P_LVL2_UP BIT3
-#define EFI_ACPI_5_1_PWR_BUTTON BIT4
-#define EFI_ACPI_5_1_SLP_BUTTON BIT5
-#define EFI_ACPI_5_1_FIX_RTC BIT6
-#define EFI_ACPI_5_1_RTC_S4 BIT7
-#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8
-#define EFI_ACPI_5_1_DCK_CAP BIT9
-#define EFI_ACPI_5_1_RESET_REG_SUP BIT10
-#define EFI_ACPI_5_1_SEALED_CASE BIT11
-#define EFI_ACPI_5_1_HEADLESS BIT12
-#define EFI_ACPI_5_1_CPU_SW_SLP BIT13
-#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14
-#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
-#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20
-#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21
+#define EFI_ACPI_5_1_WBINVD BIT0
+#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1
+#define EFI_ACPI_5_1_PROC_C1 BIT2
+#define EFI_ACPI_5_1_P_LVL2_UP BIT3
+#define EFI_ACPI_5_1_PWR_BUTTON BIT4
+#define EFI_ACPI_5_1_SLP_BUTTON BIT5
+#define EFI_ACPI_5_1_FIX_RTC BIT6
+#define EFI_ACPI_5_1_RTC_S4 BIT7
+#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8
+#define EFI_ACPI_5_1_DCK_CAP BIT9
+#define EFI_ACPI_5_1_RESET_REG_SUP BIT10
+#define EFI_ACPI_5_1_SEALED_CASE BIT11
+#define EFI_ACPI_5_1_HEADLESS BIT12
+#define EFI_ACPI_5_1_CPU_SW_SLP BIT13
+#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14
+#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved0[3];
- UINT32 OspmFlags;
- UINT8 Reserved1[24];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -262,14 +257,14 @@ typedef struct {
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_1_S4BIOS_F BIT0
-#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1
+#define EFI_ACPI_5_1_S4BIOS_F BIT0
+#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0
+#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0
//
// Differentiated System Description Table,
@@ -278,29 +273,29 @@ typedef struct {
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_1_PCAT_COMPAT BIT0
+#define EFI_ACPI_5_1_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -331,57 +326,57 @@ typedef struct {
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_5_1_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -395,43 +390,43 @@ typedef struct {
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;
///
@@ -439,155 +434,155 @@ typedef struct {
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[2];
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 AcpiProcessorUid;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
///
/// Local x2APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 AcpiProcessorUid;
- UINT8 LocalX2ApicLint;
- UINT8 Reserved[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;
///
/// GIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT32 CPUInterfaceNumber;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ParkingProtocolVersion;
- UINT32 PerformanceInterruptGsiv;
- UINT64 ParkedAddress;
- UINT64 PhysicalBaseAddress;
- UINT64 GICV;
- UINT64 GICH;
- UINT32 VGICMaintenanceInterrupt;
- UINT64 GICRBaseAddress;
- UINT64 MPIDR;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 CPUInterfaceNumber;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ParkingProtocolVersion;
+ UINT32 PerformanceInterruptGsiv;
+ UINT64 ParkedAddress;
+ UINT64 PhysicalBaseAddress;
+ UINT64 GICV;
+ UINT64 GICH;
+ UINT32 VGICMaintenanceInterrupt;
+ UINT64 GICRBaseAddress;
+ UINT64 MPIDR;
} EFI_ACPI_5_1_GIC_STRUCTURE;
///
/// GIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GIC_ENABLED BIT0
-#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1
-#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
+#define EFI_ACPI_5_1_GIC_ENABLED BIT0
+#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1
+#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
///
/// GIC Distributor Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicId;
- UINT64 PhysicalBaseAddress;
- UINT32 SystemVectorBase;
- UINT8 GicVersion;
- UINT8 Reserved2[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 SystemVectorBase;
+ UINT8 GicVersion;
+ UINT8 Reserved2[3];
} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;
///
/// GIC Version
///
-#define EFI_ACPI_5_1_GIC_V1 0x01
-#define EFI_ACPI_5_1_GIC_V2 0x02
-#define EFI_ACPI_5_1_GIC_V3 0x03
-#define EFI_ACPI_5_1_GIC_V4 0x04
+#define EFI_ACPI_5_1_GIC_V1 0x01
+#define EFI_ACPI_5_1_GIC_V2 0x02
+#define EFI_ACPI_5_1_GIC_V3 0x03
+#define EFI_ACPI_5_1_GIC_V4 0x04
///
/// GIC MSI Frame Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicMsiFrameId;
- UINT64 PhysicalBaseAddress;
- UINT32 Flags;
- UINT16 SPICount;
- UINT16 SPIBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicMsiFrameId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 Flags;
+ UINT16 SPICount;
+ UINT16 SPIBase;
} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;
///
/// GIC MSI Frame Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0
+#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0
///
/// GICR Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 DiscoveryRangeBaseAddress;
- UINT32 DiscoveryRangeLength;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 DiscoveryRangeBaseAddress;
+ UINT32 DiscoveryRangeLength;
} EFI_ACPI_5_1_GICR_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -595,11 +590,11 @@ typedef struct {
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -612,9 +607,9 @@ typedef struct {
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -636,83 +631,83 @@ typedef struct {
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved1[2];
- UINT32 ProximityDomain;
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 ClockDomain;
- UINT8 Reserved2[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
///
/// GICC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ClockDomain;
} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;
///
/// GICC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
+#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
///
/// System Locality Distance Information Table (SLIT).
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -724,14 +719,14 @@ typedef struct {
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 Reserved[8];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
///
/// CPEP Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
//
// CPEP processor structure types.
@@ -742,66 +737,66 @@ typedef struct {
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT32 PollingInterval;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 OffsetProxDomInfo;
- UINT32 MaximumNumberOfProximityDomains;
- UINT32 MaximumNumberOfClockDomains;
- UINT64 MaximumPhysicalAddress;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
///
/// MSCT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
- UINT8 Revision;
- UINT8 Length;
- UINT32 ProximityDomainRangeLow;
- UINT32 ProximityDomainRangeHigh;
- UINT32 MaximumProcessorCapacity;
- UINT64 MaximumMemoryCapacity;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
///
/// ACPI RAS Feature Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier[12];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier[12];
} EFI_ACPI_5_1_RAS_FEATURE_TABLE;
///
/// RASF Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
///
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT16 Version;
- UINT8 RASCapabilities[16];
- UINT8 SetRASCapabilities[16];
- UINT16 NumberOfRASFParameterBlocks;
- UINT32 SetRASCapabilitiesStatus;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 RASCapabilities[16];
+ UINT8 SetRASCapabilities[16];
+ UINT16 NumberOfRASFParameterBlocks;
+ UINT32 SetRASCapabilitiesStatus;
} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -819,52 +814,52 @@ typedef struct {
/// ACPI RASF Parameter Block structure for PATROL_SCRUB
///
typedef struct {
- UINT16 Type;
- UINT16 Version;
- UINT16 Length;
- UINT16 PatrolScrubCommand;
- UINT64 RequestedAddressRange[2];
- UINT64 ActualAddressRange[2];
- UINT16 Flags;
- UINT8 RequestedSpeed;
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
///
/// ACPI RASF Patrol Scrub command
///
-#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
-#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
-#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
///
/// Memory Power State Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier;
- UINT8 Reserved[3];
-// Memory Power Node Structure
-// Memory Power State Characteristics
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier;
+ UINT8 Reserved[3];
+ // Memory Power Node Structure
+ // Memory Power State Characteristics
} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;
///
/// MPST Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
///
/// MPST Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT32 MemoryPowerCommandRegister;
- UINT32 MemoryPowerStatusRegister;
- UINT32 PowerStateId;
- UINT32 MemoryPowerNodeId;
- UINT64 MemoryEnergyConsumed;
- UINT64 ExpectedAveragePowerComsuned;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT32 MemoryPowerCommandRegister;
+ UINT32 MemoryPowerStatusRegister;
+ UINT32 PowerStateId;
+ UINT32 MemoryPowerNodeId;
+ UINT64 MemoryEnergyConsumed;
+ UINT64 ExpectedAveragePowerComsuned;
} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -875,186 +870,186 @@ typedef struct {
///
/// ACPI MPST Memory Power command
///
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
///
/// MPST Memory Power Node Table
///
typedef struct {
- UINT8 PowerStateValue;
- UINT8 PowerStateInformationIndex;
+ UINT8 PowerStateValue;
+ UINT8 PowerStateInformationIndex;
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;
typedef struct {
- UINT8 Flag;
- UINT8 Reserved;
- UINT16 MemoryPowerNodeId;
- UINT32 Length;
- UINT64 AddressBase;
- UINT64 AddressLength;
- UINT32 NumberOfPowerStates;
- UINT32 NumberOfPhysicalComponents;
-//EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
-//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
+ UINT8 Flag;
+ UINT8 Reserved;
+ UINT16 MemoryPowerNodeId;
+ UINT32 Length;
+ UINT64 AddressBase;
+ UINT64 AddressLength;
+ UINT32 NumberOfPowerStates;
+ UINT32 NumberOfPhysicalComponents;
+ // EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
+ // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
typedef struct {
- UINT16 MemoryPowerNodeCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerNodeCount;
+ UINT8 Reserved[2];
} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;
///
/// MPST Memory Power State Characteristics Table
///
typedef struct {
- UINT8 PowerStateStructureID;
- UINT8 Flag;
- UINT16 Reserved;
- UINT32 AveragePowerConsumedInMPS0;
- UINT32 RelativePowerSavingToMPS0;
- UINT64 ExitLatencyToMPS0;
+ UINT8 PowerStateStructureID;
+ UINT8 Flag;
+ UINT16 Reserved;
+ UINT32 AveragePowerConsumedInMPS0;
+ UINT32 RelativePowerSavingToMPS0;
+ UINT64 ExitLatencyToMPS0;
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
typedef struct {
- UINT16 MemoryPowerStateCharacteristicsCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerStateCharacteristicsCount;
+ UINT8 Reserved[2];
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
///
/// Memory Topology Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved;
} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;
///
/// PMTT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
///
/// Common Memory Aggregator Device Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Reserved;
- UINT16 Length;
- UINT16 Flags;
- UINT16 Reserved1;
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved1;
} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Memory Aggregator Device Type
///
-#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
-#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
-#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2
///
/// Socket Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 SocketIdentifier;
- UINT16 Reserved;
-//EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 SocketIdentifier;
+ UINT16 Reserved;
+ // EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// MemoryController Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT32 ReadLatency;
- UINT32 WriteLatency;
- UINT32 ReadBandwidth;
- UINT32 WriteBandwidth;
- UINT16 OptimalAccessUnit;
- UINT16 OptimalAccessAlignment;
- UINT16 Reserved;
- UINT16 NumberOfProximityDomains;
-//UINT32 ProximityDomain[NumberOfProximityDomains];
-//EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 OptimalAccessUnit;
+ UINT16 OptimalAccessAlignment;
+ UINT16 Reserved;
+ UINT16 NumberOfProximityDomains;
+ // UINT32 ProximityDomain[NumberOfProximityDomains];
+ // EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// DIMM Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 PhysicalComponentIdentifier;
- UINT16 Reserved;
- UINT32 SizeOfDimm;
- UINT32 SmbiosHandle;
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 PhysicalComponentIdentifier;
+ UINT16 Reserved;
+ UINT32 SizeOfDimm;
+ UINT32 SmbiosHandle;
} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Boot Graphics Resource Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
///
/// 2-bytes (16 bit) version ID. This value must be 1.
///
- UINT16 Version;
+ UINT16 Version;
///
/// 1-byte status field indicating current status about the table.
/// Bits[7:1] = Reserved (must be zero)
/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
///
- UINT8 Status;
+ UINT8 Status;
///
/// 1-byte enumerated type field indicating format of the image.
/// 0 = Bitmap
/// 1 - 255 Reserved (for future use)
///
- UINT8 ImageType;
+ UINT8 ImageType;
///
/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
/// of the image bitmap.
///
- UINT64 ImageAddress;
+ UINT64 ImageAddress;
///
/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetX;
+ UINT32 ImageOffsetX;
///
/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetY;
+ UINT32 ImageOffsetY;
} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;
///
/// BGRT Revision
///
-#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
+#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
///
/// BGRT Version
///
-#define EFI_ACPI_5_1_BGRT_VERSION 0x01
+#define EFI_ACPI_5_1_BGRT_VERSION 0x01
///
/// BGRT Status
///
-#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
-#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01
+#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
+#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01
///
/// BGRT Image Type
@@ -1064,26 +1059,26 @@ typedef struct {
///
/// FPDT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
///
/// FPDT Performance Record Types
///
-#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
-#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
+#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
+#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
///
/// FPDT Performance Record Revision
///
-#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
-#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
+#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
+#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
///
/// FPDT Runtime Performance Record Types
///
-#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
-#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
-#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
///
/// FPDT Runtime Performance Record Revision
@@ -1096,77 +1091,77 @@ typedef struct {
/// FPDT Performance Record header
///
typedef struct {
- UINT16 Type;
- UINT8 Length;
- UINT8 Revision;
+ UINT16 Type;
+ UINT8 Length;
+ UINT8 Revision;
} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;
///
/// FPDT Performance Table header
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;
///
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
///
- UINT64 BootPerformanceTablePointer;
+ UINT64 BootPerformanceTablePointer;
} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT S3 Performance Table Pointer Record Structure
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the S3 Performance Table.
///
- UINT64 S3PerformanceTablePointer;
+ UINT64 S3PerformanceTablePointer;
} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT Firmware Basic Boot Performance Record Structure
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// Timer value logged at the beginning of firmware image execution.
/// This may not always be zero or near zero.
///
- UINT64 ResetEnd;
+ UINT64 ResetEnd;
///
/// Timer value logged just prior to loading the OS boot loader into memory.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 OsLoaderLoadImageStart;
+ UINT64 OsLoaderLoadImageStart;
///
/// Timer value logged just prior to launching the previously loaded OS boot loader image.
/// For non-UEFI compatible boots, the timer value logged will be just prior
/// to the INT 19h handler invocation.
///
- UINT64 OsLoaderStartImageStart;
+ UINT64 OsLoaderStartImageStart;
///
/// Timer value logged at the point when the OS loader calls the
/// ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesEntry;
+ UINT64 ExitBootServicesEntry;
///
- /// Timer value logged at the point just prior towhen the OS loader gaining
+ /// Timer value logged at the point just prior to when the OS loader gaining
/// control back from calls the ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesExit;
+ UINT64 ExitBootServicesExit;
} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
///
@@ -1178,7 +1173,7 @@ typedef struct {
// FPDT Firmware Basic Boot Performance Table
//
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1193,7 +1188,7 @@ typedef struct {
// FPDT Firmware S3 Boot Performance Table
//
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1203,203 +1198,209 @@ typedef struct {
/// FPDT Basic S3 Resume Performance Record
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// A count of the number of S3 resume cycles since the last full boot sequence.
///
- UINT32 ResumeCount;
+ UINT32 ResumeCount;
///
/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
/// OS waking vector. Only the most recent resume cycle's time is retained.
///
- UINT64 FullResume;
+ UINT64 FullResume;
///
/// Average timer value of all resume cycles logged since the last full boot
/// sequence, including the most recent resume. Note that the entire log of
/// timer values does not need to be retained in order to calculate this average.
///
- UINT64 AverageResume;
+ UINT64 AverageResume;
} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;
///
/// FPDT Basic S3 Suspend Performance Record
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendStart;
+ UINT64 SuspendStart;
///
/// Timer value recorded at the final firmware write to SLP_TYP (or other
/// mechanism) used to trigger hardware entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendEnd;
+ UINT64 SuspendEnd;
} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;
///
/// Firmware Performance Record Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;
///
/// Generic Timer Description Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 CntControlBasePhysicalAddress;
- UINT32 Reserved;
- UINT32 SecurePL1TimerGSIV;
- UINT32 SecurePL1TimerFlags;
- UINT32 NonSecurePL1TimerGSIV;
- UINT32 NonSecurePL1TimerFlags;
- UINT32 VirtualTimerGSIV;
- UINT32 VirtualTimerFlags;
- UINT32 NonSecurePL2TimerGSIV;
- UINT32 NonSecurePL2TimerFlags;
- UINT64 CntReadBasePhysicalAddress;
- UINT32 PlatformTimerCount;
- UINT32 PlatformTimerOffset;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 CntControlBasePhysicalAddress;
+ UINT32 Reserved;
+ UINT32 SecurePL1TimerGSIV;
+ UINT32 SecurePL1TimerFlags;
+ UINT32 NonSecurePL1TimerGSIV;
+ UINT32 NonSecurePL1TimerFlags;
+ UINT32 VirtualTimerGSIV;
+ UINT32 VirtualTimerFlags;
+ UINT32 NonSecurePL2TimerGSIV;
+ UINT32 NonSecurePL2TimerFlags;
+ UINT64 CntReadBasePhysicalAddress;
+ UINT32 PlatformTimerCount;
+ UINT32 PlatformTimerOffset;
} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;
///
/// GTDT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
///
/// Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
-#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
///
/// Platform Timer Type
///
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0
-#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1
///
/// GT Block Structure
///
typedef struct {
- UINT8 Type;
- UINT16 Length;
- UINT8 Reserved;
- UINT64 CntCtlBase;
- UINT32 GTBlockTimerCount;
- UINT32 GTBlockTimerOffset;
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 CntCtlBase;
+ UINT32 GTBlockTimerCount;
+ UINT32 GTBlockTimerOffset;
} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;
///
/// GT Block Timer Structure
///
typedef struct {
- UINT8 GTFrameNumber;
- UINT8 Reserved[3];
- UINT64 CntBaseX;
- UINT64 CntEL0BaseX;
- UINT32 GTxPhysicalTimerGSIV;
- UINT32 GTxPhysicalTimerFlags;
- UINT32 GTxVirtualTimerGSIV;
- UINT32 GTxVirtualTimerFlags;
- UINT32 GTxCommonFlags;
+ UINT8 GTFrameNumber;
+ UINT8 Reserved[3];
+ UINT64 CntBaseX;
+ UINT64 CntEL0BaseX;
+ UINT32 GTxPhysicalTimerGSIV;
+ UINT32 GTxPhysicalTimerFlags;
+ UINT32 GTxVirtualTimerGSIV;
+ UINT32 GTxVirtualTimerFlags;
+ UINT32 GTxCommonFlags;
} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;
///
/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
///
/// Common Flags Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
///
/// SBSA Generic Watchdog Structure
///
typedef struct {
- UINT8 Type;
- UINT16 Length;
- UINT8 Reserved;
- UINT64 RefreshFramePhysicalAddress;
- UINT64 WatchdogControlFramePhysicalAddress;
- UINT32 WatchdogTimerGSIV;
- UINT32 WatchdogTimerFlags;
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 RefreshFramePhysicalAddress;
+ UINT64 WatchdogControlFramePhysicalAddress;
+ UINT32 WatchdogTimerGSIV;
+ UINT32 WatchdogTimerFlags;
} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
///
/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
-#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
///
/// Boot Error Record Table (BERT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 BootErrorRegionLength;
- UINT64 BootErrorRegion;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;
///
/// BERT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
- UINT32 UncorrectableErrorValid:1;
- UINT32 CorrectableErrorValid:1;
- UINT32 MultipleUncorrectableErrors:1;
- UINT32 MultipleCorrectableErrors:1;
- UINT32 ErrorDataEntryCount:10;
- UINT32 Reserved:18;
+ UINT32 UncorrectableErrorValid : 1;
+ UINT32 CorrectableErrorValid : 1;
+ UINT32 MultipleUncorrectableErrors : 1;
+ UINT32 MultipleCorrectableErrors : 1;
+ UINT32 ErrorDataEntryCount : 10;
+ UINT32 Reserved : 18;
} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;
///
/// Boot Error Region Definition
///
typedef struct {
- EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;
//
// Boot Error Severity types
//
-#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_5_1_ERROR_SEVERITY_RECOVERABLE 0x00
#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03
+//
+// The term 'Correctable' is no longer being used as an error severity of the
+// reported error since ACPI Specification Version 5.1 Errata B.
+// The below macro is considered as deprecated and should no longer be used.
+//
+#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00
///
/// Generic Error Data Entry Definition
///
typedef struct {
- UINT8 SectionType[16];
- UINT32 ErrorSeverity;
- UINT16 Revision;
- UINT8 ValidationBits;
- UINT8 Flags;
- UINT32 ErrorDataLength;
- UINT8 FruId[16];
- UINT8 FruText[20];
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
///
@@ -1411,14 +1412,14 @@ typedef struct {
/// HEST - Hardware Error Source Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 ErrorSourceCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
///
/// HEST Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
@@ -1434,403 +1435,403 @@ typedef struct {
//
// Error Source structure flags.
//
-#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
-#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT64 GlobalCapabilityInitData;
- UINT64 GlobalControlInitData;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[7];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
- UINT8 BankNumber;
- UINT8 ClearStatusOnInitialization;
- UINT8 StatusDataFormat;
- UINT8 Reserved0;
- UINT32 ControlRegisterMsrAddress;
- UINT64 ControlInitData;
- UINT32 StatusRegisterMsrAddress;
- UINT32 AddressRegisterMsrAddress;
- UINT32 MiscRegisterMsrAddress;
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
-#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
-#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
-#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
//
// Hardware Error Notification types. All other values are reserved
//
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
- UINT16 Type:1;
- UINT16 PollInterval:1;
- UINT16 SwitchToPollingThresholdValue:1;
- UINT16 SwitchToPollingThresholdWindow:1;
- UINT16 ErrorThresholdValue:1;
- UINT16 ErrorThresholdWindow:1;
- UINT16 Reserved:10;
+ UINT16 Type : 1;
+ UINT16 PollInterval : 1;
+ UINT16 SwitchToPollingThresholdValue : 1;
+ UINT16 SwitchToPollingThresholdWindow : 1;
+ UINT16 ErrorThresholdValue : 1;
+ UINT16 ErrorThresholdWindow : 1;
+ UINT16 Reserved : 10;
} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
- UINT32 PollInterval;
- UINT32 Vector;
- UINT32 SwitchToPollingThresholdValue;
- UINT32 SwitchToPollingThresholdWindow;
- UINT32 ErrorThresholdValue;
- UINT32 ErrorThresholdWindow;
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[3];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 RootErrorCommand;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 SecondaryUncorrectableErrorMask;
- UINT32 SecondaryUncorrectableErrorSeverity;
- UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT16 RelatedSourceId;
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
- EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT32 ErrorStatusBlockLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
///
/// Generic Error Status Definition
///
typedef struct {
- EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;
///
/// ERST - Error Record Serialization Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 SerializationHeaderSize;
- UINT8 Reserved0[4];
- UINT32 InstructionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
///
/// ERST Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
///
/// ERST Serialization Actions
///
-#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00
-#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01
-#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02
-#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03
-#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04
-#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08
-#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09
-#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A
-#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
-#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
-#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
-#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03
+#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
///
/// ERST Action Command Status
///
-#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00
-#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
-#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
-#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03
-#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04
-#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05
+#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03
+#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
-#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00
-#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02
-#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_5_1_ERST_NOOP 0x04
-#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05
-#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06
-#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07
-#define EFI_ACPI_5_1_ERST_ADD 0x08
-#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09
-#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A
-#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B
-#define EFI_ACPI_5_1_ERST_STALL 0x0C
-#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D
-#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
-#define EFI_ACPI_5_1_ERST_GOTO 0x0F
-#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10
-#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11
-#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12
+#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_1_ERST_NOOP 0x04
+#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_5_1_ERST_ADD 0x08
+#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09
+#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_5_1_ERST_STALL 0x0C
+#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_5_1_ERST_GOTO 0x0F
+#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
-#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
- UINT8 SerializationAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
///
/// EINJ - Error Injection Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 InjectionHeaderSize;
- UINT8 InjectionFlags;
- UINT8 Reserved0[3];
- UINT32 InjectionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;
///
/// EINJ Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
-#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00
-#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
-#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02
-#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03
-#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04
-#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF
+#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
-#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01
-#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02
+#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
-#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
-#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
-#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
-#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
-#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
-#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
-#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
-#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
-#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
-#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
-#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
-#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
///
/// EINJ Injection Instructions
///
-#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00
-#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02
-#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_5_1_EINJ_NOOP 0x04
+#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_1_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
-#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
- UINT8 InjectionAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;
///
/// EINJ Trigger Action Table
///
typedef struct {
- UINT32 HeaderSize;
- UINT32 Revision;
- UINT32 TableSize;
- UINT32 EntryCount;
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;
///
/// Platform Communications Channel Table (PCCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Flags;
- UINT64 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 Reserved;
} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
///
/// PCCT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
///
/// PCCT Global Flags
///
-#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0
+#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0
//
// PCCT Subspace type
@@ -1841,25 +1842,25 @@ typedef struct {
/// PCC Subspace Structure Header
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
+ UINT8 Type;
+ UINT8 Length;
} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;
///
/// Generic Communications Subspace Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[6];
- UINT64 BaseAddress;
- UINT64 AddressLength;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
- UINT64 DoorbellPreserve;
- UINT64 DoorbellWrite;
- UINT32 NominalLatency;
- UINT32 MaximumPeriodicAccessRate;
- UINT16 MinimumRequestTurnaroundTime;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;
///
@@ -1867,18 +1868,18 @@ typedef struct {
///
typedef struct {
- UINT8 Command;
- UINT8 Reserved:7;
- UINT8 GenerateSci:1;
+ UINT8 Command;
+ UINT8 Reserved : 7;
+ UINT8 GenerateSci : 1;
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
typedef struct {
- UINT8 CommandComplete:1;
- UINT8 SciDoorbell:1;
- UINT8 Error:1;
- UINT8 PlatformNotification:1;
- UINT8 Reserved:4;
- UINT8 Reserved1;
+ UINT8 CommandComplete : 1;
+ UINT8 SciDoorbell : 1;
+ UINT8 Error : 1;
+ UINT8 PlatformNotification : 1;
+ UINT8 Reserved : 4;
+ UINT8 Reserved1;
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
typedef struct {
@@ -2087,12 +2088,17 @@ typedef struct {
#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
///
+/// "PCCT" Platform Communications Channel Table
+///
+#define EFI_ACPI_5_1_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
+
+///
/// "SLIC" MS Software Licensing Table Specification
///
#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi60.h b/src/include/ipxe/efi/IndustryStandard/Acpi60.h
index c600735fd..9bd821c7e 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi60.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi60.h
@@ -1,21 +1,16 @@
/** @file
ACPI 6.0 definitions from the ACPI Specification Revision 6.0 Errata A January, 2016.
- Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_6_0_H_
#define _ACPI_6_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi51.h>
@@ -28,21 +23,21 @@ FILE_LICENCE ( BSD3 );
/// ACPI 6.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE;
//
// Generic Address Space Address IDs
//
-#define EFI_ACPI_6_0_SYSTEM_MEMORY 0
-#define EFI_ACPI_6_0_SYSTEM_IO 1
-#define EFI_ACPI_6_0_PCI_CONFIGURATION_SPACE 2
-#define EFI_ACPI_6_0_EMBEDDED_CONTROLLER 3
-#define EFI_ACPI_6_0_SMBUS 4
+#define EFI_ACPI_6_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_6_0_SYSTEM_IO 1
+#define EFI_ACPI_6_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_6_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_6_0_SMBUS 4
#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
#define EFI_ACPI_6_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
@@ -63,29 +58,29 @@ typedef struct {
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.0) says current value is 2
+#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.0) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_6_0_COMMON_HEADER;
//
@@ -97,7 +92,7 @@ typedef struct {
///
/// RSDT Revision (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -108,74 +103,74 @@ typedef struct {
///
/// XSDT Revision (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT16 ArmBootArch;
- UINT8 MinorVersion;
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
- UINT64 HypervisorVendorIdentity;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT16 ArmBootArch;
+ UINT8 MinorVersion;
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+ UINT64 HypervisorVendorIdentity;
} EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
/// FADT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
+#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x00
//
@@ -195,62 +190,62 @@ typedef struct {
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_6_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_6_0_8042 BIT1
-#define EFI_ACPI_6_0_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_6_0_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_6_0_PCIE_ASPM_CONTROLS BIT4
-#define EFI_ACPI_6_0_CMOS_RTC_NOT_PRESENT BIT5
+#define EFI_ACPI_6_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_6_0_8042 BIT1
+#define EFI_ACPI_6_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_6_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_6_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_6_0_CMOS_RTC_NOT_PRESENT BIT5
//
// Fixed ACPI Description Table Arm Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_6_0_ARM_PSCI_COMPLIANT BIT0
-#define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1
+#define EFI_ACPI_6_0_ARM_PSCI_COMPLIANT BIT0
+#define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_6_0_WBINVD BIT0
-#define EFI_ACPI_6_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_6_0_PROC_C1 BIT2
-#define EFI_ACPI_6_0_P_LVL2_UP BIT3
-#define EFI_ACPI_6_0_PWR_BUTTON BIT4
-#define EFI_ACPI_6_0_SLP_BUTTON BIT5
-#define EFI_ACPI_6_0_FIX_RTC BIT6
-#define EFI_ACPI_6_0_RTC_S4 BIT7
-#define EFI_ACPI_6_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_6_0_DCK_CAP BIT9
-#define EFI_ACPI_6_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_6_0_SEALED_CASE BIT11
-#define EFI_ACPI_6_0_HEADLESS BIT12
-#define EFI_ACPI_6_0_CPU_SW_SLP BIT13
-#define EFI_ACPI_6_0_PCI_EXP_WAK BIT14
-#define EFI_ACPI_6_0_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_6_0_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_6_0_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_6_0_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_6_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
-#define EFI_ACPI_6_0_HW_REDUCED_ACPI BIT20
-#define EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
+#define EFI_ACPI_6_0_WBINVD BIT0
+#define EFI_ACPI_6_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_6_0_PROC_C1 BIT2
+#define EFI_ACPI_6_0_P_LVL2_UP BIT3
+#define EFI_ACPI_6_0_PWR_BUTTON BIT4
+#define EFI_ACPI_6_0_SLP_BUTTON BIT5
+#define EFI_ACPI_6_0_FIX_RTC BIT6
+#define EFI_ACPI_6_0_RTC_S4 BIT7
+#define EFI_ACPI_6_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_6_0_DCK_CAP BIT9
+#define EFI_ACPI_6_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_6_0_SEALED_CASE BIT11
+#define EFI_ACPI_6_0_HEADLESS BIT12
+#define EFI_ACPI_6_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_6_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_6_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_6_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_6_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_6_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_6_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_6_0_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved0[3];
- UINT32 OspmFlags;
- UINT8 Reserved1[24];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
} EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -262,14 +257,14 @@ typedef struct {
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_6_0_S4BIOS_F BIT0
-#define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1
+#define EFI_ACPI_6_0_S4BIOS_F BIT0
+#define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_6_0_OSPM_64BIT_WAKE_F BIT0
+#define EFI_ACPI_6_0_OSPM_64BIT_WAKE_F BIT0
//
// Differentiated System Description Table,
@@ -278,29 +273,29 @@ typedef struct {
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 6.0 Errata A spec.)
///
-#define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04
+#define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_6_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_6_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -332,57 +327,57 @@ typedef struct {
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorUid;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorUid;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_6_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_6_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_6_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -396,43 +391,43 @@ typedef struct {
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorUid;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorUid;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_6_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_6_0_IO_SAPIC_STRUCTURE;
///
@@ -440,169 +435,169 @@ typedef struct {
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_6_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_6_0_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_6_0_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[2];
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 AcpiProcessorUid;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
} EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
///
/// Local x2APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 AcpiProcessorUid;
- UINT8 LocalX2ApicLint;
- UINT8 Reserved[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
} EFI_ACPI_6_0_LOCAL_X2APIC_NMI_STRUCTURE;
///
/// GIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT32 CPUInterfaceNumber;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ParkingProtocolVersion;
- UINT32 PerformanceInterruptGsiv;
- UINT64 ParkedAddress;
- UINT64 PhysicalBaseAddress;
- UINT64 GICV;
- UINT64 GICH;
- UINT32 VGICMaintenanceInterrupt;
- UINT64 GICRBaseAddress;
- UINT64 MPIDR;
- UINT8 ProcessorPowerEfficiencyClass;
- UINT8 Reserved2[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 CPUInterfaceNumber;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ParkingProtocolVersion;
+ UINT32 PerformanceInterruptGsiv;
+ UINT64 ParkedAddress;
+ UINT64 PhysicalBaseAddress;
+ UINT64 GICV;
+ UINT64 GICH;
+ UINT32 VGICMaintenanceInterrupt;
+ UINT64 GICRBaseAddress;
+ UINT64 MPIDR;
+ UINT8 ProcessorPowerEfficiencyClass;
+ UINT8 Reserved2[3];
} EFI_ACPI_6_0_GIC_STRUCTURE;
///
/// GIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GIC_ENABLED BIT0
-#define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1
-#define EFI_ACPI_6_0_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
+#define EFI_ACPI_6_0_GIC_ENABLED BIT0
+#define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1
+#define EFI_ACPI_6_0_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
///
/// GIC Distributor Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicId;
- UINT64 PhysicalBaseAddress;
- UINT32 SystemVectorBase;
- UINT8 GicVersion;
- UINT8 Reserved2[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 SystemVectorBase;
+ UINT8 GicVersion;
+ UINT8 Reserved2[3];
} EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE;
///
/// GIC Version
///
-#define EFI_ACPI_6_0_GIC_V1 0x01
-#define EFI_ACPI_6_0_GIC_V2 0x02
-#define EFI_ACPI_6_0_GIC_V3 0x03
-#define EFI_ACPI_6_0_GIC_V4 0x04
+#define EFI_ACPI_6_0_GIC_V1 0x01
+#define EFI_ACPI_6_0_GIC_V2 0x02
+#define EFI_ACPI_6_0_GIC_V3 0x03
+#define EFI_ACPI_6_0_GIC_V4 0x04
///
/// GIC MSI Frame Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicMsiFrameId;
- UINT64 PhysicalBaseAddress;
- UINT32 Flags;
- UINT16 SPICount;
- UINT16 SPIBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicMsiFrameId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 Flags;
+ UINT16 SPICount;
+ UINT16 SPIBase;
} EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE;
///
/// GIC MSI Frame Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_SPI_COUNT_BASE_SELECT BIT0
+#define EFI_ACPI_6_0_SPI_COUNT_BASE_SELECT BIT0
///
/// GICR Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 DiscoveryRangeBaseAddress;
- UINT32 DiscoveryRangeLength;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 DiscoveryRangeBaseAddress;
+ UINT32 DiscoveryRangeLength;
} EFI_ACPI_6_0_GICR_STRUCTURE;
///
/// GIC Interrupt Translation Service Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT32 GicItsId;
- UINT64 PhysicalBaseAddress;
- UINT32 Reserved2;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 GicItsId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 Reserved2;
} EFI_ACPI_6_0_GIC_ITS_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -610,11 +605,11 @@ typedef struct {
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -627,9 +622,9 @@ typedef struct {
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -651,83 +646,83 @@ typedef struct {
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
} EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_6_0_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_6_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_6_0_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_6_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_6_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_6_0_MEMORY_NONVOLATILE (1 << 2)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved1[2];
- UINT32 ProximityDomain;
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 ClockDomain;
- UINT8 Reserved2[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
} EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
///
/// GICC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ClockDomain;
} EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE;
///
/// GICC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GICC_ENABLED (1 << 0)
+#define EFI_ACPI_6_0_GICC_ENABLED (1 << 0)
///
/// System Locality Distance Information Table (SLIT).
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_6_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -739,14 +734,14 @@ typedef struct {
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 Reserved[8];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
} EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
///
/// CPEP Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
//
// CPEP processor structure types.
@@ -757,66 +752,66 @@ typedef struct {
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT32 PollingInterval;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
} EFI_ACPI_6_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 OffsetProxDomInfo;
- UINT32 MaximumNumberOfProximityDomains;
- UINT32 MaximumNumberOfClockDomains;
- UINT64 MaximumPhysicalAddress;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
} EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
///
/// MSCT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
- UINT8 Revision;
- UINT8 Length;
- UINT32 ProximityDomainRangeLow;
- UINT32 ProximityDomainRangeHigh;
- UINT32 MaximumProcessorCapacity;
- UINT64 MaximumMemoryCapacity;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
} EFI_ACPI_6_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
///
/// ACPI RAS Feature Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier[12];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier[12];
} EFI_ACPI_6_0_RAS_FEATURE_TABLE;
///
/// RASF Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_RAS_FEATURE_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_RAS_FEATURE_TABLE_REVISION 0x01
///
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT16 Version;
- UINT8 RASCapabilities[16];
- UINT8 SetRASCapabilities[16];
- UINT16 NumberOfRASFParameterBlocks;
- UINT32 SetRASCapabilitiesStatus;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 RASCapabilities[16];
+ UINT8 SetRASCapabilities[16];
+ UINT16 NumberOfRASFParameterBlocks;
+ UINT32 SetRASCapabilitiesStatus;
} EFI_ACPI_6_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -834,52 +829,52 @@ typedef struct {
/// ACPI RASF Parameter Block structure for PATROL_SCRUB
///
typedef struct {
- UINT16 Type;
- UINT16 Version;
- UINT16 Length;
- UINT16 PatrolScrubCommand;
- UINT64 RequestedAddressRange[2];
- UINT64 ActualAddressRange[2];
- UINT16 Flags;
- UINT8 RequestedSpeed;
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
} EFI_ACPI_6_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
///
/// ACPI RASF Patrol Scrub command
///
-#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
-#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
-#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
+#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
+#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
+#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
///
/// Memory Power State Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier;
- UINT8 Reserved[3];
-// Memory Power Node Structure
-// Memory Power State Characteristics
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier;
+ UINT8 Reserved[3];
+ // Memory Power Node Structure
+ // Memory Power State Characteristics
} EFI_ACPI_6_0_MEMORY_POWER_STATUS_TABLE;
///
/// MPST Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
///
/// MPST Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT32 MemoryPowerCommandRegister;
- UINT32 MemoryPowerStatusRegister;
- UINT32 PowerStateId;
- UINT32 MemoryPowerNodeId;
- UINT64 MemoryEnergyConsumed;
- UINT64 ExpectedAveragePowerComsuned;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT32 MemoryPowerCommandRegister;
+ UINT32 MemoryPowerStatusRegister;
+ UINT32 PowerStateId;
+ UINT32 MemoryPowerNodeId;
+ UINT64 MemoryEnergyConsumed;
+ UINT64 ExpectedAveragePowerComsuned;
} EFI_ACPI_6_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -890,186 +885,186 @@ typedef struct {
///
/// ACPI MPST Memory Power command
///
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
///
/// MPST Memory Power Node Table
///
typedef struct {
- UINT8 PowerStateValue;
- UINT8 PowerStateInformationIndex;
+ UINT8 PowerStateValue;
+ UINT8 PowerStateInformationIndex;
} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE;
typedef struct {
- UINT8 Flag;
- UINT8 Reserved;
- UINT16 MemoryPowerNodeId;
- UINT32 Length;
- UINT64 AddressBase;
- UINT64 AddressLength;
- UINT32 NumberOfPowerStates;
- UINT32 NumberOfPhysicalComponents;
-//EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
-//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
+ UINT8 Flag;
+ UINT8 Reserved;
+ UINT16 MemoryPowerNodeId;
+ UINT32 Length;
+ UINT64 AddressBase;
+ UINT64 AddressLength;
+ UINT32 NumberOfPowerStates;
+ UINT32 NumberOfPhysicalComponents;
+ // EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
+ // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
} EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE;
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
typedef struct {
- UINT16 MemoryPowerNodeCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerNodeCount;
+ UINT8 Reserved[2];
} EFI_ACPI_6_0_MPST_MEMORY_POWER_NODE_TABLE;
///
/// MPST Memory Power State Characteristics Table
///
typedef struct {
- UINT8 PowerStateStructureID;
- UINT8 Flag;
- UINT16 Reserved;
- UINT32 AveragePowerConsumedInMPS0;
- UINT32 RelativePowerSavingToMPS0;
- UINT64 ExitLatencyToMPS0;
+ UINT8 PowerStateStructureID;
+ UINT8 Flag;
+ UINT16 Reserved;
+ UINT32 AveragePowerConsumedInMPS0;
+ UINT32 RelativePowerSavingToMPS0;
+ UINT64 ExitLatencyToMPS0;
} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
typedef struct {
- UINT16 MemoryPowerStateCharacteristicsCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerStateCharacteristicsCount;
+ UINT8 Reserved[2];
} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
///
/// Memory Topology Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved;
} EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE;
///
/// PMTT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
///
/// Common Memory Aggregator Device Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Reserved;
- UINT16 Length;
- UINT16 Flags;
- UINT16 Reserved1;
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved1;
} EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Memory Aggregator Device Type
///
-#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
-#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
-#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
+#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0
+#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
+#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2
///
/// Socket Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 SocketIdentifier;
- UINT16 Reserved;
-//EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
+ EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 SocketIdentifier;
+ UINT16 Reserved;
+ // EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
} EFI_ACPI_6_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// MemoryController Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT32 ReadLatency;
- UINT32 WriteLatency;
- UINT32 ReadBandwidth;
- UINT32 WriteBandwidth;
- UINT16 OptimalAccessUnit;
- UINT16 OptimalAccessAlignment;
- UINT16 Reserved;
- UINT16 NumberOfProximityDomains;
-//UINT32 ProximityDomain[NumberOfProximityDomains];
-//EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
+ EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 OptimalAccessUnit;
+ UINT16 OptimalAccessAlignment;
+ UINT16 Reserved;
+ UINT16 NumberOfProximityDomains;
+ // UINT32 ProximityDomain[NumberOfProximityDomains];
+ // EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
} EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// DIMM Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 PhysicalComponentIdentifier;
- UINT16 Reserved;
- UINT32 SizeOfDimm;
- UINT32 SmbiosHandle;
+ EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 PhysicalComponentIdentifier;
+ UINT16 Reserved;
+ UINT32 SizeOfDimm;
+ UINT32 SmbiosHandle;
} EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Boot Graphics Resource Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
///
/// 2-bytes (16 bit) version ID. This value must be 1.
///
- UINT16 Version;
+ UINT16 Version;
///
/// 1-byte status field indicating current status about the table.
/// Bits[7:1] = Reserved (must be zero)
/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
///
- UINT8 Status;
+ UINT8 Status;
///
/// 1-byte enumerated type field indicating format of the image.
/// 0 = Bitmap
/// 1 - 255 Reserved (for future use)
///
- UINT8 ImageType;
+ UINT8 ImageType;
///
/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
/// of the image bitmap.
///
- UINT64 ImageAddress;
+ UINT64 ImageAddress;
///
/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetX;
+ UINT32 ImageOffsetX;
///
/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetY;
+ UINT32 ImageOffsetY;
} EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE;
///
/// BGRT Revision
///
-#define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
+#define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
///
/// BGRT Version
///
-#define EFI_ACPI_6_0_BGRT_VERSION 0x01
+#define EFI_ACPI_6_0_BGRT_VERSION 0x01
///
/// BGRT Status
///
-#define EFI_ACPI_6_0_BGRT_STATUS_NOT_DISPLAYED 0x00
-#define EFI_ACPI_6_0_BGRT_STATUS_DISPLAYED 0x01
+#define EFI_ACPI_6_0_BGRT_STATUS_NOT_DISPLAYED 0x00
+#define EFI_ACPI_6_0_BGRT_STATUS_DISPLAYED 0x01
///
/// BGRT Image Type
@@ -1079,26 +1074,26 @@ typedef struct {
///
/// FPDT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
///
/// FPDT Performance Record Types
///
-#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
-#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
+#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
+#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
///
/// FPDT Performance Record Revision
///
-#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
-#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
+#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
+#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
///
/// FPDT Runtime Performance Record Types
///
-#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
-#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
-#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
+#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
+#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
+#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
///
/// FPDT Runtime Performance Record Revision
@@ -1111,77 +1106,77 @@ typedef struct {
/// FPDT Performance Record header
///
typedef struct {
- UINT16 Type;
- UINT8 Length;
- UINT8 Revision;
+ UINT16 Type;
+ UINT8 Length;
+ UINT8 Revision;
} EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER;
///
/// FPDT Performance Table header
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER;
///
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
///
- UINT64 BootPerformanceTablePointer;
+ UINT64 BootPerformanceTablePointer;
} EFI_ACPI_6_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT S3 Performance Table Pointer Record Structure
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the S3 Performance Table.
///
- UINT64 S3PerformanceTablePointer;
+ UINT64 S3PerformanceTablePointer;
} EFI_ACPI_6_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT Firmware Basic Boot Performance Record Structure
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// Timer value logged at the beginning of firmware image execution.
/// This may not always be zero or near zero.
///
- UINT64 ResetEnd;
+ UINT64 ResetEnd;
///
/// Timer value logged just prior to loading the OS boot loader into memory.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 OsLoaderLoadImageStart;
+ UINT64 OsLoaderLoadImageStart;
///
/// Timer value logged just prior to launching the previously loaded OS boot loader image.
/// For non-UEFI compatible boots, the timer value logged will be just prior
/// to the INT 19h handler invocation.
///
- UINT64 OsLoaderStartImageStart;
+ UINT64 OsLoaderStartImageStart;
///
/// Timer value logged at the point when the OS loader calls the
/// ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesEntry;
+ UINT64 ExitBootServicesEntry;
///
- /// Timer value logged at the point just prior towhen the OS loader gaining
+ /// Timer value logged at the point just prior to when the OS loader gaining
/// control back from calls the ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesExit;
+ UINT64 ExitBootServicesExit;
} EFI_ACPI_6_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
///
@@ -1193,7 +1188,7 @@ typedef struct {
// FPDT Firmware Basic Boot Performance Table
//
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1208,7 +1203,7 @@ typedef struct {
// FPDT Firmware S3 Boot Performance Table
//
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1218,145 +1213,145 @@ typedef struct {
/// FPDT Basic S3 Resume Performance Record
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// A count of the number of S3 resume cycles since the last full boot sequence.
///
- UINT32 ResumeCount;
+ UINT32 ResumeCount;
///
/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
/// OS waking vector. Only the most recent resume cycle's time is retained.
///
- UINT64 FullResume;
+ UINT64 FullResume;
///
/// Average timer value of all resume cycles logged since the last full boot
/// sequence, including the most recent resume. Note that the entire log of
/// timer values does not need to be retained in order to calculate this average.
///
- UINT64 AverageResume;
+ UINT64 AverageResume;
} EFI_ACPI_6_0_FPDT_S3_RESUME_RECORD;
///
/// FPDT Basic S3 Suspend Performance Record
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendStart;
+ UINT64 SuspendStart;
///
/// Timer value recorded at the final firmware write to SLP_TYP (or other
/// mechanism) used to trigger hardware entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendEnd;
+ UINT64 SuspendEnd;
} EFI_ACPI_6_0_FPDT_S3_SUSPEND_RECORD;
///
/// Firmware Performance Record Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
} EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
///
/// Generic Timer Description Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 CntControlBasePhysicalAddress;
- UINT32 Reserved;
- UINT32 SecurePL1TimerGSIV;
- UINT32 SecurePL1TimerFlags;
- UINT32 NonSecurePL1TimerGSIV;
- UINT32 NonSecurePL1TimerFlags;
- UINT32 VirtualTimerGSIV;
- UINT32 VirtualTimerFlags;
- UINT32 NonSecurePL2TimerGSIV;
- UINT32 NonSecurePL2TimerFlags;
- UINT64 CntReadBasePhysicalAddress;
- UINT32 PlatformTimerCount;
- UINT32 PlatformTimerOffset;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 CntControlBasePhysicalAddress;
+ UINT32 Reserved;
+ UINT32 SecurePL1TimerGSIV;
+ UINT32 SecurePL1TimerFlags;
+ UINT32 NonSecurePL1TimerGSIV;
+ UINT32 NonSecurePL1TimerFlags;
+ UINT32 VirtualTimerGSIV;
+ UINT32 VirtualTimerFlags;
+ UINT32 NonSecurePL2TimerGSIV;
+ UINT32 NonSecurePL2TimerFlags;
+ UINT64 CntReadBasePhysicalAddress;
+ UINT32 PlatformTimerCount;
+ UINT32 PlatformTimerOffset;
} EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE;
///
/// GTDT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
///
/// Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
-#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
+#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
///
/// Platform Timer Type
///
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK 0
-#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG 1
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK 0
+#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG 1
///
/// GT Block Structure
///
typedef struct {
- UINT8 Type;
- UINT16 Length;
- UINT8 Reserved;
- UINT64 CntCtlBase;
- UINT32 GTBlockTimerCount;
- UINT32 GTBlockTimerOffset;
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 CntCtlBase;
+ UINT32 GTBlockTimerCount;
+ UINT32 GTBlockTimerOffset;
} EFI_ACPI_6_0_GTDT_GT_BLOCK_STRUCTURE;
///
/// GT Block Timer Structure
///
typedef struct {
- UINT8 GTFrameNumber;
- UINT8 Reserved[3];
- UINT64 CntBaseX;
- UINT64 CntEL0BaseX;
- UINT32 GTxPhysicalTimerGSIV;
- UINT32 GTxPhysicalTimerFlags;
- UINT32 GTxVirtualTimerGSIV;
- UINT32 GTxVirtualTimerFlags;
- UINT32 GTxCommonFlags;
+ UINT8 GTFrameNumber;
+ UINT8 Reserved[3];
+ UINT64 CntBaseX;
+ UINT64 CntEL0BaseX;
+ UINT32 GTxPhysicalTimerGSIV;
+ UINT32 GTxPhysicalTimerFlags;
+ UINT32 GTxVirtualTimerGSIV;
+ UINT32 GTxVirtualTimerFlags;
+ UINT32 GTxCommonFlags;
} EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_STRUCTURE;
///
/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
///
/// Common Flags Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
///
/// SBSA Generic Watchdog Structure
///
typedef struct {
- UINT8 Type;
- UINT16 Length;
- UINT8 Reserved;
- UINT64 RefreshFramePhysicalAddress;
- UINT64 WatchdogControlFramePhysicalAddress;
- UINT32 WatchdogTimerGSIV;
- UINT32 WatchdogTimerFlags;
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 RefreshFramePhysicalAddress;
+ UINT64 WatchdogControlFramePhysicalAddress;
+ UINT32 WatchdogTimerGSIV;
+ UINT32 WatchdogTimerFlags;
} EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
///
/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
-#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
+#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
//
// NVDIMM Firmware Interface Table definition.
@@ -1369,7 +1364,7 @@ typedef struct {
//
// NFIT Version (as defined in ACPI 6.0 spec.)
//
-#define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
+#define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
//
// Definition for NFIT Table Structure Types
@@ -1386,46 +1381,46 @@ typedef struct {
// Definition for NFIT Structure Header
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
+ UINT16 Type;
+ UINT16 Length;
} EFI_ACPI_6_0_NFIT_STRUCTURE_HEADER;
//
// Definition for System Physical Address Range Structure
//
-#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
-#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
-#define EFI_ACPI_6_0_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
-#define EFI_ACPI_6_0_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
-#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
-#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
-#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
-#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
-#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
-#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
-typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT16 SPARangeStructureIndex;
- UINT16 Flags;
- UINT32 Reserved_8;
- UINT32 ProximityDomain;
- GUID AddressRangeTypeGUID;
- UINT64 SystemPhysicalAddressRangeBase;
- UINT64 SystemPhysicalAddressRangeLength;
- UINT64 AddressRangeMemoryMappingAttribute;
+#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
+#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
+#define EFI_ACPI_6_0_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
+#define EFI_ACPI_6_0_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
+#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
+#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
+#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
+#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
+#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
+#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
+typedef struct {
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 SPARangeStructureIndex;
+ UINT16 Flags;
+ UINT32 Reserved_8;
+ UINT32 ProximityDomain;
+ GUID AddressRangeTypeGUID;
+ UINT64 SystemPhysicalAddressRangeBase;
+ UINT64 SystemPhysicalAddressRangeLength;
+ UINT64 AddressRangeMemoryMappingAttribute;
} EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;
//
// Definition for Memory Device to System Physical Address Range Mapping Structure
//
typedef struct {
- UINT32 DIMMNumber:4;
- UINT32 MemoryChannelNumber:4;
- UINT32 MemoryControllerID:4;
- UINT32 SocketID:4;
- UINT32 NodeControllerID:12;
- UINT32 Reserved_28:4;
+ UINT32 DIMMNumber : 4;
+ UINT32 MemoryChannelNumber : 4;
+ UINT32 MemoryControllerID : 4;
+ UINT32 SocketID : 4;
+ UINT32 NodeControllerID : 12;
+ UINT32 Reserved_28 : 4;
} EFI_ACPI_6_0_NFIT_DEVICE_HANDLE;
#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0
@@ -1435,155 +1430,161 @@ typedef struct {
#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4
#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5
typedef struct {
- UINT16 Type;
- UINT16 Length;
- EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;
- UINT16 MemoryDevicePhysicalID;
- UINT16 MemoryDeviceRegionID;
- UINT16 SPARangeStructureIndex ;
- UINT16 NVDIMMControlRegionStructureIndex;
- UINT64 MemoryDeviceRegionSize;
- UINT64 RegionOffset;
- UINT64 MemoryDevicePhysicalAddressRegionBase;
- UINT16 InterleaveStructureIndex;
- UINT16 InterleaveWays;
- UINT16 MemoryDeviceStateFlags;
- UINT16 Reserved_46;
+ UINT16 Type;
+ UINT16 Length;
+ EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;
+ UINT16 MemoryDevicePhysicalID;
+ UINT16 MemoryDeviceRegionID;
+ UINT16 SPARangeStructureIndex;
+ UINT16 NVDIMMControlRegionStructureIndex;
+ UINT64 MemoryDeviceRegionSize;
+ UINT64 RegionOffset;
+ UINT64 MemoryDevicePhysicalAddressRegionBase;
+ UINT16 InterleaveStructureIndex;
+ UINT16 InterleaveWays;
+ UINT16 MemoryDeviceStateFlags;
+ UINT16 Reserved_46;
} EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_TO_SYSTEM_ADDRESS_RANGE_MAP_STRUCTURE;
//
// Definition for Interleave Structure
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT16 InterleaveStructureIndex;
- UINT16 Reserved_6;
- UINT32 NumberOfLines;
- UINT32 LineSize;
-//UINT32 LineOffset[NumberOfLines];
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 InterleaveStructureIndex;
+ UINT16 Reserved_6;
+ UINT32 NumberOfLines;
+ UINT32 LineSize;
+ // UINT32 LineOffset[NumberOfLines];
} EFI_ACPI_6_0_NFIT_INTERLEAVE_STRUCTURE;
//
// Definition for SMBIOS Management Information Structure
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT32 Reserved_4;
-//UINT8 Data[];
+ UINT16 Type;
+ UINT16 Length;
+ UINT32 Reserved_4;
+ // UINT8 Data[];
} EFI_ACPI_6_0_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;
//
// Definition for NVDIMM Control Region Structure
//
-#define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
-typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT16 NVDIMMControlRegionStructureIndex;
- UINT16 VendorID;
- UINT16 DeviceID;
- UINT16 RevisionID;
- UINT16 SubsystemVendorID;
- UINT16 SubsystemDeviceID;
- UINT16 SubsystemRevisionID;
- UINT8 Reserved_18[6];
- UINT32 SerialNumber;
- UINT16 RegionFormatInterfaceCode;
- UINT16 NumberOfBlockControlWindows;
- UINT64 SizeOfBlockControlWindow;
- UINT64 CommandRegisterOffsetInBlockControlWindow;
- UINT64 SizeOfCommandRegisterInBlockControlWindows;
- UINT64 StatusRegisterOffsetInBlockControlWindow;
- UINT64 SizeOfStatusRegisterInBlockControlWindows;
- UINT16 NVDIMMControlRegionFlag;
- UINT8 Reserved_74[6];
+#define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
+typedef struct {
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 NVDIMMControlRegionStructureIndex;
+ UINT16 VendorID;
+ UINT16 DeviceID;
+ UINT16 RevisionID;
+ UINT16 SubsystemVendorID;
+ UINT16 SubsystemDeviceID;
+ UINT16 SubsystemRevisionID;
+ UINT8 Reserved_18[6];
+ UINT32 SerialNumber;
+ UINT16 RegionFormatInterfaceCode;
+ UINT16 NumberOfBlockControlWindows;
+ UINT64 SizeOfBlockControlWindow;
+ UINT64 CommandRegisterOffsetInBlockControlWindow;
+ UINT64 SizeOfCommandRegisterInBlockControlWindows;
+ UINT64 StatusRegisterOffsetInBlockControlWindow;
+ UINT64 SizeOfStatusRegisterInBlockControlWindows;
+ UINT16 NVDIMMControlRegionFlag;
+ UINT8 Reserved_74[6];
} EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;
//
// Definition for NVDIMM Block Data Window Region Structure
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT16 NVDIMMControlRegionStructureIndex;
- UINT16 NumberOfBlockDataWindows;
- UINT64 BlockDataWindowStartOffset;
- UINT64 SizeOfBlockDataWindow;
- UINT64 BlockAccessibleMemoryCapacity;
- UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 NVDIMMControlRegionStructureIndex;
+ UINT16 NumberOfBlockDataWindows;
+ UINT64 BlockDataWindowStartOffset;
+ UINT64 SizeOfBlockDataWindow;
+ UINT64 BlockAccessibleMemoryCapacity;
+ UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
} EFI_ACPI_6_0_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;
//
// Definition for Flush Hint Address Structure
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
- EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;
- UINT16 NumberOfFlushHintAddresses;
- UINT8 Reserved_10[6];
-//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
+ UINT16 Type;
+ UINT16 Length;
+ EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;
+ UINT16 NumberOfFlushHintAddresses;
+ UINT8 Reserved_10[6];
+ // UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
} EFI_ACPI_6_0_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;
///
/// Boot Error Record Table (BERT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 BootErrorRegionLength;
- UINT64 BootErrorRegion;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
} EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER;
///
/// BERT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
- UINT32 UncorrectableErrorValid:1;
- UINT32 CorrectableErrorValid:1;
- UINT32 MultipleUncorrectableErrors:1;
- UINT32 MultipleCorrectableErrors:1;
- UINT32 ErrorDataEntryCount:10;
- UINT32 Reserved:18;
+ UINT32 UncorrectableErrorValid : 1;
+ UINT32 CorrectableErrorValid : 1;
+ UINT32 MultipleUncorrectableErrors : 1;
+ UINT32 MultipleCorrectableErrors : 1;
+ UINT32 ErrorDataEntryCount : 10;
+ UINT32 Reserved : 18;
} EFI_ACPI_6_0_ERROR_BLOCK_STATUS;
///
/// Boot Error Region Definition
///
typedef struct {
- EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_6_0_BOOT_ERROR_REGION_STRUCTURE;
//
// Boot Error Severity types
//
-#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_6_0_ERROR_SEVERITY_RECOVERABLE 0x00
#define EFI_ACPI_6_0_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_6_0_ERROR_SEVERITY_NONE 0x03
+//
+// The term 'Correctable' is no longer being used as an error severity of the
+// reported error since ACPI Specification Version 5.1 Errata B.
+// The below macro is considered as deprecated and should no longer be used.
+//
+#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00
///
/// Generic Error Data Entry Definition
///
typedef struct {
- UINT8 SectionType[16];
- UINT32 ErrorSeverity;
- UINT16 Revision;
- UINT8 ValidationBits;
- UINT8 Flags;
- UINT32 ErrorDataLength;
- UINT8 FruId[16];
- UINT8 FruText[20];
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
} EFI_ACPI_6_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
///
@@ -1595,14 +1596,14 @@ typedef struct {
/// HEST - Hardware Error Source Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 ErrorSourceCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
} EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
///
/// HEST Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
@@ -1618,435 +1619,437 @@ typedef struct {
//
// Error Source structure flags.
//
-#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
-#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT64 GlobalCapabilityInitData;
- UINT64 GlobalControlInitData;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[7];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
} EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
- UINT8 BankNumber;
- UINT8 ClearStatusOnInitialization;
- UINT8 StatusDataFormat;
- UINT8 Reserved0;
- UINT32 ControlRegisterMsrAddress;
- UINT64 ControlInitData;
- UINT32 StatusRegisterMsrAddress;
- UINT32 AddressRegisterMsrAddress;
- UINT32 MiscRegisterMsrAddress;
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
} EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
-#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
-#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
-#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
//
// Hardware Error Notification types. All other values are reserved
//
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
- UINT16 Type:1;
- UINT16 PollInterval:1;
- UINT16 SwitchToPollingThresholdValue:1;
- UINT16 SwitchToPollingThresholdWindow:1;
- UINT16 ErrorThresholdValue:1;
- UINT16 ErrorThresholdWindow:1;
- UINT16 Reserved:10;
+ UINT16 Type : 1;
+ UINT16 PollInterval : 1;
+ UINT16 SwitchToPollingThresholdValue : 1;
+ UINT16 SwitchToPollingThresholdWindow : 1;
+ UINT16 ErrorThresholdValue : 1;
+ UINT16 ErrorThresholdWindow : 1;
+ UINT16 Reserved : 10;
} EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
- UINT32 PollInterval;
- UINT32 Vector;
- UINT32 SwitchToPollingThresholdValue;
- UINT32 SwitchToPollingThresholdWindow;
- UINT32 ErrorThresholdValue;
- UINT32 ErrorThresholdWindow;
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
} EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[3];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
} EFI_ACPI_6_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
} EFI_ACPI_6_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 RootErrorCommand;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
} EFI_ACPI_6_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_6_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 SecondaryUncorrectableErrorMask;
- UINT32 SecondaryUncorrectableErrorSeverity;
- UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_6_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT16 RelatedSourceId;
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
- EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT32 ErrorStatusBlockLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
} EFI_ACPI_6_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
///
/// Generic Error Status Definition
///
typedef struct {
- EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_6_0_GENERIC_ERROR_STATUS_STRUCTURE;
///
/// ERST - Error Record Serialization Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 SerializationHeaderSize;
- UINT8 Reserved0[4];
- UINT32 InstructionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
} EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
///
/// ERST Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
///
/// ERST Serialization Actions
///
-#define EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION 0x00
-#define EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION 0x01
-#define EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION 0x02
-#define EFI_ACPI_6_0_ERST_END_OPERATION 0x03
-#define EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET 0x04
-#define EFI_ACPI_6_0_ERST_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER 0x08
-#define EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER 0x09
-#define EFI_ACPI_6_0_ERST_GET_RECORD_COUNT 0x0A
-#define EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
-#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
-#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
-#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+#define EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_6_0_ERST_END_OPERATION 0x03
+#define EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_6_0_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_6_0_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
///
/// ERST Action Command Status
///
-#define EFI_ACPI_6_0_ERST_STATUS_SUCCESS 0x00
-#define EFI_ACPI_6_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
-#define EFI_ACPI_6_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
-#define EFI_ACPI_6_0_ERST_STATUS_FAILED 0x03
-#define EFI_ACPI_6_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
-#define EFI_ACPI_6_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
+#define EFI_ACPI_6_0_ERST_STATUS_SUCCESS 0x00
+#define EFI_ACPI_6_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_6_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_6_0_ERST_STATUS_FAILED 0x03
+#define EFI_ACPI_6_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_6_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
-#define EFI_ACPI_6_0_ERST_READ_REGISTER 0x00
-#define EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_6_0_ERST_WRITE_REGISTER 0x02
-#define EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_6_0_ERST_NOOP 0x04
-#define EFI_ACPI_6_0_ERST_LOAD_VAR1 0x05
-#define EFI_ACPI_6_0_ERST_LOAD_VAR2 0x06
-#define EFI_ACPI_6_0_ERST_STORE_VAR1 0x07
-#define EFI_ACPI_6_0_ERST_ADD 0x08
-#define EFI_ACPI_6_0_ERST_SUBTRACT 0x09
-#define EFI_ACPI_6_0_ERST_ADD_VALUE 0x0A
-#define EFI_ACPI_6_0_ERST_SUBTRACT_VALUE 0x0B
-#define EFI_ACPI_6_0_ERST_STALL 0x0C
-#define EFI_ACPI_6_0_ERST_STALL_WHILE_TRUE 0x0D
-#define EFI_ACPI_6_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
-#define EFI_ACPI_6_0_ERST_GOTO 0x0F
-#define EFI_ACPI_6_0_ERST_SET_SRC_ADDRESS_BASE 0x10
-#define EFI_ACPI_6_0_ERST_SET_DST_ADDRESS_BASE 0x11
-#define EFI_ACPI_6_0_ERST_MOVE_DATA 0x12
+#define EFI_ACPI_6_0_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_6_0_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_6_0_ERST_NOOP 0x04
+#define EFI_ACPI_6_0_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_6_0_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_6_0_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_6_0_ERST_ADD 0x08
+#define EFI_ACPI_6_0_ERST_SUBTRACT 0x09
+#define EFI_ACPI_6_0_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_6_0_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_6_0_ERST_STALL 0x0C
+#define EFI_ACPI_6_0_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_6_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_6_0_ERST_GOTO 0x0F
+#define EFI_ACPI_6_0_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_6_0_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_6_0_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
-#define EFI_ACPI_6_0_ERST_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_6_0_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
- UINT8 SerializationAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_6_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
///
/// EINJ - Error Injection Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 InjectionHeaderSize;
- UINT8 InjectionFlags;
- UINT8 Reserved0[3];
- UINT32 InjectionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
} EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER;
///
/// EINJ Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
-#define EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
-#define EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
-#define EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE 0x02
-#define EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE 0x03
-#define EFI_ACPI_6_0_EINJ_END_OPERATION 0x04
-#define EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_6_0_EINJ_TRIGGER_ERROR 0xFF
+#define EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_6_0_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_6_0_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
-#define EFI_ACPI_6_0_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_6_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
-#define EFI_ACPI_6_0_EINJ_STATUS_INVALID_ACCESS 0x02
+#define EFI_ACPI_6_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_6_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_6_0_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
-#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
-#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
-#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
-#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
-#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
-#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
-#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
-#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
-#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
-#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
-#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
-#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
///
/// EINJ Injection Instructions
///
-#define EFI_ACPI_6_0_EINJ_READ_REGISTER 0x00
-#define EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER 0x02
-#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_6_0_EINJ_NOOP 0x04
+#define EFI_ACPI_6_0_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_6_0_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
-#define EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
- UINT8 InjectionAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
///
/// EINJ Trigger Action Table
///
typedef struct {
- UINT32 HeaderSize;
- UINT32 Revision;
- UINT32 TableSize;
- UINT32 EntryCount;
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
} EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE;
///
/// Platform Communications Channel Table (PCCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Flags;
- UINT64 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 Reserved;
} EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
///
/// PCCT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
///
/// PCCT Global Flags
///
-#define EFI_ACPI_6_0_PCCT_FLAGS_SCI_DOORBELL BIT0
+#define EFI_ACPI_6_0_PCCT_FLAGS_SCI_DOORBELL BIT0
//
// PCCT Subspace type
//
-#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02
///
/// PCC Subspace Structure Header
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
+ UINT8 Type;
+ UINT8 Length;
} EFI_ACPI_6_0_PCCT_SUBSPACE_HEADER;
///
/// Generic Communications Subspace Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[6];
- UINT64 BaseAddress;
- UINT64 AddressLength;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
- UINT64 DoorbellPreserve;
- UINT64 DoorbellWrite;
- UINT32 NominalLatency;
- UINT32 MaximumPeriodicAccessRate;
- UINT16 MinimumRequestTurnaroundTime;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
} EFI_ACPI_6_0_PCCT_SUBSPACE_GENERIC;
///
@@ -2054,18 +2057,18 @@ typedef struct {
///
typedef struct {
- UINT8 Command;
- UINT8 Reserved:7;
- UINT8 GenerateSci:1;
+ UINT8 Command;
+ UINT8 Reserved : 7;
+ UINT8 GenerateSci : 1;
} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
typedef struct {
- UINT8 CommandComplete:1;
- UINT8 SciDoorbell:1;
- UINT8 Error:1;
- UINT8 PlatformNotification:1;
- UINT8 Reserved:4;
- UINT8 Reserved1;
+ UINT8 CommandComplete : 1;
+ UINT8 SciDoorbell : 1;
+ UINT8 Error : 1;
+ UINT8 PlatformNotification : 1;
+ UINT8 Reserved : 4;
+ UINT8 Reserved1;
} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
typedef struct {
@@ -2074,6 +2077,50 @@ typedef struct {
EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_POLARITY BIT0
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_MODE BIT1
+
+///
+/// Type 1 HW-Reduced Communications Subspace Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 DoorbellInterrupt;
+ UINT8 DoorbellInterruptFlags;
+ UINT8 Reserved;
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
+} EFI_ACPI_6_0_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;
+
+///
+/// Type 2 HW-Reduced Communications Subspace Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 DoorbellInterrupt;
+ UINT8 DoorbellInterruptFlags;
+ UINT8 Reserved;
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellAckRegister;
+ UINT64 DoorbellAckPreserve;
+ UINT64 DoorbellAckWrite;
+} EFI_ACPI_6_0_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;
+
//
// Known table signatures
//
@@ -2284,12 +2331,17 @@ typedef struct {
#define EFI_ACPI_6_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
///
+/// "PCCT" Platform Communications Channel Table
+///
+#define EFI_ACPI_6_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
+
+///
/// "SLIC" MS Software Licensing Table Specification
///
#define EFI_ACPI_6_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_6_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/AcpiAml.h b/src/include/ipxe/efi/IndustryStandard/AcpiAml.h
index a9186b40f..d7a83f7fa 100644
--- a/src/include/ipxe/efi/IndustryStandard/AcpiAml.h
+++ b/src/include/ipxe/efi/IndustryStandard/AcpiAml.h
@@ -2,20 +2,15 @@
This file contains AML code definition in the latest ACPI spec.
Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2019 - 2021, Arm Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_AML_H_
#define _ACPI_AML_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// ACPI AML definition
@@ -24,154 +19,168 @@ FILE_LICENCE ( BSD3 );
//
// Primary OpCode
//
-#define AML_ZERO_OP 0x00
-#define AML_ONE_OP 0x01
-#define AML_ALIAS_OP 0x06
-#define AML_NAME_OP 0x08
-#define AML_BYTE_PREFIX 0x0a
-#define AML_WORD_PREFIX 0x0b
-#define AML_DWORD_PREFIX 0x0c
-#define AML_STRING_PREFIX 0x0d
-#define AML_QWORD_PREFIX 0x0e
-#define AML_SCOPE_OP 0x10
-#define AML_BUFFER_OP 0x11
-#define AML_PACKAGE_OP 0x12
-#define AML_VAR_PACKAGE_OP 0x13
-#define AML_METHOD_OP 0x14
-#define AML_DUAL_NAME_PREFIX 0x2e
-#define AML_MULTI_NAME_PREFIX 0x2f
-#define AML_NAME_CHAR_A 0x41
-#define AML_NAME_CHAR_B 0x42
-#define AML_NAME_CHAR_C 0x43
-#define AML_NAME_CHAR_D 0x44
-#define AML_NAME_CHAR_E 0x45
-#define AML_NAME_CHAR_F 0x46
-#define AML_NAME_CHAR_G 0x47
-#define AML_NAME_CHAR_H 0x48
-#define AML_NAME_CHAR_I 0x49
-#define AML_NAME_CHAR_J 0x4a
-#define AML_NAME_CHAR_K 0x4b
-#define AML_NAME_CHAR_L 0x4c
-#define AML_NAME_CHAR_M 0x4d
-#define AML_NAME_CHAR_N 0x4e
-#define AML_NAME_CHAR_O 0x4f
-#define AML_NAME_CHAR_P 0x50
-#define AML_NAME_CHAR_Q 0x51
-#define AML_NAME_CHAR_R 0x52
-#define AML_NAME_CHAR_S 0x53
-#define AML_NAME_CHAR_T 0x54
-#define AML_NAME_CHAR_U 0x55
-#define AML_NAME_CHAR_V 0x56
-#define AML_NAME_CHAR_W 0x57
-#define AML_NAME_CHAR_X 0x58
-#define AML_NAME_CHAR_Y 0x59
-#define AML_NAME_CHAR_Z 0x5a
-#define AML_ROOT_CHAR 0x5c
-#define AML_PARENT_PREFIX_CHAR 0x5e
-#define AML_NAME_CHAR__ 0x5f
-#define AML_LOCAL0 0x60
-#define AML_LOCAL1 0x61
-#define AML_LOCAL2 0x62
-#define AML_LOCAL3 0x63
-#define AML_LOCAL4 0x64
-#define AML_LOCAL5 0x65
-#define AML_LOCAL6 0x66
-#define AML_LOCAL7 0x67
-#define AML_ARG0 0x68
-#define AML_ARG1 0x69
-#define AML_ARG2 0x6a
-#define AML_ARG3 0x6b
-#define AML_ARG4 0x6c
-#define AML_ARG5 0x6d
-#define AML_ARG6 0x6e
-#define AML_STORE_OP 0x70
-#define AML_REF_OF_OP 0x71
-#define AML_ADD_OP 0x72
-#define AML_CONCAT_OP 0x73
-#define AML_SUBTRACT_OP 0x74
-#define AML_INCREMENT_OP 0x75
-#define AML_DECREMENT_OP 0x76
-#define AML_MULTIPLY_OP 0x77
-#define AML_DIVIDE_OP 0x78
-#define AML_SHIFT_LEFT_OP 0x79
-#define AML_SHIFT_RIGHT_OP 0x7a
-#define AML_AND_OP 0x7b
-#define AML_NAND_OP 0x7c
-#define AML_OR_OP 0x7d
-#define AML_NOR_OP 0x7e
-#define AML_XOR_OP 0x7f
-#define AML_NOT_OP 0x80
-#define AML_FIND_SET_LEFT_BIT_OP 0x81
-#define AML_FIND_SET_RIGHT_BIT_OP 0x82
-#define AML_DEREF_OF_OP 0x83
-#define AML_CONCAT_RES_OP 0x84
-#define AML_MOD_OP 0x85
-#define AML_NOTIFY_OP 0x86
-#define AML_SIZE_OF_OP 0x87
-#define AML_INDEX_OP 0x88
-#define AML_MATCH_OP 0x89
-#define AML_CREATE_DWORD_FIELD_OP 0x8a
-#define AML_CREATE_WORD_FIELD_OP 0x8b
-#define AML_CREATE_BYTE_FIELD_OP 0x8c
-#define AML_CREATE_BIT_FIELD_OP 0x8d
-#define AML_OBJECT_TYPE_OP 0x8e
-#define AML_CREATE_QWORD_FIELD_OP 0x8f
-#define AML_LAND_OP 0x90
-#define AML_LOR_OP 0x91
-#define AML_LNOT_OP 0x92
-#define AML_LEQUAL_OP 0x93
-#define AML_LGREATER_OP 0x94
-#define AML_LLESS_OP 0x95
-#define AML_TO_BUFFER_OP 0x96
-#define AML_TO_DEC_STRING_OP 0x97
-#define AML_TO_HEX_STRING_OP 0x98
-#define AML_TO_INTEGER_OP 0x99
-#define AML_TO_STRING_OP 0x9c
-#define AML_COPY_OBJECT_OP 0x9d
-#define AML_MID_OP 0x9e
-#define AML_CONTINUE_OP 0x9f
-#define AML_IF_OP 0xa0
-#define AML_ELSE_OP 0xa1
-#define AML_WHILE_OP 0xa2
-#define AML_NOOP_OP 0xa3
-#define AML_RETURN_OP 0xa4
-#define AML_BREAK_OP 0xa5
-#define AML_BREAK_POINT_OP 0xcc
-#define AML_ONES_OP 0xff
+#define AML_ZERO_OP 0x00
+#define AML_ONE_OP 0x01
+#define AML_ALIAS_OP 0x06
+#define AML_NAME_OP 0x08
+#define AML_BYTE_PREFIX 0x0a
+#define AML_WORD_PREFIX 0x0b
+#define AML_DWORD_PREFIX 0x0c
+#define AML_STRING_PREFIX 0x0d
+#define AML_QWORD_PREFIX 0x0e
+#define AML_SCOPE_OP 0x10
+#define AML_BUFFER_OP 0x11
+#define AML_PACKAGE_OP 0x12
+#define AML_VAR_PACKAGE_OP 0x13
+#define AML_METHOD_OP 0x14
+#define AML_EXTERNAL_OP 0x15
+#define AML_DUAL_NAME_PREFIX 0x2e
+#define AML_MULTI_NAME_PREFIX 0x2f
+#define AML_NAME_CHAR_A 0x41
+#define AML_NAME_CHAR_B 0x42
+#define AML_NAME_CHAR_C 0x43
+#define AML_NAME_CHAR_D 0x44
+#define AML_NAME_CHAR_E 0x45
+#define AML_NAME_CHAR_F 0x46
+#define AML_NAME_CHAR_G 0x47
+#define AML_NAME_CHAR_H 0x48
+#define AML_NAME_CHAR_I 0x49
+#define AML_NAME_CHAR_J 0x4a
+#define AML_NAME_CHAR_K 0x4b
+#define AML_NAME_CHAR_L 0x4c
+#define AML_NAME_CHAR_M 0x4d
+#define AML_NAME_CHAR_N 0x4e
+#define AML_NAME_CHAR_O 0x4f
+#define AML_NAME_CHAR_P 0x50
+#define AML_NAME_CHAR_Q 0x51
+#define AML_NAME_CHAR_R 0x52
+#define AML_NAME_CHAR_S 0x53
+#define AML_NAME_CHAR_T 0x54
+#define AML_NAME_CHAR_U 0x55
+#define AML_NAME_CHAR_V 0x56
+#define AML_NAME_CHAR_W 0x57
+#define AML_NAME_CHAR_X 0x58
+#define AML_NAME_CHAR_Y 0x59
+#define AML_NAME_CHAR_Z 0x5a
+#define AML_ROOT_CHAR 0x5c
+#define AML_PARENT_PREFIX_CHAR 0x5e
+#define AML_NAME_CHAR__ 0x5f
+#define AML_LOCAL0 0x60
+#define AML_LOCAL1 0x61
+#define AML_LOCAL2 0x62
+#define AML_LOCAL3 0x63
+#define AML_LOCAL4 0x64
+#define AML_LOCAL5 0x65
+#define AML_LOCAL6 0x66
+#define AML_LOCAL7 0x67
+#define AML_ARG0 0x68
+#define AML_ARG1 0x69
+#define AML_ARG2 0x6a
+#define AML_ARG3 0x6b
+#define AML_ARG4 0x6c
+#define AML_ARG5 0x6d
+#define AML_ARG6 0x6e
+#define AML_STORE_OP 0x70
+#define AML_REF_OF_OP 0x71
+#define AML_ADD_OP 0x72
+#define AML_CONCAT_OP 0x73
+#define AML_SUBTRACT_OP 0x74
+#define AML_INCREMENT_OP 0x75
+#define AML_DECREMENT_OP 0x76
+#define AML_MULTIPLY_OP 0x77
+#define AML_DIVIDE_OP 0x78
+#define AML_SHIFT_LEFT_OP 0x79
+#define AML_SHIFT_RIGHT_OP 0x7a
+#define AML_AND_OP 0x7b
+#define AML_NAND_OP 0x7c
+#define AML_OR_OP 0x7d
+#define AML_NOR_OP 0x7e
+#define AML_XOR_OP 0x7f
+#define AML_NOT_OP 0x80
+#define AML_FIND_SET_LEFT_BIT_OP 0x81
+#define AML_FIND_SET_RIGHT_BIT_OP 0x82
+#define AML_DEREF_OF_OP 0x83
+#define AML_CONCAT_RES_OP 0x84
+#define AML_MOD_OP 0x85
+#define AML_NOTIFY_OP 0x86
+#define AML_SIZE_OF_OP 0x87
+#define AML_INDEX_OP 0x88
+#define AML_MATCH_OP 0x89
+#define AML_CREATE_DWORD_FIELD_OP 0x8a
+#define AML_CREATE_WORD_FIELD_OP 0x8b
+#define AML_CREATE_BYTE_FIELD_OP 0x8c
+#define AML_CREATE_BIT_FIELD_OP 0x8d
+#define AML_OBJECT_TYPE_OP 0x8e
+#define AML_CREATE_QWORD_FIELD_OP 0x8f
+#define AML_LAND_OP 0x90
+#define AML_LOR_OP 0x91
+#define AML_LNOT_OP 0x92
+#define AML_LEQUAL_OP 0x93
+#define AML_LGREATER_OP 0x94
+#define AML_LLESS_OP 0x95
+#define AML_TO_BUFFER_OP 0x96
+#define AML_TO_DEC_STRING_OP 0x97
+#define AML_TO_HEX_STRING_OP 0x98
+#define AML_TO_INTEGER_OP 0x99
+#define AML_TO_STRING_OP 0x9c
+#define AML_COPY_OBJECT_OP 0x9d
+#define AML_MID_OP 0x9e
+#define AML_CONTINUE_OP 0x9f
+#define AML_IF_OP 0xa0
+#define AML_ELSE_OP 0xa1
+#define AML_WHILE_OP 0xa2
+#define AML_NOOP_OP 0xa3
+#define AML_RETURN_OP 0xa4
+#define AML_BREAK_OP 0xa5
+#define AML_BREAK_POINT_OP 0xcc
+#define AML_ONES_OP 0xff
//
// Extended OpCode
//
-#define AML_EXT_OP 0x5b
+#define AML_EXT_OP 0x5b
+
+#define AML_EXT_MUTEX_OP 0x01
+#define AML_EXT_EVENT_OP 0x02
+#define AML_EXT_COND_REF_OF_OP 0x12
+#define AML_EXT_CREATE_FIELD_OP 0x13
+#define AML_EXT_LOAD_TABLE_OP 0x1f
+#define AML_EXT_LOAD_OP 0x20
+#define AML_EXT_STALL_OP 0x21
+#define AML_EXT_SLEEP_OP 0x22
+#define AML_EXT_ACQUIRE_OP 0x23
+#define AML_EXT_SIGNAL_OP 0x24
+#define AML_EXT_WAIT_OP 0x25
+#define AML_EXT_RESET_OP 0x26
+#define AML_EXT_RELEASE_OP 0x27
+#define AML_EXT_FROM_BCD_OP 0x28
+#define AML_EXT_TO_BCD_OP 0x29
+#define AML_EXT_UNLOAD_OP 0x2a
+#define AML_EXT_REVISION_OP 0x30
+#define AML_EXT_DEBUG_OP 0x31
+#define AML_EXT_FATAL_OP 0x32
+#define AML_EXT_TIMER_OP 0x33
+#define AML_EXT_REGION_OP 0x80
+#define AML_EXT_FIELD_OP 0x81
+#define AML_EXT_DEVICE_OP 0x82
+#define AML_EXT_PROCESSOR_OP 0x83
+#define AML_EXT_POWER_RES_OP 0x84
+#define AML_EXT_THERMAL_ZONE_OP 0x85
+#define AML_EXT_INDEX_FIELD_OP 0x86
+#define AML_EXT_BANK_FIELD_OP 0x87
+#define AML_EXT_DATA_REGION_OP 0x88
-#define AML_EXT_MUTEX_OP 0x01
-#define AML_EXT_EVENT_OP 0x02
-#define AML_EXT_COND_REF_OF_OP 0x12
-#define AML_EXT_CREATE_FIELD_OP 0x13
-#define AML_EXT_LOAD_TABLE_OP 0x1f
-#define AML_EXT_LOAD_OP 0x20
-#define AML_EXT_STALL_OP 0x21
-#define AML_EXT_SLEEP_OP 0x22
-#define AML_EXT_ACQUIRE_OP 0x23
-#define AML_EXT_SIGNAL_OP 0x24
-#define AML_EXT_WAIT_OP 0x25
-#define AML_EXT_RESET_OP 0x26
-#define AML_EXT_RELEASE_OP 0x27
-#define AML_EXT_FROM_BCD_OP 0x28
-#define AML_EXT_TO_BCD_OP 0x29
-#define AML_EXT_UNLOAD_OP 0x2a
-#define AML_EXT_REVISION_OP 0x30
-#define AML_EXT_DEBUG_OP 0x31
-#define AML_EXT_FATAL_OP 0x32
-#define AML_EXT_TIMER_OP 0x33
-#define AML_EXT_REGION_OP 0x80
-#define AML_EXT_FIELD_OP 0x81
-#define AML_EXT_DEVICE_OP 0x82
-#define AML_EXT_PROCESSOR_OP 0x83
-#define AML_EXT_POWER_RES_OP 0x84
-#define AML_EXT_THERMAL_ZONE_OP 0x85
-#define AML_EXT_INDEX_FIELD_OP 0x86
-#define AML_EXT_BANK_FIELD_OP 0x87
-#define AML_EXT_DATA_REGION_OP 0x88
+//
+// FieldElement OpCode
+//
+#define AML_FIELD_RESERVED_OP 0x00
+#define AML_FIELD_ACCESS_OP 0x01
+#define AML_FIELD_CONNECTION_OP 0x02
+#define AML_FIELD_EXT_ACCESS_OP 0x03
+
+//
+// AML Name segment definitions
+//
+#define AML_NAME_SEG_SIZE 4
#endif
diff --git a/src/include/ipxe/efi/IndustryStandard/Bluetooth.h b/src/include/ipxe/efi/IndustryStandard/Bluetooth.h
index f63ab8901..97b6526b3 100644
--- a/src/include/ipxe/efi/IndustryStandard/Bluetooth.h
+++ b/src/include/ipxe/efi/IndustryStandard/Bluetooth.h
@@ -2,21 +2,15 @@
This file contains the Bluetooth definitions that are consumed by drivers.
These definitions are from Bluetooth Core Specification Version 4.0 June, 2010
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _BLUETOOTH_H_
#define _BLUETOOTH_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#pragma pack(1)
@@ -27,23 +21,38 @@ typedef struct {
///
/// 48bit Bluetooth device address.
///
- UINT8 Address[6];
+ UINT8 Address[6];
} BLUETOOTH_ADDRESS;
///
/// BLUETOOTH_CLASS_OF_DEVICE. See Bluetooth specification for detail.
///
typedef struct {
- UINT8 FormatType:2;
- UINT8 MinorDeviceClass: 6;
- UINT16 MajorDeviceClass: 5;
- UINT16 MajorServiceClass:11;
+ UINT8 FormatType : 2;
+ UINT8 MinorDeviceClass : 6;
+ UINT16 MajorDeviceClass : 5;
+ UINT16 MajorServiceClass : 11;
} BLUETOOTH_CLASS_OF_DEVICE;
+///
+/// BLUETOOTH_LE_ADDRESS
+///
+typedef struct {
+ ///
+ /// 48-bit Bluetooth device address
+ ///
+ UINT8 Address[6];
+ ///
+ /// 0x00 - Public Device Address
+ /// 0x01 - Random Device Address
+ ///
+ UINT8 Type;
+} BLUETOOTH_LE_ADDRESS;
+
#pragma pack()
-#define BLUETOOTH_HCI_COMMAND_LOCAL_READABLE_NAME_MAX_SIZE 248
+#define BLUETOOTH_HCI_COMMAND_LOCAL_READABLE_NAME_MAX_SIZE 248
-#define BLUETOOTH_HCI_LINK_KEY_SIZE 16
+#define BLUETOOTH_HCI_LINK_KEY_SIZE 16
#endif
diff --git a/src/include/ipxe/efi/IndustryStandard/Pci22.h b/src/include/ipxe/efi/IndustryStandard/Pci22.h
index c14d4b4bd..161333d88 100644
--- a/src/include/ipxe/efi/IndustryStandard/Pci22.h
+++ b/src/include/ipxe/efi/IndustryStandard/Pci22.h
@@ -5,24 +5,18 @@
PCI Local Bus Specification, 2.2
PCI-to-PCI Bridge Architecture Specification, Revision 1.2
PC Card Standard, 8.0
- PCI Power Management Interface Specifiction, Revision 1.2
+ PCI Power Management Interface Specification, Revision 1.2
- Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2015, Hewlett-Packard Development Company, L.P.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PCI22_H_
#define _PCI22_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define PCI_MAX_BUS 255
#define PCI_MAX_DEVICE 31
@@ -35,16 +29,16 @@ FILE_LICENCE ( BSD3 );
/// Section 6.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT16 VendorId;
- UINT16 DeviceId;
- UINT16 Command;
- UINT16 Status;
- UINT8 RevisionID;
- UINT8 ClassCode[3];
- UINT8 CacheLineSize;
- UINT8 LatencyTimer;
- UINT8 HeaderType;
- UINT8 BIST;
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT16 Command;
+ UINT16 Status;
+ UINT8 RevisionID;
+ UINT8 ClassCode[3];
+ UINT8 CacheLineSize;
+ UINT8 LatencyTimer;
+ UINT8 HeaderType;
+ UINT8 BIST;
} PCI_DEVICE_INDEPENDENT_REGION;
///
@@ -52,18 +46,18 @@ typedef struct {
/// Section 6.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT32 Bar[6];
- UINT32 CISPtr;
- UINT16 SubsystemVendorID;
- UINT16 SubsystemID;
- UINT32 ExpansionRomBar;
- UINT8 CapabilityPtr;
- UINT8 Reserved1[3];
- UINT32 Reserved2;
- UINT8 InterruptLine;
- UINT8 InterruptPin;
- UINT8 MinGnt;
- UINT8 MaxLat;
+ UINT32 Bar[6];
+ UINT32 CISPtr;
+ UINT16 SubsystemVendorID;
+ UINT16 SubsystemID;
+ UINT32 ExpansionRomBar;
+ UINT8 CapabilityPtr;
+ UINT8 Reserved1[3];
+ UINT32 Reserved2;
+ UINT8 InterruptLine;
+ UINT8 InterruptPin;
+ UINT8 MinGnt;
+ UINT8 MaxLat;
} PCI_DEVICE_HEADER_TYPE_REGION;
///
@@ -71,8 +65,8 @@ typedef struct {
/// Section 6.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- PCI_DEVICE_INDEPENDENT_REGION Hdr;
- PCI_DEVICE_HEADER_TYPE_REGION Device;
+ PCI_DEVICE_INDEPENDENT_REGION Hdr;
+ PCI_DEVICE_HEADER_TYPE_REGION Device;
} PCI_TYPE00;
///
@@ -80,28 +74,28 @@ typedef struct {
/// Section 3.2, PCI-PCI Bridge Architecture, Version 1.2
///
typedef struct {
- UINT32 Bar[2];
- UINT8 PrimaryBus;
- UINT8 SecondaryBus;
- UINT8 SubordinateBus;
- UINT8 SecondaryLatencyTimer;
- UINT8 IoBase;
- UINT8 IoLimit;
- UINT16 SecondaryStatus;
- UINT16 MemoryBase;
- UINT16 MemoryLimit;
- UINT16 PrefetchableMemoryBase;
- UINT16 PrefetchableMemoryLimit;
- UINT32 PrefetchableBaseUpper32;
- UINT32 PrefetchableLimitUpper32;
- UINT16 IoBaseUpper16;
- UINT16 IoLimitUpper16;
- UINT8 CapabilityPtr;
- UINT8 Reserved[3];
- UINT32 ExpansionRomBAR;
- UINT8 InterruptLine;
- UINT8 InterruptPin;
- UINT16 BridgeControl;
+ UINT32 Bar[2];
+ UINT8 PrimaryBus;
+ UINT8 SecondaryBus;
+ UINT8 SubordinateBus;
+ UINT8 SecondaryLatencyTimer;
+ UINT8 IoBase;
+ UINT8 IoLimit;
+ UINT16 SecondaryStatus;
+ UINT16 MemoryBase;
+ UINT16 MemoryLimit;
+ UINT16 PrefetchableMemoryBase;
+ UINT16 PrefetchableMemoryLimit;
+ UINT32 PrefetchableBaseUpper32;
+ UINT32 PrefetchableLimitUpper32;
+ UINT16 IoBaseUpper16;
+ UINT16 IoLimitUpper16;
+ UINT8 CapabilityPtr;
+ UINT8 Reserved[3];
+ UINT32 ExpansionRomBAR;
+ UINT8 InterruptLine;
+ UINT8 InterruptPin;
+ UINT16 BridgeControl;
} PCI_BRIDGE_CONTROL_REGISTER;
///
@@ -109,202 +103,202 @@ typedef struct {
/// Section 3.2, PCI-PCI Bridge Architecture, Version 1.2
///
typedef struct {
- PCI_DEVICE_INDEPENDENT_REGION Hdr;
- PCI_BRIDGE_CONTROL_REGISTER Bridge;
+ PCI_DEVICE_INDEPENDENT_REGION Hdr;
+ PCI_BRIDGE_CONTROL_REGISTER Bridge;
} PCI_TYPE01;
typedef union {
- PCI_TYPE00 Device;
- PCI_TYPE01 Bridge;
+ PCI_TYPE00 Device;
+ PCI_TYPE01 Bridge;
} PCI_TYPE_GENERIC;
///
-/// CardBus Conroller Configuration Space,
+/// CardBus Controller Configuration Space,
/// Section 4.5.1, PC Card Standard. 8.0
///
typedef struct {
- UINT32 CardBusSocketReg; ///< Cardus Socket/ExCA Base
- UINT8 Cap_Ptr;
- UINT8 Reserved;
- UINT16 SecondaryStatus; ///< Secondary Status
- UINT8 PciBusNumber; ///< PCI Bus Number
- UINT8 CardBusBusNumber; ///< CardBus Bus Number
- UINT8 SubordinateBusNumber; ///< Subordinate Bus Number
- UINT8 CardBusLatencyTimer; ///< CardBus Latency Timer
- UINT32 MemoryBase0; ///< Memory Base Register 0
- UINT32 MemoryLimit0; ///< Memory Limit Register 0
- UINT32 MemoryBase1;
- UINT32 MemoryLimit1;
- UINT32 IoBase0;
- UINT32 IoLimit0; ///< I/O Base Register 0
- UINT32 IoBase1; ///< I/O Limit Register 0
- UINT32 IoLimit1;
- UINT8 InterruptLine; ///< Interrupt Line
- UINT8 InterruptPin; ///< Interrupt Pin
- UINT16 BridgeControl; ///< Bridge Control
+ UINT32 CardBusSocketReg; ///< Cardbus Socket/ExCA Base
+ UINT8 Cap_Ptr;
+ UINT8 Reserved;
+ UINT16 SecondaryStatus; ///< Secondary Status
+ UINT8 PciBusNumber; ///< PCI Bus Number
+ UINT8 CardBusBusNumber; ///< CardBus Bus Number
+ UINT8 SubordinateBusNumber; ///< Subordinate Bus Number
+ UINT8 CardBusLatencyTimer; ///< CardBus Latency Timer
+ UINT32 MemoryBase0; ///< Memory Base Register 0
+ UINT32 MemoryLimit0; ///< Memory Limit Register 0
+ UINT32 MemoryBase1;
+ UINT32 MemoryLimit1;
+ UINT32 IoBase0;
+ UINT32 IoLimit0; ///< I/O Base Register 0
+ UINT32 IoBase1; ///< I/O Limit Register 0
+ UINT32 IoLimit1;
+ UINT8 InterruptLine; ///< Interrupt Line
+ UINT8 InterruptPin; ///< Interrupt Pin
+ UINT16 BridgeControl; ///< Bridge Control
} PCI_CARDBUS_CONTROL_REGISTER;
//
// Definitions of PCI class bytes and manipulation macros.
//
-#define PCI_CLASS_OLD 0x00
-#define PCI_CLASS_OLD_OTHER 0x00
-#define PCI_CLASS_OLD_VGA 0x01
-
-#define PCI_CLASS_MASS_STORAGE 0x01
-#define PCI_CLASS_MASS_STORAGE_SCSI 0x00
-#define PCI_CLASS_MASS_STORAGE_IDE 0x01
-#define PCI_CLASS_MASS_STORAGE_FLOPPY 0x02
-#define PCI_CLASS_MASS_STORAGE_IPI 0x03
-#define PCI_CLASS_MASS_STORAGE_RAID 0x04
-#define PCI_CLASS_MASS_STORAGE_OTHER 0x80
-
-#define PCI_CLASS_NETWORK 0x02
-#define PCI_CLASS_NETWORK_ETHERNET 0x00
-#define PCI_CLASS_NETWORK_TOKENRING 0x01
-#define PCI_CLASS_NETWORK_FDDI 0x02
-#define PCI_CLASS_NETWORK_ATM 0x03
-#define PCI_CLASS_NETWORK_ISDN 0x04
-#define PCI_CLASS_NETWORK_OTHER 0x80
-
-#define PCI_CLASS_DISPLAY 0x03
-#define PCI_CLASS_DISPLAY_VGA 0x00
-#define PCI_IF_VGA_VGA 0x00
-#define PCI_IF_VGA_8514 0x01
-#define PCI_CLASS_DISPLAY_XGA 0x01
-#define PCI_CLASS_DISPLAY_3D 0x02
-#define PCI_CLASS_DISPLAY_OTHER 0x80
-
-#define PCI_CLASS_MEDIA 0x04
-#define PCI_CLASS_MEDIA_VIDEO 0x00
-#define PCI_CLASS_MEDIA_AUDIO 0x01
-#define PCI_CLASS_MEDIA_TELEPHONE 0x02
-#define PCI_CLASS_MEDIA_OTHER 0x80
-
-#define PCI_CLASS_MEMORY_CONTROLLER 0x05
-#define PCI_CLASS_MEMORY_RAM 0x00
-#define PCI_CLASS_MEMORY_FLASH 0x01
-#define PCI_CLASS_MEMORY_OTHER 0x80
-
-#define PCI_CLASS_BRIDGE 0x06
-#define PCI_CLASS_BRIDGE_HOST 0x00
-#define PCI_CLASS_BRIDGE_ISA 0x01
-#define PCI_CLASS_BRIDGE_EISA 0x02
-#define PCI_CLASS_BRIDGE_MCA 0x03
-#define PCI_CLASS_BRIDGE_P2P 0x04
-#define PCI_IF_BRIDGE_P2P 0x00
-#define PCI_IF_BRIDGE_P2P_SUBTRACTIVE 0x01
-#define PCI_CLASS_BRIDGE_PCMCIA 0x05
-#define PCI_CLASS_BRIDGE_NUBUS 0x06
-#define PCI_CLASS_BRIDGE_CARDBUS 0x07
-#define PCI_CLASS_BRIDGE_RACEWAY 0x08
-#define PCI_CLASS_BRIDGE_OTHER 0x80
-#define PCI_CLASS_BRIDGE_ISA_PDECODE 0x80
-
-#define PCI_CLASS_SCC 0x07 ///< Simple communications controllers
-#define PCI_SUBCLASS_SERIAL 0x00
-#define PCI_IF_GENERIC_XT 0x00
-#define PCI_IF_16450 0x01
-#define PCI_IF_16550 0x02
-#define PCI_IF_16650 0x03
-#define PCI_IF_16750 0x04
-#define PCI_IF_16850 0x05
-#define PCI_IF_16950 0x06
-#define PCI_SUBCLASS_PARALLEL 0x01
-#define PCI_IF_PARALLEL_PORT 0x00
-#define PCI_IF_BI_DIR_PARALLEL_PORT 0x01
-#define PCI_IF_ECP_PARALLEL_PORT 0x02
-#define PCI_IF_1284_CONTROLLER 0x03
-#define PCI_IF_1284_DEVICE 0xFE
-#define PCI_SUBCLASS_MULTIPORT_SERIAL 0x02
-#define PCI_SUBCLASS_MODEM 0x03
-#define PCI_IF_GENERIC_MODEM 0x00
-#define PCI_IF_16450_MODEM 0x01
-#define PCI_IF_16550_MODEM 0x02
-#define PCI_IF_16650_MODEM 0x03
-#define PCI_IF_16750_MODEM 0x04
-#define PCI_SUBCLASS_SCC_OTHER 0x80
-
-#define PCI_CLASS_SYSTEM_PERIPHERAL 0x08
-#define PCI_SUBCLASS_PIC 0x00
-#define PCI_IF_8259_PIC 0x00
-#define PCI_IF_ISA_PIC 0x01
-#define PCI_IF_EISA_PIC 0x02
-#define PCI_IF_APIC_CONTROLLER 0x10 ///< I/O APIC interrupt controller , 32 bye none-prefectable memory.
-#define PCI_IF_APIC_CONTROLLER2 0x20
-#define PCI_SUBCLASS_DMA 0x01
-#define PCI_IF_8237_DMA 0x00
-#define PCI_IF_ISA_DMA 0x01
-#define PCI_IF_EISA_DMA 0x02
-#define PCI_SUBCLASS_TIMER 0x02
-#define PCI_IF_8254_TIMER 0x00
-#define PCI_IF_ISA_TIMER 0x01
-#define PCI_IF_EISA_TIMER 0x02
-#define PCI_SUBCLASS_RTC 0x03
-#define PCI_IF_GENERIC_RTC 0x00
-#define PCI_IF_ISA_RTC 0x01
-#define PCI_SUBCLASS_PNP_CONTROLLER 0x04 ///< HotPlug Controller
-#define PCI_SUBCLASS_PERIPHERAL_OTHER 0x80
-
-#define PCI_CLASS_INPUT_DEVICE 0x09
-#define PCI_SUBCLASS_KEYBOARD 0x00
-#define PCI_SUBCLASS_PEN 0x01
-#define PCI_SUBCLASS_MOUSE_CONTROLLER 0x02
-#define PCI_SUBCLASS_SCAN_CONTROLLER 0x03
-#define PCI_SUBCLASS_GAMEPORT 0x04
-#define PCI_IF_GAMEPORT 0x00
-#define PCI_IF_GAMEPORT1 0x10
-#define PCI_SUBCLASS_INPUT_OTHER 0x80
-
-#define PCI_CLASS_DOCKING_STATION 0x0A
+#define PCI_CLASS_OLD 0x00
+#define PCI_CLASS_OLD_OTHER 0x00
+#define PCI_CLASS_OLD_VGA 0x01
+
+#define PCI_CLASS_MASS_STORAGE 0x01
+#define PCI_CLASS_MASS_STORAGE_SCSI 0x00
+#define PCI_CLASS_MASS_STORAGE_IDE 0x01
+#define PCI_CLASS_MASS_STORAGE_FLOPPY 0x02
+#define PCI_CLASS_MASS_STORAGE_IPI 0x03
+#define PCI_CLASS_MASS_STORAGE_RAID 0x04
+#define PCI_CLASS_MASS_STORAGE_OTHER 0x80
+
+#define PCI_CLASS_NETWORK 0x02
+#define PCI_CLASS_NETWORK_ETHERNET 0x00
+#define PCI_CLASS_NETWORK_TOKENRING 0x01
+#define PCI_CLASS_NETWORK_FDDI 0x02
+#define PCI_CLASS_NETWORK_ATM 0x03
+#define PCI_CLASS_NETWORK_ISDN 0x04
+#define PCI_CLASS_NETWORK_OTHER 0x80
+
+#define PCI_CLASS_DISPLAY 0x03
+#define PCI_CLASS_DISPLAY_VGA 0x00
+#define PCI_IF_VGA_VGA 0x00
+#define PCI_IF_VGA_8514 0x01
+#define PCI_CLASS_DISPLAY_XGA 0x01
+#define PCI_CLASS_DISPLAY_3D 0x02
+#define PCI_CLASS_DISPLAY_OTHER 0x80
+
+#define PCI_CLASS_MEDIA 0x04
+#define PCI_CLASS_MEDIA_VIDEO 0x00
+#define PCI_CLASS_MEDIA_AUDIO 0x01
+#define PCI_CLASS_MEDIA_TELEPHONE 0x02
+#define PCI_CLASS_MEDIA_OTHER 0x80
+
+#define PCI_CLASS_MEMORY_CONTROLLER 0x05
+#define PCI_CLASS_MEMORY_RAM 0x00
+#define PCI_CLASS_MEMORY_FLASH 0x01
+#define PCI_CLASS_MEMORY_OTHER 0x80
+
+#define PCI_CLASS_BRIDGE 0x06
+#define PCI_CLASS_BRIDGE_HOST 0x00
+#define PCI_CLASS_BRIDGE_ISA 0x01
+#define PCI_CLASS_BRIDGE_EISA 0x02
+#define PCI_CLASS_BRIDGE_MCA 0x03
+#define PCI_CLASS_BRIDGE_P2P 0x04
+#define PCI_IF_BRIDGE_P2P 0x00
+#define PCI_IF_BRIDGE_P2P_SUBTRACTIVE 0x01
+#define PCI_CLASS_BRIDGE_PCMCIA 0x05
+#define PCI_CLASS_BRIDGE_NUBUS 0x06
+#define PCI_CLASS_BRIDGE_CARDBUS 0x07
+#define PCI_CLASS_BRIDGE_RACEWAY 0x08
+#define PCI_CLASS_BRIDGE_OTHER 0x80
+#define PCI_CLASS_BRIDGE_ISA_PDECODE 0x80
+
+#define PCI_CLASS_SCC 0x07///< Simple communications controllers
+#define PCI_SUBCLASS_SERIAL 0x00
+#define PCI_IF_GENERIC_XT 0x00
+#define PCI_IF_16450 0x01
+#define PCI_IF_16550 0x02
+#define PCI_IF_16650 0x03
+#define PCI_IF_16750 0x04
+#define PCI_IF_16850 0x05
+#define PCI_IF_16950 0x06
+#define PCI_SUBCLASS_PARALLEL 0x01
+#define PCI_IF_PARALLEL_PORT 0x00
+#define PCI_IF_BI_DIR_PARALLEL_PORT 0x01
+#define PCI_IF_ECP_PARALLEL_PORT 0x02
+#define PCI_IF_1284_CONTROLLER 0x03
+#define PCI_IF_1284_DEVICE 0xFE
+#define PCI_SUBCLASS_MULTIPORT_SERIAL 0x02
+#define PCI_SUBCLASS_MODEM 0x03
+#define PCI_IF_GENERIC_MODEM 0x00
+#define PCI_IF_16450_MODEM 0x01
+#define PCI_IF_16550_MODEM 0x02
+#define PCI_IF_16650_MODEM 0x03
+#define PCI_IF_16750_MODEM 0x04
+#define PCI_SUBCLASS_SCC_OTHER 0x80
+
+#define PCI_CLASS_SYSTEM_PERIPHERAL 0x08
+#define PCI_SUBCLASS_PIC 0x00
+#define PCI_IF_8259_PIC 0x00
+#define PCI_IF_ISA_PIC 0x01
+#define PCI_IF_EISA_PIC 0x02
+#define PCI_IF_APIC_CONTROLLER 0x10 ///< I/O APIC interrupt controller , 32 byte none-prefetchable memory.
+#define PCI_IF_APIC_CONTROLLER2 0x20
+#define PCI_SUBCLASS_DMA 0x01
+#define PCI_IF_8237_DMA 0x00
+#define PCI_IF_ISA_DMA 0x01
+#define PCI_IF_EISA_DMA 0x02
+#define PCI_SUBCLASS_TIMER 0x02
+#define PCI_IF_8254_TIMER 0x00
+#define PCI_IF_ISA_TIMER 0x01
+#define PCI_IF_EISA_TIMER 0x02
+#define PCI_SUBCLASS_RTC 0x03
+#define PCI_IF_GENERIC_RTC 0x00
+#define PCI_IF_ISA_RTC 0x01
+#define PCI_SUBCLASS_PNP_CONTROLLER 0x04 ///< HotPlug Controller
+#define PCI_SUBCLASS_PERIPHERAL_OTHER 0x80
+
+#define PCI_CLASS_INPUT_DEVICE 0x09
+#define PCI_SUBCLASS_KEYBOARD 0x00
+#define PCI_SUBCLASS_PEN 0x01
+#define PCI_SUBCLASS_MOUSE_CONTROLLER 0x02
+#define PCI_SUBCLASS_SCAN_CONTROLLER 0x03
+#define PCI_SUBCLASS_GAMEPORT 0x04
+#define PCI_IF_GAMEPORT 0x00
+#define PCI_IF_GAMEPORT1 0x10
+#define PCI_SUBCLASS_INPUT_OTHER 0x80
+
+#define PCI_CLASS_DOCKING_STATION 0x0A
#define PCI_SUBCLASS_DOCKING_GENERIC 0x00
#define PCI_SUBCLASS_DOCKING_OTHER 0x80
-#define PCI_CLASS_PROCESSOR 0x0B
-#define PCI_SUBCLASS_PROC_386 0x00
-#define PCI_SUBCLASS_PROC_486 0x01
-#define PCI_SUBCLASS_PROC_PENTIUM 0x02
-#define PCI_SUBCLASS_PROC_ALPHA 0x10
-#define PCI_SUBCLASS_PROC_POWERPC 0x20
-#define PCI_SUBCLASS_PROC_MIPS 0x30
-#define PCI_SUBCLASS_PROC_CO_PORC 0x40 ///< Co-Processor
-
-#define PCI_CLASS_SERIAL 0x0C
-#define PCI_CLASS_SERIAL_FIREWIRE 0x00
-#define PCI_IF_1394 0x00
-#define PCI_IF_1394_OPEN_HCI 0x10
-#define PCI_CLASS_SERIAL_ACCESS_BUS 0x01
-#define PCI_CLASS_SERIAL_SSA 0x02
-#define PCI_CLASS_SERIAL_USB 0x03
-#define PCI_IF_UHCI 0x00
-#define PCI_IF_OHCI 0x10
-#define PCI_IF_USB_OTHER 0x80
-#define PCI_IF_USB_DEVICE 0xFE
-#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04
-#define PCI_CLASS_SERIAL_SMB 0x05
-
-#define PCI_CLASS_WIRELESS 0x0D
-#define PCI_SUBCLASS_IRDA 0x00
-#define PCI_SUBCLASS_IR 0x01
-#define PCI_SUBCLASS_RF 0x10
-#define PCI_SUBCLASS_WIRELESS_OTHER 0x80
-
-#define PCI_CLASS_INTELLIGENT_IO 0x0E
-
-#define PCI_CLASS_SATELLITE 0x0F
-#define PCI_SUBCLASS_TV 0x01
-#define PCI_SUBCLASS_AUDIO 0x02
-#define PCI_SUBCLASS_VOICE 0x03
-#define PCI_SUBCLASS_DATA 0x04
-
-#define PCI_SECURITY_CONTROLLER 0x10 ///< Encryption and decryption controller
-#define PCI_SUBCLASS_NET_COMPUT 0x00
-#define PCI_SUBCLASS_ENTERTAINMENT 0x10
-#define PCI_SUBCLASS_SECURITY_OTHER 0x80
-
-#define PCI_CLASS_DPIO 0x11
-#define PCI_SUBCLASS_DPIO 0x00
-#define PCI_SUBCLASS_DPIO_OTHER 0x80
+#define PCI_CLASS_PROCESSOR 0x0B
+#define PCI_SUBCLASS_PROC_386 0x00
+#define PCI_SUBCLASS_PROC_486 0x01
+#define PCI_SUBCLASS_PROC_PENTIUM 0x02
+#define PCI_SUBCLASS_PROC_ALPHA 0x10
+#define PCI_SUBCLASS_PROC_POWERPC 0x20
+#define PCI_SUBCLASS_PROC_MIPS 0x30
+#define PCI_SUBCLASS_PROC_CO_PORC 0x40 ///< Co-Processor
+
+#define PCI_CLASS_SERIAL 0x0C
+#define PCI_CLASS_SERIAL_FIREWIRE 0x00
+#define PCI_IF_1394 0x00
+#define PCI_IF_1394_OPEN_HCI 0x10
+#define PCI_CLASS_SERIAL_ACCESS_BUS 0x01
+#define PCI_CLASS_SERIAL_SSA 0x02
+#define PCI_CLASS_SERIAL_USB 0x03
+#define PCI_IF_UHCI 0x00
+#define PCI_IF_OHCI 0x10
+#define PCI_IF_USB_OTHER 0x80
+#define PCI_IF_USB_DEVICE 0xFE
+#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04
+#define PCI_CLASS_SERIAL_SMB 0x05
+
+#define PCI_CLASS_WIRELESS 0x0D
+#define PCI_SUBCLASS_IRDA 0x00
+#define PCI_SUBCLASS_IR 0x01
+#define PCI_SUBCLASS_RF 0x10
+#define PCI_SUBCLASS_WIRELESS_OTHER 0x80
+
+#define PCI_CLASS_INTELLIGENT_IO 0x0E
+
+#define PCI_CLASS_SATELLITE 0x0F
+#define PCI_SUBCLASS_TV 0x01
+#define PCI_SUBCLASS_AUDIO 0x02
+#define PCI_SUBCLASS_VOICE 0x03
+#define PCI_SUBCLASS_DATA 0x04
+
+#define PCI_SECURITY_CONTROLLER 0x10 ///< Encryption and decryption controller
+#define PCI_SUBCLASS_NET_COMPUT 0x00
+#define PCI_SUBCLASS_ENTERTAINMENT 0x10
+#define PCI_SUBCLASS_SECURITY_OTHER 0x80
+
+#define PCI_CLASS_DPIO 0x11
+#define PCI_SUBCLASS_DPIO 0x00
+#define PCI_SUBCLASS_DPIO_OTHER 0x80
/**
Macro that checks whether the Base Class code of device matched.
@@ -316,7 +310,8 @@ typedef struct {
@retval FALSE Base Class code doesn't match the specified device.
**/
-#define IS_CLASS1(_p, c) ((_p)->Hdr.ClassCode[2] == (c))
+#define IS_CLASS1(_p, c) ((_p)->Hdr.ClassCode[2] == (c))
+
/**
Macro that checks whether the Base Class code and Sub-Class code of device matched.
@@ -328,7 +323,8 @@ typedef struct {
@retval FALSE Base Class code and Sub-Class code don't match the specified device.
**/
-#define IS_CLASS2(_p, c, s) (IS_CLASS1 (_p, c) && ((_p)->Hdr.ClassCode[1] == (s)))
+#define IS_CLASS2(_p, c, s) (IS_CLASS1 (_p, c) && ((_p)->Hdr.ClassCode[1] == (s)))
+
/**
Macro that checks whether the Base Class code, Sub-Class code and Interface code of device matched.
@@ -341,7 +337,7 @@ typedef struct {
@retval FALSE Base Class code, Sub-Class code and Interface code don't match the specified device.
**/
-#define IS_CLASS3(_p, c, s, p) (IS_CLASS2 (_p, c, s) && ((_p)->Hdr.ClassCode[0] == (p)))
+#define IS_CLASS3(_p, c, s, p) (IS_CLASS2 (_p, c, s) && ((_p)->Hdr.ClassCode[0] == (p)))
/**
Macro that checks whether device is a display controller.
@@ -352,7 +348,8 @@ typedef struct {
@retval FALSE Device is not a display controller.
**/
-#define IS_PCI_DISPLAY(_p) IS_CLASS1 (_p, PCI_CLASS_DISPLAY)
+#define IS_PCI_DISPLAY(_p) IS_CLASS1 (_p, PCI_CLASS_DISPLAY)
+
/**
Macro that checks whether device is a VGA-compatible controller.
@@ -362,7 +359,8 @@ typedef struct {
@retval FALSE Device is not a VGA-compatible controller.
**/
-#define IS_PCI_VGA(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_VGA)
+#define IS_PCI_VGA(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_VGA)
+
/**
Macro that checks whether device is an 8514-compatible controller.
@@ -372,7 +370,8 @@ typedef struct {
@retval FALSE Device is not an 8514-compatible controller.
**/
-#define IS_PCI_8514(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_8514)
+#define IS_PCI_8514(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_8514)
+
/**
Macro that checks whether device is built before the Class Code field was defined.
@@ -382,7 +381,8 @@ typedef struct {
@retval FALSE Device is not an old device.
**/
-#define IS_PCI_OLD(_p) IS_CLASS1 (_p, PCI_CLASS_OLD)
+#define IS_PCI_OLD(_p) IS_CLASS1 (_p, PCI_CLASS_OLD)
+
/**
Macro that checks whether device is a VGA-compatible device built before the Class Code field was defined.
@@ -392,7 +392,8 @@ typedef struct {
@retval FALSE Device is not an old VGA-compatible device.
**/
-#define IS_PCI_OLD_VGA(_p) IS_CLASS2 (_p, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA)
+#define IS_PCI_OLD_VGA(_p) IS_CLASS2 (_p, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA)
+
/**
Macro that checks whether device is an IDE controller.
@@ -402,7 +403,8 @@ typedef struct {
@retval FALSE Device is not an IDE controller.
**/
-#define IS_PCI_IDE(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_IDE)
+#define IS_PCI_IDE(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_IDE)
+
/**
Macro that checks whether device is a SCSI bus controller.
@@ -412,7 +414,8 @@ typedef struct {
@retval FALSE Device is not a SCSI bus controller.
**/
-#define IS_PCI_SCSI(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SCSI)
+#define IS_PCI_SCSI(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SCSI)
+
/**
Macro that checks whether device is a RAID controller.
@@ -422,7 +425,8 @@ typedef struct {
@retval FALSE Device is not a RAID controller.
**/
-#define IS_PCI_RAID(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_RAID)
+#define IS_PCI_RAID(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_RAID)
+
/**
Macro that checks whether device is an ISA bridge.
@@ -432,7 +436,8 @@ typedef struct {
@retval FALSE Device is not an ISA bridge.
**/
-#define IS_PCI_LPC(_p) IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA)
+#define IS_PCI_LPC(_p) IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA)
+
/**
Macro that checks whether device is a PCI-to-PCI bridge.
@@ -442,7 +447,8 @@ typedef struct {
@retval FALSE Device is not a PCI-to-PCI bridge.
**/
-#define IS_PCI_P2P(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P)
+#define IS_PCI_P2P(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P)
+
/**
Macro that checks whether device is a Subtractive Decode PCI-to-PCI bridge.
@@ -452,7 +458,8 @@ typedef struct {
@retval FALSE Device is not a Subtractive Decode PCI-to-PCI bridge.
**/
-#define IS_PCI_P2P_SUB(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P_SUBTRACTIVE)
+#define IS_PCI_P2P_SUB(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P_SUBTRACTIVE)
+
/**
Macro that checks whether device is a 16550-compatible serial controller.
@@ -462,7 +469,8 @@ typedef struct {
@retval FALSE Device is not a 16550-compatible serial controller.
**/
-#define IS_PCI_16550_SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
+#define IS_PCI_16550_SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
+
/**
Macro that checks whether device is a Universal Serial Bus controller.
@@ -472,19 +480,20 @@ typedef struct {
@retval FALSE Device is not a Universal Serial Bus controller.
**/
-#define IS_PCI_USB(_p) IS_CLASS2 (_p, PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB)
+#define IS_PCI_USB(_p) IS_CLASS2 (_p, PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB)
//
// the definition of Header Type
//
-#define HEADER_TYPE_DEVICE 0x00
-#define HEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01
-#define HEADER_TYPE_CARDBUS_BRIDGE 0x02
-#define HEADER_TYPE_MULTI_FUNCTION 0x80
+#define HEADER_TYPE_DEVICE 0x00
+#define HEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01
+#define HEADER_TYPE_CARDBUS_BRIDGE 0x02
+#define HEADER_TYPE_MULTI_FUNCTION 0x80
//
// Mask of Header type
//
-#define HEADER_LAYOUT_CODE 0x7f
+#define HEADER_LAYOUT_CODE 0x7f
+
/**
Macro that checks whether device is a PCI-PCI bridge.
@@ -494,7 +503,8 @@ typedef struct {
@retval FALSE Device is not a PCI-PCI bridge.
**/
-#define IS_PCI_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_PCI_TO_PCI_BRIDGE))
+#define IS_PCI_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_PCI_TO_PCI_BRIDGE))
+
/**
Macro that checks whether device is a CardBus bridge.
@@ -504,7 +514,8 @@ typedef struct {
@retval FALSE Device is not a CardBus bridge.
**/
-#define IS_CARDBUS_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS_BRIDGE))
+#define IS_CARDBUS_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS_BRIDGE))
+
/**
Macro that checks whether device is a multiple functions device.
@@ -514,38 +525,38 @@ typedef struct {
@retval FALSE Device is not a multiple functions device.
**/
-#define IS_PCI_MULTI_FUNC(_p) ((_p)->Hdr.HeaderType & HEADER_TYPE_MULTI_FUNCTION)
-
-///
-/// Rom Base Address in Bridge, defined in PCI-to-PCI Bridge Architecure Specification,
-///
-#define PCI_BRIDGE_ROMBAR 0x38
-
-#define PCI_MAX_BAR 0x0006
-#define PCI_MAX_CONFIG_OFFSET 0x0100
-
-#define PCI_VENDOR_ID_OFFSET 0x00
-#define PCI_DEVICE_ID_OFFSET 0x02
-#define PCI_COMMAND_OFFSET 0x04
-#define PCI_PRIMARY_STATUS_OFFSET 0x06
-#define PCI_REVISION_ID_OFFSET 0x08
-#define PCI_CLASSCODE_OFFSET 0x09
-#define PCI_CACHELINE_SIZE_OFFSET 0x0C
-#define PCI_LATENCY_TIMER_OFFSET 0x0D
-#define PCI_HEADER_TYPE_OFFSET 0x0E
-#define PCI_BIST_OFFSET 0x0F
-#define PCI_BASE_ADDRESSREG_OFFSET 0x10
-#define PCI_CARDBUS_CIS_OFFSET 0x28
-#define PCI_SVID_OFFSET 0x2C ///< SubSystem Vendor id
-#define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C
-#define PCI_SID_OFFSET 0x2E ///< SubSystem ID
-#define PCI_SUBSYSTEM_ID_OFFSET 0x2E
-#define PCI_EXPANSION_ROM_BASE 0x30
-#define PCI_CAPBILITY_POINTER_OFFSET 0x34
-#define PCI_INT_LINE_OFFSET 0x3C ///< Interrupt Line Register
-#define PCI_INT_PIN_OFFSET 0x3D ///< Interrupt Pin Register
-#define PCI_MAXGNT_OFFSET 0x3E ///< Max Grant Register
-#define PCI_MAXLAT_OFFSET 0x3F ///< Max Latency Register
+#define IS_PCI_MULTI_FUNC(_p) ((_p)->Hdr.HeaderType & HEADER_TYPE_MULTI_FUNCTION)
+
+///
+/// Rom Base Address in Bridge, defined in PCI-to-PCI Bridge Architecture Specification,
+///
+#define PCI_BRIDGE_ROMBAR 0x38
+
+#define PCI_MAX_BAR 0x0006
+#define PCI_MAX_CONFIG_OFFSET 0x0100
+
+#define PCI_VENDOR_ID_OFFSET 0x00
+#define PCI_DEVICE_ID_OFFSET 0x02
+#define PCI_COMMAND_OFFSET 0x04
+#define PCI_PRIMARY_STATUS_OFFSET 0x06
+#define PCI_REVISION_ID_OFFSET 0x08
+#define PCI_CLASSCODE_OFFSET 0x09
+#define PCI_CACHELINE_SIZE_OFFSET 0x0C
+#define PCI_LATENCY_TIMER_OFFSET 0x0D
+#define PCI_HEADER_TYPE_OFFSET 0x0E
+#define PCI_BIST_OFFSET 0x0F
+#define PCI_BASE_ADDRESSREG_OFFSET 0x10
+#define PCI_CARDBUS_CIS_OFFSET 0x28
+#define PCI_SVID_OFFSET 0x2C ///< SubSystem Vendor id
+#define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C
+#define PCI_SID_OFFSET 0x2E ///< SubSystem ID
+#define PCI_SUBSYSTEM_ID_OFFSET 0x2E
+#define PCI_EXPANSION_ROM_BASE 0x30
+#define PCI_CAPBILITY_POINTER_OFFSET 0x34
+#define PCI_INT_LINE_OFFSET 0x3C ///< Interrupt Line Register
+#define PCI_INT_PIN_OFFSET 0x3D ///< Interrupt Pin Register
+#define PCI_MAXGNT_OFFSET 0x3E ///< Max Grant Register
+#define PCI_MAXLAT_OFFSET 0x3F ///< Max Latency Register
//
// defined in PCI-to-PCI Bridge Architecture Specification
@@ -560,35 +571,35 @@ typedef struct {
///
/// Interrupt Line "Unknown" or "No connection" value defined for x86 based system
///
-#define PCI_INT_LINE_UNKNOWN 0xFF
+#define PCI_INT_LINE_UNKNOWN 0xFF
///
/// PCI Access Data Format
///
typedef union {
struct {
- UINT32 Reg : 8;
- UINT32 Func : 3;
- UINT32 Dev : 5;
- UINT32 Bus : 8;
- UINT32 Reserved : 7;
- UINT32 Enable : 1;
+ UINT32 Reg : 8;
+ UINT32 Func : 3;
+ UINT32 Dev : 5;
+ UINT32 Bus : 8;
+ UINT32 Reserved : 7;
+ UINT32 Enable : 1;
} Bits;
- UINT32 Uint32;
+ UINT32 Uint32;
} PCI_CONFIG_ACCESS_CF8;
#pragma pack()
-#define EFI_PCI_COMMAND_IO_SPACE BIT0 ///< 0x0001
-#define EFI_PCI_COMMAND_MEMORY_SPACE BIT1 ///< 0x0002
-#define EFI_PCI_COMMAND_BUS_MASTER BIT2 ///< 0x0004
-#define EFI_PCI_COMMAND_SPECIAL_CYCLE BIT3 ///< 0x0008
-#define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010
-#define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020
-#define EFI_PCI_COMMAND_PARITY_ERROR_RESPOND BIT6 ///< 0x0040
-#define EFI_PCI_COMMAND_STEPPING_CONTROL BIT7 ///< 0x0080
-#define EFI_PCI_COMMAND_SERR BIT8 ///< 0x0100
-#define EFI_PCI_COMMAND_FAST_BACK_TO_BACK BIT9 ///< 0x0200
+#define EFI_PCI_COMMAND_IO_SPACE BIT0 ///< 0x0001
+#define EFI_PCI_COMMAND_MEMORY_SPACE BIT1 ///< 0x0002
+#define EFI_PCI_COMMAND_BUS_MASTER BIT2 ///< 0x0004
+#define EFI_PCI_COMMAND_SPECIAL_CYCLE BIT3 ///< 0x0008
+#define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010
+#define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020
+#define EFI_PCI_COMMAND_PARITY_ERROR_RESPOND BIT6 ///< 0x0040
+#define EFI_PCI_COMMAND_STEPPING_CONTROL BIT7 ///< 0x0080
+#define EFI_PCI_COMMAND_SERR BIT8 ///< 0x0100
+#define EFI_PCI_COMMAND_FAST_BACK_TO_BACK BIT9 ///< 0x0200
//
// defined in PCI-to-PCI Bridge Architecture Specification
@@ -609,111 +620,111 @@ typedef union {
//
// Following are the PCI-CARDBUS bridge control bit, defined in PC Card Standard
//
-#define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE BIT7 ///< 0x0080
-#define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE BIT8 ///< 0x0100
-#define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE BIT9 ///< 0x0200
-#define EFI_PCI_BRIDGE_CONTROL_WRITE_POSTING_ENABLE BIT10 ///< 0x0400
+#define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE BIT7 ///< 0x0080
+#define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE BIT8 ///< 0x0100
+#define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE BIT9 ///< 0x0200
+#define EFI_PCI_BRIDGE_CONTROL_WRITE_POSTING_ENABLE BIT10 ///< 0x0400
//
// Following are the PCI status control bit
//
-#define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010
-#define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020
-#define EFI_PCI_FAST_BACK_TO_BACK_CAPABLE BIT7 ///< 0x0080
-#define EFI_PCI_MASTER_DATA_PARITY_ERROR BIT8 ///< 0x0100
+#define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010
+#define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020
+#define EFI_PCI_FAST_BACK_TO_BACK_CAPABLE BIT7 ///< 0x0080
+#define EFI_PCI_MASTER_DATA_PARITY_ERROR BIT8 ///< 0x0100
///
/// defined in PC Card Standard
///
-#define EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR 0x14
+#define EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR 0x14
#pragma pack(1)
//
// PCI Capability List IDs and records
//
-#define EFI_PCI_CAPABILITY_ID_PMI 0x01
-#define EFI_PCI_CAPABILITY_ID_AGP 0x02
-#define EFI_PCI_CAPABILITY_ID_VPD 0x03
-#define EFI_PCI_CAPABILITY_ID_SLOTID 0x04
-#define EFI_PCI_CAPABILITY_ID_MSI 0x05
-#define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06
-#define EFI_PCI_CAPABILITY_ID_SHPC 0x0C
+#define EFI_PCI_CAPABILITY_ID_PMI 0x01
+#define EFI_PCI_CAPABILITY_ID_AGP 0x02
+#define EFI_PCI_CAPABILITY_ID_VPD 0x03
+#define EFI_PCI_CAPABILITY_ID_SLOTID 0x04
+#define EFI_PCI_CAPABILITY_ID_MSI 0x05
+#define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06
+#define EFI_PCI_CAPABILITY_ID_SHPC 0x0C
///
/// Capabilities List Header
/// Section 6.7, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT8 CapabilityID;
- UINT8 NextItemPtr;
+ UINT8 CapabilityID;
+ UINT8 NextItemPtr;
} EFI_PCI_CAPABILITY_HDR;
///
/// PMC - Power Management Capabilities
-/// Section 3.2.3, PCI Power Management Interface Specifiction, Revision 1.2
+/// Section 3.2.3, PCI Power Management Interface Specification, Revision 1.2
///
typedef union {
struct {
- UINT16 Version : 3;
- UINT16 PmeClock : 1;
- UINT16 Reserved : 1;
- UINT16 DeviceSpecificInitialization : 1;
- UINT16 AuxCurrent : 3;
- UINT16 D1Support : 1;
- UINT16 D2Support : 1;
- UINT16 PmeSupport : 5;
+ UINT16 Version : 3;
+ UINT16 PmeClock : 1;
+ UINT16 Reserved : 1;
+ UINT16 DeviceSpecificInitialization : 1;
+ UINT16 AuxCurrent : 3;
+ UINT16 D1Support : 1;
+ UINT16 D2Support : 1;
+ UINT16 PmeSupport : 5;
} Bits;
- UINT16 Data;
+ UINT16 Data;
} EFI_PCI_PMC;
-#define EFI_PCI_PMC_D3_COLD_MASK (BIT15)
+#define EFI_PCI_PMC_D3_COLD_MASK (BIT15)
///
/// PMCSR - Power Management Control/Status
-/// Section 3.2.4, PCI Power Management Interface Specifiction, Revision 1.2
+/// Section 3.2.4, PCI Power Management Interface Specification, Revision 1.2
///
typedef union {
struct {
- UINT16 PowerState : 2;
- UINT16 ReservedForPciExpress : 1;
- UINT16 NoSoftReset : 1;
- UINT16 Reserved : 4;
- UINT16 PmeEnable : 1;
- UINT16 DataSelect : 4;
- UINT16 DataScale : 2;
- UINT16 PmeStatus : 1;
+ UINT16 PowerState : 2;
+ UINT16 ReservedForPciExpress : 1;
+ UINT16 NoSoftReset : 1;
+ UINT16 Reserved : 4;
+ UINT16 PmeEnable : 1;
+ UINT16 DataSelect : 4;
+ UINT16 DataScale : 2;
+ UINT16 PmeStatus : 1;
} Bits;
- UINT16 Data;
+ UINT16 Data;
} EFI_PCI_PMCSR;
-#define PCI_POWER_STATE_D0 0
-#define PCI_POWER_STATE_D1 1
-#define PCI_POWER_STATE_D2 2
-#define PCI_POWER_STATE_D3_HOT 3
+#define PCI_POWER_STATE_D0 0
+#define PCI_POWER_STATE_D1 1
+#define PCI_POWER_STATE_D2 2
+#define PCI_POWER_STATE_D3_HOT 3
///
/// PMCSR_BSE - PMCSR PCI-to-PCI Bridge Support Extensions
-/// Section 3.2.5, PCI Power Management Interface Specifiction, Revision 1.2
+/// Section 3.2.5, PCI Power Management Interface Specification, Revision 1.2
///
typedef union {
struct {
- UINT8 Reserved : 6;
- UINT8 B2B3 : 1;
- UINT8 BusPowerClockControl : 1;
+ UINT8 Reserved : 6;
+ UINT8 B2B3 : 1;
+ UINT8 BusPowerClockControl : 1;
} Bits;
- UINT8 Uint8;
+ UINT8 Uint8;
} EFI_PCI_PMCSR_BSE;
///
/// Power Management Register Block Definition
-/// Section 3.2, PCI Power Management Interface Specifiction, Revision 1.2
+/// Section 3.2, PCI Power Management Interface Specification, Revision 1.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- EFI_PCI_PMC PMC;
- EFI_PCI_PMCSR PMCSR;
- EFI_PCI_PMCSR_BSE BridgeExtention;
- UINT8 Data;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ EFI_PCI_PMC PMC;
+ EFI_PCI_PMCSR PMCSR;
+ EFI_PCI_PMCSR_BSE BridgeExtention;
+ UINT8 Data;
} EFI_PCI_CAPABILITY_PMI;
///
@@ -721,11 +732,11 @@ typedef struct {
/// Section 6.1.4, Accelerated Graphics Port Interface Specification, Revision 1.0
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT8 Rev;
- UINT8 Reserved;
- UINT32 Status;
- UINT32 Command;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT8 Rev;
+ UINT8 Reserved;
+ UINT32 Status;
+ UINT32 Command;
} EFI_PCI_CAPABILITY_AGP;
///
@@ -733,19 +744,19 @@ typedef struct {
/// Appendix I, PCI Local Bus Specification, 2.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT16 AddrReg;
- UINT32 DataReg;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 AddrReg;
+ UINT32 DataReg;
} EFI_PCI_CAPABILITY_VPD;
///
/// Slot Numbering Capabilities Register
-/// Section 3.2.6, PCI-to-PCI Bridge Architeture Specification, Revision 1.2
+/// Section 3.2.6, PCI-to-PCI Bridge Architecture Specification, Revision 1.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT8 ExpnsSlotReg;
- UINT8 ChassisNo;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT8 ExpnsSlotReg;
+ UINT8 ChassisNo;
} EFI_PCI_CAPABILITY_SLOTID;
///
@@ -753,10 +764,10 @@ typedef struct {
/// Section 6.8.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT16 MsgCtrlReg;
- UINT32 MsgAddrReg;
- UINT16 MsgDataReg;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 MsgCtrlReg;
+ UINT32 MsgAddrReg;
+ UINT16 MsgDataReg;
} EFI_PCI_CAPABILITY_MSI32;
///
@@ -764,11 +775,11 @@ typedef struct {
/// Section 6.8.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT16 MsgCtrlReg;
- UINT32 MsgAddrRegLsdw;
- UINT32 MsgAddrRegMsdw;
- UINT16 MsgDataReg;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 MsgCtrlReg;
+ UINT32 MsgAddrRegLsdw;
+ UINT32 MsgAddrRegMsdw;
+ UINT16 MsgDataReg;
} EFI_PCI_CAPABILITY_MSI64;
///
@@ -776,38 +787,38 @@ typedef struct {
/// CompactPCI Hot Swap Specification PICMG 2.1, R1.0
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
+ EFI_PCI_CAPABILITY_HDR Hdr;
///
/// not finished - fields need to go here
///
} EFI_PCI_CAPABILITY_HOTPLUG;
-#define PCI_BAR_IDX0 0x00
-#define PCI_BAR_IDX1 0x01
-#define PCI_BAR_IDX2 0x02
-#define PCI_BAR_IDX3 0x03
-#define PCI_BAR_IDX4 0x04
-#define PCI_BAR_IDX5 0x05
+#define PCI_BAR_IDX0 0x00
+#define PCI_BAR_IDX1 0x01
+#define PCI_BAR_IDX2 0x02
+#define PCI_BAR_IDX3 0x03
+#define PCI_BAR_IDX4 0x04
+#define PCI_BAR_IDX5 0x05
///
/// EFI PCI Option ROM definitions
///
-#define EFI_ROOT_BRIDGE_LIST 'eprb'
-#define EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE 0x0EF1 ///< defined in UEFI Spec.
+#define EFI_ROOT_BRIDGE_LIST 'eprb'
+#define EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE 0x0EF1 ///< defined in UEFI Spec.
-#define PCI_EXPANSION_ROM_HEADER_SIGNATURE 0xaa55
-#define PCI_DATA_STRUCTURE_SIGNATURE SIGNATURE_32 ('P', 'C', 'I', 'R')
-#define PCI_CODE_TYPE_PCAT_IMAGE 0x00
-#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED 0x0001 ///< defined in UEFI spec.
+#define PCI_EXPANSION_ROM_HEADER_SIGNATURE 0xaa55
+#define PCI_DATA_STRUCTURE_SIGNATURE SIGNATURE_32 ('P', 'C', 'I', 'R')
+#define PCI_CODE_TYPE_PCAT_IMAGE 0x00
+#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED 0x0001 ///< defined in UEFI spec.
///
/// Standard PCI Expansion ROM Header
/// Section 13.4.2, Unified Extensible Firmware Interface Specification, Version 2.1
///
typedef struct {
- UINT16 Signature; ///< 0xaa55
- UINT8 Reserved[0x16];
- UINT16 PcirOffset;
+ UINT16 Signature; ///< 0xaa55
+ UINT8 Reserved[0x16];
+ UINT16 PcirOffset;
} PCI_EXPANSION_ROM_HEADER;
///
@@ -815,11 +826,11 @@ typedef struct {
/// Section 6.3.3.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT16 Signature; ///< 0xaa55
- UINT8 Size512;
- UINT8 InitEntryPoint[3];
- UINT8 Reserved[0x12];
- UINT16 PcirOffset;
+ UINT16 Signature; ///< 0xaa55
+ UINT8 Size512;
+ UINT8 InitEntryPoint[3];
+ UINT8 Reserved[0x12];
+ UINT16 PcirOffset;
} EFI_LEGACY_EXPANSION_ROM_HEADER;
///
@@ -827,18 +838,18 @@ typedef struct {
/// Section 6.3.1.2, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT32 Signature; ///< "PCIR"
- UINT16 VendorId;
- UINT16 DeviceId;
- UINT16 Reserved0;
- UINT16 Length;
- UINT8 Revision;
- UINT8 ClassCode[3];
- UINT16 ImageLength;
- UINT16 CodeRevision;
- UINT8 CodeType;
- UINT8 Indicator;
- UINT16 Reserved1;
+ UINT32 Signature; ///< "PCIR"
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT16 Reserved0;
+ UINT16 Length;
+ UINT8 Revision;
+ UINT8 ClassCode[3];
+ UINT16 ImageLength;
+ UINT16 CodeRevision;
+ UINT8 CodeType;
+ UINT8 Indicator;
+ UINT16 Reserved1;
} PCI_DATA_STRUCTURE;
///
@@ -846,22 +857,22 @@ typedef struct {
/// Section 13.4.2, Unified Extensible Firmware Interface Specification, Version 2.1
///
typedef struct {
- UINT16 Signature; ///< 0xaa55
- UINT16 InitializationSize;
- UINT32 EfiSignature; ///< 0x0EF1
- UINT16 EfiSubsystem;
- UINT16 EfiMachineType;
- UINT16 CompressionType;
- UINT8 Reserved[8];
- UINT16 EfiImageHeaderOffset;
- UINT16 PcirOffset;
+ UINT16 Signature; ///< 0xaa55
+ UINT16 InitializationSize;
+ UINT32 EfiSignature; ///< 0x0EF1
+ UINT16 EfiSubsystem;
+ UINT16 EfiMachineType;
+ UINT16 CompressionType;
+ UINT8 Reserved[8];
+ UINT16 EfiImageHeaderOffset;
+ UINT16 PcirOffset;
} EFI_PCI_EXPANSION_ROM_HEADER;
typedef union {
- UINT8 *Raw;
- PCI_EXPANSION_ROM_HEADER *Generic;
- EFI_PCI_EXPANSION_ROM_HEADER *Efi;
- EFI_LEGACY_EXPANSION_ROM_HEADER *PcAt;
+ UINT8 *Raw;
+ PCI_EXPANSION_ROM_HEADER *Generic;
+ EFI_PCI_EXPANSION_ROM_HEADER *Efi;
+ EFI_LEGACY_EXPANSION_ROM_HEADER *PcAt;
} EFI_PCI_ROM_HEADER;
#pragma pack()
diff --git a/src/include/ipxe/efi/IndustryStandard/PeImage.h b/src/include/ipxe/efi/IndustryStandard/PeImage.h
index 9499bb7f5..0e0f54f8b 100644
--- a/src/include/ipxe/efi/IndustryStandard/PeImage.h
+++ b/src/include/ipxe/efi/IndustryStandard/PeImage.h
@@ -7,31 +7,27 @@
Common Object File Format Specification, Revision 8.3 - February 6, 2013.
This file also includes some definitions in PI Specification, Revision 1.0.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
+Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PE_IMAGE_H__
#define __PE_IMAGE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// PE32+ Subsystem type for EFI images
//
-#define EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION 10
-#define EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
-#define EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12
-#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13 ///< defined PI Specification, 1.0
-
+#define EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION 10
+#define EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
+#define EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12
+#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13///< defined PI Specification, 1.0
//
// PE32+ Machine type for EFI images
@@ -42,6 +38,11 @@ FILE_LICENCE ( BSD3 );
#define IMAGE_FILE_MACHINE_X64 0x8664
#define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2
#define IMAGE_FILE_MACHINE_ARM64 0xAA64
+#define IMAGE_FILE_MACHINE_RISCV32 0x5032
+#define IMAGE_FILE_MACHINE_RISCV64 0x5064
+#define IMAGE_FILE_MACHINE_RISCV128 0x5128
+#define IMAGE_FILE_MACHINE_LOONGARCH32 0x6232
+#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264
//
// EXE file formats
@@ -56,51 +57,51 @@ FILE_LICENCE ( BSD3 );
/// under DOS it can print an error message.
///
typedef struct {
- UINT16 e_magic; ///< Magic number.
- UINT16 e_cblp; ///< Bytes on last page of file.
- UINT16 e_cp; ///< Pages in file.
- UINT16 e_crlc; ///< Relocations.
- UINT16 e_cparhdr; ///< Size of header in paragraphs.
- UINT16 e_minalloc; ///< Minimum extra paragraphs needed.
- UINT16 e_maxalloc; ///< Maximum extra paragraphs needed.
- UINT16 e_ss; ///< Initial (relative) SS value.
- UINT16 e_sp; ///< Initial SP value.
- UINT16 e_csum; ///< Checksum.
- UINT16 e_ip; ///< Initial IP value.
- UINT16 e_cs; ///< Initial (relative) CS value.
- UINT16 e_lfarlc; ///< File address of relocation table.
- UINT16 e_ovno; ///< Overlay number.
- UINT16 e_res[4]; ///< Reserved words.
- UINT16 e_oemid; ///< OEM identifier (for e_oeminfo).
- UINT16 e_oeminfo; ///< OEM information; e_oemid specific.
- UINT16 e_res2[10]; ///< Reserved words.
- UINT32 e_lfanew; ///< File address of new exe header.
+ UINT16 e_magic; ///< Magic number.
+ UINT16 e_cblp; ///< Bytes on last page of file.
+ UINT16 e_cp; ///< Pages in file.
+ UINT16 e_crlc; ///< Relocations.
+ UINT16 e_cparhdr; ///< Size of header in paragraphs.
+ UINT16 e_minalloc; ///< Minimum extra paragraphs needed.
+ UINT16 e_maxalloc; ///< Maximum extra paragraphs needed.
+ UINT16 e_ss; ///< Initial (relative) SS value.
+ UINT16 e_sp; ///< Initial SP value.
+ UINT16 e_csum; ///< Checksum.
+ UINT16 e_ip; ///< Initial IP value.
+ UINT16 e_cs; ///< Initial (relative) CS value.
+ UINT16 e_lfarlc; ///< File address of relocation table.
+ UINT16 e_ovno; ///< Overlay number.
+ UINT16 e_res[4]; ///< Reserved words.
+ UINT16 e_oemid; ///< OEM identifier (for e_oeminfo).
+ UINT16 e_oeminfo; ///< OEM information; e_oemid specific.
+ UINT16 e_res2[10]; ///< Reserved words.
+ UINT32 e_lfanew; ///< File address of new exe header.
} EFI_IMAGE_DOS_HEADER;
///
/// COFF File Header (Object and Image).
///
typedef struct {
- UINT16 Machine;
- UINT16 NumberOfSections;
- UINT32 TimeDateStamp;
- UINT32 PointerToSymbolTable;
- UINT32 NumberOfSymbols;
- UINT16 SizeOfOptionalHeader;
- UINT16 Characteristics;
+ UINT16 Machine;
+ UINT16 NumberOfSections;
+ UINT32 TimeDateStamp;
+ UINT32 PointerToSymbolTable;
+ UINT32 NumberOfSymbols;
+ UINT16 SizeOfOptionalHeader;
+ UINT16 Characteristics;
} EFI_IMAGE_FILE_HEADER;
///
/// Size of EFI_IMAGE_FILE_HEADER.
///
-#define EFI_IMAGE_SIZEOF_FILE_HEADER 20
+#define EFI_IMAGE_SIZEOF_FILE_HEADER 20
//
// Characteristics
//
#define EFI_IMAGE_FILE_RELOCS_STRIPPED BIT0 ///< 0x0001 Relocation info stripped from file.
#define EFI_IMAGE_FILE_EXECUTABLE_IMAGE BIT1 ///< 0x0002 File is executable (i.e. no unresolved externel references).
-#define EFI_IMAGE_FILE_LINE_NUMS_STRIPPED BIT2 ///< 0x0004 Line nunbers stripped from file.
+#define EFI_IMAGE_FILE_LINE_NUMS_STRIPPED BIT2 ///< 0x0004 Line numbers stripped from file.
#define EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED BIT3 ///< 0x0008 Local symbols stripped from file.
#define EFI_IMAGE_FILE_BYTES_REVERSED_LO BIT7 ///< 0x0080 Bytes of machine word are reversed.
#define EFI_IMAGE_FILE_32BIT_MACHINE BIT8 ///< 0x0100 32 bit word machine.
@@ -113,26 +114,26 @@ typedef struct {
/// Header Data Directories.
///
typedef struct {
- UINT32 VirtualAddress;
- UINT32 Size;
+ UINT32 VirtualAddress;
+ UINT32 Size;
} EFI_IMAGE_DATA_DIRECTORY;
//
// Directory Entries
//
-#define EFI_IMAGE_DIRECTORY_ENTRY_EXPORT 0
-#define EFI_IMAGE_DIRECTORY_ENTRY_IMPORT 1
-#define EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE 2
-#define EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION 3
-#define EFI_IMAGE_DIRECTORY_ENTRY_SECURITY 4
-#define EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC 5
-#define EFI_IMAGE_DIRECTORY_ENTRY_DEBUG 6
-#define EFI_IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7
-#define EFI_IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8
-#define EFI_IMAGE_DIRECTORY_ENTRY_TLS 9
-#define EFI_IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10
+#define EFI_IMAGE_DIRECTORY_ENTRY_EXPORT 0
+#define EFI_IMAGE_DIRECTORY_ENTRY_IMPORT 1
+#define EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE 2
+#define EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION 3
+#define EFI_IMAGE_DIRECTORY_ENTRY_SECURITY 4
+#define EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC 5
+#define EFI_IMAGE_DIRECTORY_ENTRY_DEBUG 6
+#define EFI_IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7
+#define EFI_IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8
+#define EFI_IMAGE_DIRECTORY_ENTRY_TLS 9
+#define EFI_IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10
-#define EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES 16
+#define EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES 16
///
/// @attention
@@ -140,7 +141,7 @@ typedef struct {
/// EFI_IMAGE_OPTIONAL_HEADER32 must be used. The data structures only vary
/// after NT additional fields.
///
-#define EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x10b
+#define EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x10b
///
/// Optional Header Standard Fields for PE32.
@@ -149,40 +150,40 @@ typedef struct {
///
/// Standard fields.
///
- UINT16 Magic;
- UINT8 MajorLinkerVersion;
- UINT8 MinorLinkerVersion;
- UINT32 SizeOfCode;
- UINT32 SizeOfInitializedData;
- UINT32 SizeOfUninitializedData;
- UINT32 AddressOfEntryPoint;
- UINT32 BaseOfCode;
- UINT32 BaseOfData; ///< PE32 contains this additional field, which is absent in PE32+.
+ UINT16 Magic;
+ UINT8 MajorLinkerVersion;
+ UINT8 MinorLinkerVersion;
+ UINT32 SizeOfCode;
+ UINT32 SizeOfInitializedData;
+ UINT32 SizeOfUninitializedData;
+ UINT32 AddressOfEntryPoint;
+ UINT32 BaseOfCode;
+ UINT32 BaseOfData; ///< PE32 contains this additional field, which is absent in PE32+.
///
/// Optional Header Windows-Specific Fields.
///
- UINT32 ImageBase;
- UINT32 SectionAlignment;
- UINT32 FileAlignment;
- UINT16 MajorOperatingSystemVersion;
- UINT16 MinorOperatingSystemVersion;
- UINT16 MajorImageVersion;
- UINT16 MinorImageVersion;
- UINT16 MajorSubsystemVersion;
- UINT16 MinorSubsystemVersion;
- UINT32 Win32VersionValue;
- UINT32 SizeOfImage;
- UINT32 SizeOfHeaders;
- UINT32 CheckSum;
- UINT16 Subsystem;
- UINT16 DllCharacteristics;
- UINT32 SizeOfStackReserve;
- UINT32 SizeOfStackCommit;
- UINT32 SizeOfHeapReserve;
- UINT32 SizeOfHeapCommit;
- UINT32 LoaderFlags;
- UINT32 NumberOfRvaAndSizes;
- EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
+ UINT32 ImageBase;
+ UINT32 SectionAlignment;
+ UINT32 FileAlignment;
+ UINT16 MajorOperatingSystemVersion;
+ UINT16 MinorOperatingSystemVersion;
+ UINT16 MajorImageVersion;
+ UINT16 MinorImageVersion;
+ UINT16 MajorSubsystemVersion;
+ UINT16 MinorSubsystemVersion;
+ UINT32 Win32VersionValue;
+ UINT32 SizeOfImage;
+ UINT32 SizeOfHeaders;
+ UINT32 CheckSum;
+ UINT16 Subsystem;
+ UINT16 DllCharacteristics;
+ UINT32 SizeOfStackReserve;
+ UINT32 SizeOfStackCommit;
+ UINT32 SizeOfHeapReserve;
+ UINT32 SizeOfHeapCommit;
+ UINT32 LoaderFlags;
+ UINT32 NumberOfRvaAndSizes;
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
} EFI_IMAGE_OPTIONAL_HEADER32;
///
@@ -191,7 +192,7 @@ typedef struct {
/// EFI_IMAGE_OPTIONAL_HEADER64 must be used. The data structures only vary
/// after NT additional fields.
///
-#define EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
+#define EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
///
/// Optional Header Standard Fields for PE32+.
@@ -200,166 +201,165 @@ typedef struct {
///
/// Standard fields.
///
- UINT16 Magic;
- UINT8 MajorLinkerVersion;
- UINT8 MinorLinkerVersion;
- UINT32 SizeOfCode;
- UINT32 SizeOfInitializedData;
- UINT32 SizeOfUninitializedData;
- UINT32 AddressOfEntryPoint;
- UINT32 BaseOfCode;
+ UINT16 Magic;
+ UINT8 MajorLinkerVersion;
+ UINT8 MinorLinkerVersion;
+ UINT32 SizeOfCode;
+ UINT32 SizeOfInitializedData;
+ UINT32 SizeOfUninitializedData;
+ UINT32 AddressOfEntryPoint;
+ UINT32 BaseOfCode;
///
/// Optional Header Windows-Specific Fields.
///
- UINT64 ImageBase;
- UINT32 SectionAlignment;
- UINT32 FileAlignment;
- UINT16 MajorOperatingSystemVersion;
- UINT16 MinorOperatingSystemVersion;
- UINT16 MajorImageVersion;
- UINT16 MinorImageVersion;
- UINT16 MajorSubsystemVersion;
- UINT16 MinorSubsystemVersion;
- UINT32 Win32VersionValue;
- UINT32 SizeOfImage;
- UINT32 SizeOfHeaders;
- UINT32 CheckSum;
- UINT16 Subsystem;
- UINT16 DllCharacteristics;
- UINT64 SizeOfStackReserve;
- UINT64 SizeOfStackCommit;
- UINT64 SizeOfHeapReserve;
- UINT64 SizeOfHeapCommit;
- UINT32 LoaderFlags;
- UINT32 NumberOfRvaAndSizes;
- EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
+ UINT64 ImageBase;
+ UINT32 SectionAlignment;
+ UINT32 FileAlignment;
+ UINT16 MajorOperatingSystemVersion;
+ UINT16 MinorOperatingSystemVersion;
+ UINT16 MajorImageVersion;
+ UINT16 MinorImageVersion;
+ UINT16 MajorSubsystemVersion;
+ UINT16 MinorSubsystemVersion;
+ UINT32 Win32VersionValue;
+ UINT32 SizeOfImage;
+ UINT32 SizeOfHeaders;
+ UINT32 CheckSum;
+ UINT16 Subsystem;
+ UINT16 DllCharacteristics;
+ UINT64 SizeOfStackReserve;
+ UINT64 SizeOfStackCommit;
+ UINT64 SizeOfHeapReserve;
+ UINT64 SizeOfHeapCommit;
+ UINT32 LoaderFlags;
+ UINT32 NumberOfRvaAndSizes;
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
} EFI_IMAGE_OPTIONAL_HEADER64;
-
///
/// @attention
/// EFI_IMAGE_NT_HEADERS32 is for use ONLY by tools.
///
typedef struct {
- UINT32 Signature;
- EFI_IMAGE_FILE_HEADER FileHeader;
- EFI_IMAGE_OPTIONAL_HEADER32 OptionalHeader;
+ UINT32 Signature;
+ EFI_IMAGE_FILE_HEADER FileHeader;
+ EFI_IMAGE_OPTIONAL_HEADER32 OptionalHeader;
} EFI_IMAGE_NT_HEADERS32;
-#define EFI_IMAGE_SIZEOF_NT_OPTIONAL32_HEADER sizeof (EFI_IMAGE_NT_HEADERS32)
+#define EFI_IMAGE_SIZEOF_NT_OPTIONAL32_HEADER sizeof (EFI_IMAGE_NT_HEADERS32)
///
/// @attention
/// EFI_IMAGE_HEADERS64 is for use ONLY by tools.
///
typedef struct {
- UINT32 Signature;
- EFI_IMAGE_FILE_HEADER FileHeader;
- EFI_IMAGE_OPTIONAL_HEADER64 OptionalHeader;
+ UINT32 Signature;
+ EFI_IMAGE_FILE_HEADER FileHeader;
+ EFI_IMAGE_OPTIONAL_HEADER64 OptionalHeader;
} EFI_IMAGE_NT_HEADERS64;
-#define EFI_IMAGE_SIZEOF_NT_OPTIONAL64_HEADER sizeof (EFI_IMAGE_NT_HEADERS64)
+#define EFI_IMAGE_SIZEOF_NT_OPTIONAL64_HEADER sizeof (EFI_IMAGE_NT_HEADERS64)
//
// Other Windows Subsystem Values
//
-#define EFI_IMAGE_SUBSYSTEM_UNKNOWN 0
-#define EFI_IMAGE_SUBSYSTEM_NATIVE 1
-#define EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2
-#define EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3
-#define EFI_IMAGE_SUBSYSTEM_OS2_CUI 5
-#define EFI_IMAGE_SUBSYSTEM_POSIX_CUI 7
+#define EFI_IMAGE_SUBSYSTEM_UNKNOWN 0
+#define EFI_IMAGE_SUBSYSTEM_NATIVE 1
+#define EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2
+#define EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3
+#define EFI_IMAGE_SUBSYSTEM_OS2_CUI 5
+#define EFI_IMAGE_SUBSYSTEM_POSIX_CUI 7
///
/// Length of ShortName.
///
-#define EFI_IMAGE_SIZEOF_SHORT_NAME 8
+#define EFI_IMAGE_SIZEOF_SHORT_NAME 8
///
/// Section Table. This table immediately follows the optional header.
///
typedef struct {
- UINT8 Name[EFI_IMAGE_SIZEOF_SHORT_NAME];
+ UINT8 Name[EFI_IMAGE_SIZEOF_SHORT_NAME];
union {
- UINT32 PhysicalAddress;
- UINT32 VirtualSize;
+ UINT32 PhysicalAddress;
+ UINT32 VirtualSize;
} Misc;
- UINT32 VirtualAddress;
- UINT32 SizeOfRawData;
- UINT32 PointerToRawData;
- UINT32 PointerToRelocations;
- UINT32 PointerToLinenumbers;
- UINT16 NumberOfRelocations;
- UINT16 NumberOfLinenumbers;
- UINT32 Characteristics;
+ UINT32 VirtualAddress;
+ UINT32 SizeOfRawData;
+ UINT32 PointerToRawData;
+ UINT32 PointerToRelocations;
+ UINT32 PointerToLinenumbers;
+ UINT16 NumberOfRelocations;
+ UINT16 NumberOfLinenumbers;
+ UINT32 Characteristics;
} EFI_IMAGE_SECTION_HEADER;
///
/// Size of EFI_IMAGE_SECTION_HEADER.
///
-#define EFI_IMAGE_SIZEOF_SECTION_HEADER 40
+#define EFI_IMAGE_SIZEOF_SECTION_HEADER 40
//
// Section Flags Values
//
-#define EFI_IMAGE_SCN_TYPE_NO_PAD BIT3 ///< 0x00000008 ///< Reserved.
-#define EFI_IMAGE_SCN_CNT_CODE BIT5 ///< 0x00000020
-#define EFI_IMAGE_SCN_CNT_INITIALIZED_DATA BIT6 ///< 0x00000040
-#define EFI_IMAGE_SCN_CNT_UNINITIALIZED_DATA BIT7 ///< 0x00000080
-
-#define EFI_IMAGE_SCN_LNK_OTHER BIT8 ///< 0x00000100 ///< Reserved.
-#define EFI_IMAGE_SCN_LNK_INFO BIT9 ///< 0x00000200 ///< Section contains comments or some other type of information.
-#define EFI_IMAGE_SCN_LNK_REMOVE BIT11 ///< 0x00000800 ///< Section contents will not become part of image.
-#define EFI_IMAGE_SCN_LNK_COMDAT BIT12 ///< 0x00001000
-
-#define EFI_IMAGE_SCN_ALIGN_1BYTES BIT20 ///< 0x00100000
-#define EFI_IMAGE_SCN_ALIGN_2BYTES BIT21 ///< 0x00200000
-#define EFI_IMAGE_SCN_ALIGN_4BYTES (BIT20|BIT21) ///< 0x00300000
-#define EFI_IMAGE_SCN_ALIGN_8BYTES BIT22 ///< 0x00400000
-#define EFI_IMAGE_SCN_ALIGN_16BYTES (BIT20|BIT22) ///< 0x00500000
-#define EFI_IMAGE_SCN_ALIGN_32BYTES (BIT21|BIT22) ///< 0x00600000
-#define EFI_IMAGE_SCN_ALIGN_64BYTES (BIT20|BIT21|BIT22) ///< 0x00700000
-
-#define EFI_IMAGE_SCN_MEM_DISCARDABLE BIT25 ///< 0x02000000
-#define EFI_IMAGE_SCN_MEM_NOT_CACHED BIT26 ///< 0x04000000
-#define EFI_IMAGE_SCN_MEM_NOT_PAGED BIT27 ///< 0x08000000
-#define EFI_IMAGE_SCN_MEM_SHARED BIT28 ///< 0x10000000
-#define EFI_IMAGE_SCN_MEM_EXECUTE BIT29 ///< 0x20000000
-#define EFI_IMAGE_SCN_MEM_READ BIT30 ///< 0x40000000
-#define EFI_IMAGE_SCN_MEM_WRITE BIT31 ///< 0x80000000
+#define EFI_IMAGE_SCN_TYPE_NO_PAD BIT3 ///< 0x00000008 ///< Reserved.
+#define EFI_IMAGE_SCN_CNT_CODE BIT5 ///< 0x00000020
+#define EFI_IMAGE_SCN_CNT_INITIALIZED_DATA BIT6 ///< 0x00000040
+#define EFI_IMAGE_SCN_CNT_UNINITIALIZED_DATA BIT7 ///< 0x00000080
+
+#define EFI_IMAGE_SCN_LNK_OTHER BIT8 ///< 0x00000100 ///< Reserved.
+#define EFI_IMAGE_SCN_LNK_INFO BIT9 ///< 0x00000200 ///< Section contains comments or some other type of information.
+#define EFI_IMAGE_SCN_LNK_REMOVE BIT11 ///< 0x00000800 ///< Section contents will not become part of image.
+#define EFI_IMAGE_SCN_LNK_COMDAT BIT12 ///< 0x00001000
+
+#define EFI_IMAGE_SCN_ALIGN_1BYTES BIT20 ///< 0x00100000
+#define EFI_IMAGE_SCN_ALIGN_2BYTES BIT21 ///< 0x00200000
+#define EFI_IMAGE_SCN_ALIGN_4BYTES (BIT20|BIT21) ///< 0x00300000
+#define EFI_IMAGE_SCN_ALIGN_8BYTES BIT22 ///< 0x00400000
+#define EFI_IMAGE_SCN_ALIGN_16BYTES (BIT20|BIT22) ///< 0x00500000
+#define EFI_IMAGE_SCN_ALIGN_32BYTES (BIT21|BIT22) ///< 0x00600000
+#define EFI_IMAGE_SCN_ALIGN_64BYTES (BIT20|BIT21|BIT22) ///< 0x00700000
+
+#define EFI_IMAGE_SCN_MEM_DISCARDABLE BIT25 ///< 0x02000000
+#define EFI_IMAGE_SCN_MEM_NOT_CACHED BIT26 ///< 0x04000000
+#define EFI_IMAGE_SCN_MEM_NOT_PAGED BIT27 ///< 0x08000000
+#define EFI_IMAGE_SCN_MEM_SHARED BIT28 ///< 0x10000000
+#define EFI_IMAGE_SCN_MEM_EXECUTE BIT29 ///< 0x20000000
+#define EFI_IMAGE_SCN_MEM_READ BIT30 ///< 0x40000000
+#define EFI_IMAGE_SCN_MEM_WRITE BIT31 ///< 0x80000000
///
/// Size of a Symbol Table Record.
///
-#define EFI_IMAGE_SIZEOF_SYMBOL 18
+#define EFI_IMAGE_SIZEOF_SYMBOL 18
//
// Symbols have a section number of the section in which they are
// defined. Otherwise, section numbers have the following meanings:
//
-#define EFI_IMAGE_SYM_UNDEFINED (UINT16) 0 ///< Symbol is undefined or is common.
-#define EFI_IMAGE_SYM_ABSOLUTE (UINT16) -1 ///< Symbol is an absolute value.
-#define EFI_IMAGE_SYM_DEBUG (UINT16) -2 ///< Symbol is a special debug item.
+#define EFI_IMAGE_SYM_UNDEFINED (UINT16) 0 ///< Symbol is undefined or is common.
+#define EFI_IMAGE_SYM_ABSOLUTE (UINT16) -1 ///< Symbol is an absolute value.
+#define EFI_IMAGE_SYM_DEBUG (UINT16) -2 ///< Symbol is a special debug item.
//
// Symbol Type (fundamental) values.
//
-#define EFI_IMAGE_SYM_TYPE_NULL 0 ///< no type.
-#define EFI_IMAGE_SYM_TYPE_VOID 1 ///< no valid type.
-#define EFI_IMAGE_SYM_TYPE_CHAR 2 ///< type character.
-#define EFI_IMAGE_SYM_TYPE_SHORT 3 ///< type short integer.
-#define EFI_IMAGE_SYM_TYPE_INT 4
-#define EFI_IMAGE_SYM_TYPE_LONG 5
-#define EFI_IMAGE_SYM_TYPE_FLOAT 6
-#define EFI_IMAGE_SYM_TYPE_DOUBLE 7
-#define EFI_IMAGE_SYM_TYPE_STRUCT 8
-#define EFI_IMAGE_SYM_TYPE_UNION 9
-#define EFI_IMAGE_SYM_TYPE_ENUM 10 ///< enumeration.
-#define EFI_IMAGE_SYM_TYPE_MOE 11 ///< member of enumeration.
-#define EFI_IMAGE_SYM_TYPE_BYTE 12
-#define EFI_IMAGE_SYM_TYPE_WORD 13
-#define EFI_IMAGE_SYM_TYPE_UINT 14
-#define EFI_IMAGE_SYM_TYPE_DWORD 15
+#define EFI_IMAGE_SYM_TYPE_NULL 0 ///< no type.
+#define EFI_IMAGE_SYM_TYPE_VOID 1 ///< no valid type.
+#define EFI_IMAGE_SYM_TYPE_CHAR 2 ///< type character.
+#define EFI_IMAGE_SYM_TYPE_SHORT 3 ///< type short integer.
+#define EFI_IMAGE_SYM_TYPE_INT 4
+#define EFI_IMAGE_SYM_TYPE_LONG 5
+#define EFI_IMAGE_SYM_TYPE_FLOAT 6
+#define EFI_IMAGE_SYM_TYPE_DOUBLE 7
+#define EFI_IMAGE_SYM_TYPE_STRUCT 8
+#define EFI_IMAGE_SYM_TYPE_UNION 9
+#define EFI_IMAGE_SYM_TYPE_ENUM 10 ///< enumeration.
+#define EFI_IMAGE_SYM_TYPE_MOE 11 ///< member of enumeration.
+#define EFI_IMAGE_SYM_TYPE_BYTE 12
+#define EFI_IMAGE_SYM_TYPE_WORD 13
+#define EFI_IMAGE_SYM_TYPE_UINT 14
+#define EFI_IMAGE_SYM_TYPE_DWORD 15
//
// Symbol Type (derived) values.
@@ -412,11 +412,11 @@ typedef struct {
//
// Communal selection types.
//
-#define EFI_IMAGE_COMDAT_SELECT_NODUPLICATES 1
-#define EFI_IMAGE_COMDAT_SELECT_ANY 2
-#define EFI_IMAGE_COMDAT_SELECT_SAME_SIZE 3
-#define EFI_IMAGE_COMDAT_SELECT_EXACT_MATCH 4
-#define EFI_IMAGE_COMDAT_SELECT_ASSOCIATIVE 5
+#define EFI_IMAGE_COMDAT_SELECT_NODUPLICATES 1
+#define EFI_IMAGE_COMDAT_SELECT_ANY 2
+#define EFI_IMAGE_COMDAT_SELECT_SAME_SIZE 3
+#define EFI_IMAGE_COMDAT_SELECT_EXACT_MATCH 4
+#define EFI_IMAGE_COMDAT_SELECT_ASSOCIATIVE 5
//
// the following values only be referred in PeCoff, not defined in PECOFF.
@@ -429,28 +429,28 @@ typedef struct {
/// Relocation format.
///
typedef struct {
- UINT32 VirtualAddress;
- UINT32 SymbolTableIndex;
- UINT16 Type;
+ UINT32 VirtualAddress;
+ UINT32 SymbolTableIndex;
+ UINT16 Type;
} EFI_IMAGE_RELOCATION;
///
/// Size of EFI_IMAGE_RELOCATION
///
-#define EFI_IMAGE_SIZEOF_RELOCATION 10
+#define EFI_IMAGE_SIZEOF_RELOCATION 10
//
// I386 relocation types.
//
-#define EFI_IMAGE_REL_I386_ABSOLUTE 0x0000 ///< Reference is absolute, no relocation is necessary.
-#define EFI_IMAGE_REL_I386_DIR16 0x0001 ///< Direct 16-bit reference to the symbols virtual address.
-#define EFI_IMAGE_REL_I386_REL16 0x0002 ///< PC-relative 16-bit reference to the symbols virtual address.
-#define EFI_IMAGE_REL_I386_DIR32 0x0006 ///< Direct 32-bit reference to the symbols virtual address.
-#define EFI_IMAGE_REL_I386_DIR32NB 0x0007 ///< Direct 32-bit reference to the symbols virtual address, base not included.
-#define EFI_IMAGE_REL_I386_SEG12 0x0009 ///< Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address.
-#define EFI_IMAGE_REL_I386_SECTION 0x000A
-#define EFI_IMAGE_REL_I386_SECREL 0x000B
-#define EFI_IMAGE_REL_I386_REL32 0x0014 ///< PC-relative 32-bit reference to the symbols virtual address.
+#define EFI_IMAGE_REL_I386_ABSOLUTE 0x0000 ///< Reference is absolute, no relocation is necessary.
+#define EFI_IMAGE_REL_I386_DIR16 0x0001 ///< Direct 16-bit reference to the symbols virtual address.
+#define EFI_IMAGE_REL_I386_REL16 0x0002 ///< PC-relative 16-bit reference to the symbols virtual address.
+#define EFI_IMAGE_REL_I386_DIR32 0x0006 ///< Direct 32-bit reference to the symbols virtual address.
+#define EFI_IMAGE_REL_I386_DIR32NB 0x0007 ///< Direct 32-bit reference to the symbols virtual address, base not included.
+#define EFI_IMAGE_REL_I386_SEG12 0x0009 ///< Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address.
+#define EFI_IMAGE_REL_I386_SECTION 0x000A
+#define EFI_IMAGE_REL_I386_SECREL 0x000B
+#define EFI_IMAGE_REL_I386_REL32 0x0014 ///< PC-relative 32-bit reference to the symbols virtual address.
//
// x64 processor relocation types.
@@ -477,8 +477,8 @@ typedef struct {
/// Based relocation format.
///
typedef struct {
- UINT32 VirtualAddress;
- UINT32 SizeOfBlock;
+ UINT32 VirtualAddress;
+ UINT32 SizeOfBlock;
} EFI_IMAGE_BASE_RELOCATION;
///
@@ -502,20 +502,33 @@ typedef struct {
#define EFI_IMAGE_REL_BASED_DIR64 10
///
+/// Relocation types of RISC-V processor.
+///
+#define EFI_IMAGE_REL_BASED_RISCV_HI20 5
+#define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7
+#define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8
+
+//
+// Relocation types of LoongArch processor.
+//
+#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA 8
+#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA 8
+
+///
/// Line number format.
///
typedef struct {
union {
- UINT32 SymbolTableIndex; ///< Symbol table index of function name if Linenumber is 0.
- UINT32 VirtualAddress; ///< Virtual address of line number.
+ UINT32 SymbolTableIndex; ///< Symbol table index of function name if Linenumber is 0.
+ UINT32 VirtualAddress; ///< Virtual address of line number.
} Type;
- UINT16 Linenumber; ///< Line number.
+ UINT16 Linenumber; ///< Line number.
} EFI_IMAGE_LINENUMBER;
///
/// Size of EFI_IMAGE_LINENUMBER.
///
-#define EFI_IMAGE_SIZEOF_LINENUMBER 6
+#define EFI_IMAGE_SIZEOF_LINENUMBER 6
//
// Archive format.
@@ -531,20 +544,19 @@ typedef struct {
/// Archive Member Headers
///
typedef struct {
- UINT8 Name[16]; ///< File member name - `/' terminated.
- UINT8 Date[12]; ///< File member date - decimal.
- UINT8 UserID[6]; ///< File member user id - decimal.
- UINT8 GroupID[6]; ///< File member group id - decimal.
- UINT8 Mode[8]; ///< File member mode - octal.
- UINT8 Size[10]; ///< File member size - decimal.
- UINT8 EndHeader[2]; ///< String to end header. (0x60 0x0A).
+ UINT8 Name[16]; ///< File member name - `/' terminated.
+ UINT8 Date[12]; ///< File member date - decimal.
+ UINT8 UserID[6]; ///< File member user id - decimal.
+ UINT8 GroupID[6]; ///< File member group id - decimal.
+ UINT8 Mode[8]; ///< File member mode - octal.
+ UINT8 Size[10]; ///< File member size - decimal.
+ UINT8 EndHeader[2]; ///< String to end header. (0x60 0x0A).
} EFI_IMAGE_ARCHIVE_MEMBER_HEADER;
///
/// Size of EFI_IMAGE_ARCHIVE_MEMBER_HEADER.
///
-#define EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60
-
+#define EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60
//
// DLL Support
@@ -554,25 +566,25 @@ typedef struct {
/// Export Directory Table.
///
typedef struct {
- UINT32 Characteristics;
- UINT32 TimeDateStamp;
- UINT16 MajorVersion;
- UINT16 MinorVersion;
- UINT32 Name;
- UINT32 Base;
- UINT32 NumberOfFunctions;
- UINT32 NumberOfNames;
- UINT32 AddressOfFunctions;
- UINT32 AddressOfNames;
- UINT32 AddressOfNameOrdinals;
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT32 Name;
+ UINT32 Base;
+ UINT32 NumberOfFunctions;
+ UINT32 NumberOfNames;
+ UINT32 AddressOfFunctions;
+ UINT32 AddressOfNames;
+ UINT32 AddressOfNameOrdinals;
} EFI_IMAGE_EXPORT_DIRECTORY;
///
/// Hint/Name Table.
///
typedef struct {
- UINT16 Hint;
- UINT8 Name[1];
+ UINT16 Hint;
+ UINT8 Name[1];
} EFI_IMAGE_IMPORT_BY_NAME;
///
@@ -580,13 +592,13 @@ typedef struct {
///
typedef struct {
union {
- UINT32 Function;
- UINT32 Ordinal;
- EFI_IMAGE_IMPORT_BY_NAME *AddressOfData;
+ UINT32 Function;
+ UINT32 Ordinal;
+ EFI_IMAGE_IMPORT_BY_NAME *AddressOfData;
} u1;
} EFI_IMAGE_THUNK_DATA;
-#define EFI_IMAGE_ORDINAL_FLAG BIT31 ///< Flag for PE32.
+#define EFI_IMAGE_ORDINAL_FLAG BIT31 ///< Flag for PE32.
#define EFI_IMAGE_SNAP_BY_ORDINAL(Ordinal) ((Ordinal & EFI_IMAGE_ORDINAL_FLAG) != 0)
#define EFI_IMAGE_ORDINAL(Ordinal) (Ordinal & 0xffff)
@@ -594,39 +606,38 @@ typedef struct {
/// Import Directory Table
///
typedef struct {
- UINT32 Characteristics;
- UINT32 TimeDateStamp;
- UINT32 ForwarderChain;
- UINT32 Name;
- EFI_IMAGE_THUNK_DATA *FirstThunk;
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT32 ForwarderChain;
+ UINT32 Name;
+ EFI_IMAGE_THUNK_DATA *FirstThunk;
} EFI_IMAGE_IMPORT_DESCRIPTOR;
-
///
/// Debug Directory Format.
///
typedef struct {
- UINT32 Characteristics;
- UINT32 TimeDateStamp;
- UINT16 MajorVersion;
- UINT16 MinorVersion;
- UINT32 Type;
- UINT32 SizeOfData;
- UINT32 RVA; ///< The address of the debug data when loaded, relative to the image base.
- UINT32 FileOffset; ///< The file pointer to the debug data.
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT32 Type;
+ UINT32 SizeOfData;
+ UINT32 RVA; ///< The address of the debug data when loaded, relative to the image base.
+ UINT32 FileOffset; ///< The file pointer to the debug data.
} EFI_IMAGE_DEBUG_DIRECTORY_ENTRY;
-#define EFI_IMAGE_DEBUG_TYPE_CODEVIEW 2 ///< The Visual C++ debug information.
+#define EFI_IMAGE_DEBUG_TYPE_CODEVIEW 2 ///< The Visual C++ debug information.
///
/// Debug Data Structure defined in Microsoft C++.
///
#define CODEVIEW_SIGNATURE_NB10 SIGNATURE_32('N', 'B', '1', '0')
typedef struct {
- UINT32 Signature; ///< "NB10"
- UINT32 Unknown;
- UINT32 Unknown2;
- UINT32 Unknown3;
+ UINT32 Signature; ///< "NB10"
+ UINT32 Unknown;
+ UINT32 Unknown2;
+ UINT32 Unknown3;
//
// Filename of .PDB goes here
//
@@ -637,18 +648,17 @@ typedef struct {
///
#define CODEVIEW_SIGNATURE_RSDS SIGNATURE_32('R', 'S', 'D', 'S')
typedef struct {
- UINT32 Signature; ///< "RSDS".
- UINT32 Unknown;
- UINT32 Unknown2;
- UINT32 Unknown3;
- UINT32 Unknown4;
- UINT32 Unknown5;
+ UINT32 Signature; ///< "RSDS".
+ UINT32 Unknown;
+ UINT32 Unknown2;
+ UINT32 Unknown3;
+ UINT32 Unknown4;
+ UINT32 Unknown5;
//
// Filename of .PDB goes here
//
} EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY;
-
///
/// Debug Data Structure defined by Apple Mach-O to Coff utility.
///
@@ -665,12 +675,12 @@ typedef struct {
/// Resource format.
///
typedef struct {
- UINT32 Characteristics;
- UINT32 TimeDateStamp;
- UINT16 MajorVersion;
- UINT16 MinorVersion;
- UINT16 NumberOfNamedEntries;
- UINT16 NumberOfIdEntries;
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT16 NumberOfNamedEntries;
+ UINT16 NumberOfIdEntries;
//
// Array of EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY entries goes here.
//
@@ -682,16 +692,16 @@ typedef struct {
typedef struct {
union {
struct {
- UINT32 NameOffset:31;
- UINT32 NameIsString:1;
+ UINT32 NameOffset : 31;
+ UINT32 NameIsString : 1;
} s;
- UINT32 Id;
+ UINT32 Id;
} u1;
union {
- UINT32 OffsetToData;
+ UINT32 OffsetToData;
struct {
- UINT32 OffsetToDirectory:31;
- UINT32 DataIsDirectory:1;
+ UINT32 OffsetToDirectory : 31;
+ UINT32 DataIsDirectory : 1;
} s;
} u2;
} EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY;
@@ -700,36 +710,35 @@ typedef struct {
/// Resource directory entry for string.
///
typedef struct {
- UINT16 Length;
- CHAR16 String[1];
+ UINT16 Length;
+ CHAR16 String[1];
} EFI_IMAGE_RESOURCE_DIRECTORY_STRING;
///
/// Resource directory entry for data array.
///
typedef struct {
- UINT32 OffsetToData;
- UINT32 Size;
- UINT32 CodePage;
- UINT32 Reserved;
+ UINT32 OffsetToData;
+ UINT32 Size;
+ UINT32 CodePage;
+ UINT32 Reserved;
} EFI_IMAGE_RESOURCE_DATA_ENTRY;
///
/// Header format for TE images, defined in the PI Specification, 1.0.
///
typedef struct {
- UINT16 Signature; ///< The signature for TE format = "VZ".
- UINT16 Machine; ///< From the original file header.
- UINT8 NumberOfSections; ///< From the original file header.
- UINT8 Subsystem; ///< From original optional header.
- UINT16 StrippedSize; ///< Number of bytes we removed from the header.
- UINT32 AddressOfEntryPoint; ///< Offset to entry point -- from original optional header.
- UINT32 BaseOfCode; ///< From original image -- required for ITP debug.
- UINT64 ImageBase; ///< From original file header.
- EFI_IMAGE_DATA_DIRECTORY DataDirectory[2]; ///< Only base relocation and debug directory.
+ UINT16 Signature; ///< The signature for TE format = "VZ".
+ UINT16 Machine; ///< From the original file header.
+ UINT8 NumberOfSections; ///< From the original file header.
+ UINT8 Subsystem; ///< From original optional header.
+ UINT16 StrippedSize; ///< Number of bytes we removed from the header.
+ UINT32 AddressOfEntryPoint; ///< Offset to entry point -- from original optional header.
+ UINT32 BaseOfCode; ///< From original image -- required for ITP debug.
+ UINT64 ImageBase; ///< From original file header.
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[2]; ///< Only base relocation and debug directory.
} EFI_TE_IMAGE_HEADER;
-
#define EFI_TE_IMAGE_HEADER_SIGNATURE SIGNATURE_16('V', 'Z')
//
@@ -738,21 +747,20 @@ typedef struct {
#define EFI_TE_IMAGE_DIRECTORY_ENTRY_BASERELOC 0
#define EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG 1
-
///
/// Union of PE32, PE32+, and TE headers.
///
typedef union {
- EFI_IMAGE_NT_HEADERS32 Pe32;
- EFI_IMAGE_NT_HEADERS64 Pe32Plus;
- EFI_TE_IMAGE_HEADER Te;
+ EFI_IMAGE_NT_HEADERS32 Pe32;
+ EFI_IMAGE_NT_HEADERS64 Pe32Plus;
+ EFI_TE_IMAGE_HEADER Te;
} EFI_IMAGE_OPTIONAL_HEADER_UNION;
typedef union {
- EFI_IMAGE_NT_HEADERS32 *Pe32;
- EFI_IMAGE_NT_HEADERS64 *Pe32Plus;
- EFI_TE_IMAGE_HEADER *Te;
- EFI_IMAGE_OPTIONAL_HEADER_UNION *Union;
+ EFI_IMAGE_NT_HEADERS32 *Pe32;
+ EFI_IMAGE_NT_HEADERS64 *Pe32Plus;
+ EFI_TE_IMAGE_HEADER *Te;
+ EFI_IMAGE_OPTIONAL_HEADER_UNION *Union;
} EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION;
#endif
diff --git a/src/include/ipxe/efi/IndustryStandard/Tpm12.h b/src/include/ipxe/efi/IndustryStandard/Tpm12.h
index 509425cc2..6bebcb7bd 100644
--- a/src/include/ipxe/efi/IndustryStandard/Tpm12.h
+++ b/src/include/ipxe/efi/IndustryStandard/Tpm12.h
@@ -2,26 +2,19 @@
TPM Specification data structures (TCG TPM Specification Version 1.2 Revision 103)
See http://trustedcomputinggroup.org for latest specification updates
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef _TPM12_H_
#define _TPM12_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// The start of TPM return codes
///
-#define TPM_BASE 0
+#define TPM_BASE 0
//
// All structures MUST be packed on a byte boundary.
@@ -35,246 +28,246 @@ FILE_LICENCE ( BSD3 );
///
/// Indicates the conditions where it is required that authorization be presented
///
-typedef UINT8 TPM_AUTH_DATA_USAGE;
+typedef UINT8 TPM_AUTH_DATA_USAGE;
///
/// The information as to what the payload is in an encrypted structure
///
-typedef UINT8 TPM_PAYLOAD_TYPE;
+typedef UINT8 TPM_PAYLOAD_TYPE;
///
/// The version info breakdown
///
-typedef UINT8 TPM_VERSION_BYTE;
+typedef UINT8 TPM_VERSION_BYTE;
///
/// The state of the dictionary attack mitigation logic
///
-typedef UINT8 TPM_DA_STATE;
+typedef UINT8 TPM_DA_STATE;
///
/// The request or response authorization type
///
-typedef UINT16 TPM_TAG;
+typedef UINT16 TPM_TAG;
///
/// The protocol in use
///
-typedef UINT16 TPM_PROTOCOL_ID;
+typedef UINT16 TPM_PROTOCOL_ID;
///
/// Indicates the start state
///
-typedef UINT16 TPM_STARTUP_TYPE;
+typedef UINT16 TPM_STARTUP_TYPE;
///
/// The definition of the encryption scheme
///
-typedef UINT16 TPM_ENC_SCHEME;
+typedef UINT16 TPM_ENC_SCHEME;
///
/// The definition of the signature scheme
///
-typedef UINT16 TPM_SIG_SCHEME;
+typedef UINT16 TPM_SIG_SCHEME;
///
/// The definition of the migration scheme
///
-typedef UINT16 TPM_MIGRATE_SCHEME;
+typedef UINT16 TPM_MIGRATE_SCHEME;
///
/// Sets the state of the physical presence mechanism
///
-typedef UINT16 TPM_PHYSICAL_PRESENCE;
+typedef UINT16 TPM_PHYSICAL_PRESENCE;
///
/// Indicates the types of entity that are supported by the TPM
///
-typedef UINT16 TPM_ENTITY_TYPE;
+typedef UINT16 TPM_ENTITY_TYPE;
///
/// Indicates the permitted usage of the key
///
-typedef UINT16 TPM_KEY_USAGE;
+typedef UINT16 TPM_KEY_USAGE;
///
/// The type of asymmetric encrypted structure in use by the endorsement key
///
-typedef UINT16 TPM_EK_TYPE;
+typedef UINT16 TPM_EK_TYPE;
///
/// The tag for the structure
///
-typedef UINT16 TPM_STRUCTURE_TAG;
+typedef UINT16 TPM_STRUCTURE_TAG;
///
/// The platform specific spec to which the information relates to
///
-typedef UINT16 TPM_PLATFORM_SPECIFIC;
+typedef UINT16 TPM_PLATFORM_SPECIFIC;
///
/// The command ordinal
///
-typedef UINT32 TPM_COMMAND_CODE;
+typedef UINT32 TPM_COMMAND_CODE;
///
/// Identifies a TPM capability area
///
-typedef UINT32 TPM_CAPABILITY_AREA;
+typedef UINT32 TPM_CAPABILITY_AREA;
///
/// Indicates information regarding a key
///
-typedef UINT32 TPM_KEY_FLAGS;
+typedef UINT32 TPM_KEY_FLAGS;
///
/// Indicates the type of algorithm
///
-typedef UINT32 TPM_ALGORITHM_ID;
+typedef UINT32 TPM_ALGORITHM_ID;
///
/// The locality modifier
///
-typedef UINT32 TPM_MODIFIER_INDICATOR;
+typedef UINT32 TPM_MODIFIER_INDICATOR;
///
/// The actual number of a counter
///
-typedef UINT32 TPM_ACTUAL_COUNT;
+typedef UINT32 TPM_ACTUAL_COUNT;
///
/// Attributes that define what options are in use for a transport session
///
-typedef UINT32 TPM_TRANSPORT_ATTRIBUTES;
+typedef UINT32 TPM_TRANSPORT_ATTRIBUTES;
///
/// Handle to an authorization session
///
-typedef UINT32 TPM_AUTHHANDLE;
+typedef UINT32 TPM_AUTHHANDLE;
///
/// Index to a DIR register
///
-typedef UINT32 TPM_DIRINDEX;
+typedef UINT32 TPM_DIRINDEX;
///
/// The area where a key is held assigned by the TPM
///
-typedef UINT32 TPM_KEY_HANDLE;
+typedef UINT32 TPM_KEY_HANDLE;
///
/// Index to a PCR register
///
-typedef UINT32 TPM_PCRINDEX;
+typedef UINT32 TPM_PCRINDEX;
///
/// The return code from a function
///
-typedef UINT32 TPM_RESULT;
+typedef UINT32 TPM_RESULT;
///
/// The types of resources that a TPM may have using internal resources
///
-typedef UINT32 TPM_RESOURCE_TYPE;
+typedef UINT32 TPM_RESOURCE_TYPE;
///
/// Allows for controlling of the key when loaded and how to handle TPM_Startup issues
///
-typedef UINT32 TPM_KEY_CONTROL;
+typedef UINT32 TPM_KEY_CONTROL;
///
/// The index into the NV storage area
///
-typedef UINT32 TPM_NV_INDEX;
+typedef UINT32 TPM_NV_INDEX;
///
/// The family ID. Family IDs are automatically assigned a sequence number by the TPM.
/// A trusted process can set the FamilyID value in an individual row to NULL, which
/// invalidates that row. The family ID resets to NULL on each change of TPM Owner.
///
-typedef UINT32 TPM_FAMILY_ID;
+typedef UINT32 TPM_FAMILY_ID;
///
/// IA value used as a label for the most recent verification of this family. Set to zero when not in use.
///
-typedef UINT32 TPM_FAMILY_VERIFICATION;
+typedef UINT32 TPM_FAMILY_VERIFICATION;
///
/// How the TPM handles var
///
-typedef UINT32 TPM_STARTUP_EFFECTS;
+typedef UINT32 TPM_STARTUP_EFFECTS;
///
/// The mode of a symmetric encryption
///
-typedef UINT32 TPM_SYM_MODE;
+typedef UINT32 TPM_SYM_MODE;
///
/// The family flags
///
-typedef UINT32 TPM_FAMILY_FLAGS;
+typedef UINT32 TPM_FAMILY_FLAGS;
///
/// The index value for the delegate NV table
///
-typedef UINT32 TPM_DELEGATE_INDEX;
+typedef UINT32 TPM_DELEGATE_INDEX;
///
/// The restrictions placed on delegation of CMK commands
///
-typedef UINT32 TPM_CMK_DELEGATE;
+typedef UINT32 TPM_CMK_DELEGATE;
///
/// The ID value of a monotonic counter
///
-typedef UINT32 TPM_COUNT_ID;
+typedef UINT32 TPM_COUNT_ID;
///
/// A command to execute
///
-typedef UINT32 TPM_REDIT_COMMAND;
+typedef UINT32 TPM_REDIT_COMMAND;
///
/// A transport session handle
///
-typedef UINT32 TPM_TRANSHANDLE;
+typedef UINT32 TPM_TRANSHANDLE;
///
/// A generic handle could be key, transport etc
///
-typedef UINT32 TPM_HANDLE;
+typedef UINT32 TPM_HANDLE;
///
/// What operation is happening
///
-typedef UINT32 TPM_FAMILY_OPERATION;
+typedef UINT32 TPM_FAMILY_OPERATION;
//
// Part 2, section 2.2.4: Vendor specific
// The following defines allow for the quick specification of a
// vendor specific item.
//
-#define TPM_Vendor_Specific32 ((UINT32) 0x00000400)
-#define TPM_Vendor_Specific8 ((UINT8) 0x80)
+#define TPM_Vendor_Specific32 ((UINT32) 0x00000400)
+#define TPM_Vendor_Specific8 ((UINT8) 0x80)
//
// Part 2, section 3.1: TPM_STRUCTURE_TAG
//
-#define TPM_TAG_CONTEXTBLOB ((TPM_STRUCTURE_TAG) 0x0001)
-#define TPM_TAG_CONTEXT_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0002)
-#define TPM_TAG_CONTEXTPOINTER ((TPM_STRUCTURE_TAG) 0x0003)
-#define TPM_TAG_CONTEXTLIST ((TPM_STRUCTURE_TAG) 0x0004)
-#define TPM_TAG_SIGNINFO ((TPM_STRUCTURE_TAG) 0x0005)
-#define TPM_TAG_PCR_INFO_LONG ((TPM_STRUCTURE_TAG) 0x0006)
-#define TPM_TAG_PERSISTENT_FLAGS ((TPM_STRUCTURE_TAG) 0x0007)
-#define TPM_TAG_VOLATILE_FLAGS ((TPM_STRUCTURE_TAG) 0x0008)
-#define TPM_TAG_PERSISTENT_DATA ((TPM_STRUCTURE_TAG) 0x0009)
-#define TPM_TAG_VOLATILE_DATA ((TPM_STRUCTURE_TAG) 0x000A)
-#define TPM_TAG_SV_DATA ((TPM_STRUCTURE_TAG) 0x000B)
-#define TPM_TAG_EK_BLOB ((TPM_STRUCTURE_TAG) 0x000C)
-#define TPM_TAG_EK_BLOB_AUTH ((TPM_STRUCTURE_TAG) 0x000D)
-#define TPM_TAG_COUNTER_VALUE ((TPM_STRUCTURE_TAG) 0x000E)
-#define TPM_TAG_TRANSPORT_INTERNAL ((TPM_STRUCTURE_TAG) 0x000F)
-#define TPM_TAG_TRANSPORT_LOG_IN ((TPM_STRUCTURE_TAG) 0x0010)
-#define TPM_TAG_TRANSPORT_LOG_OUT ((TPM_STRUCTURE_TAG) 0x0011)
-#define TPM_TAG_AUDIT_EVENT_IN ((TPM_STRUCTURE_TAG) 0x0012)
-#define TPM_TAG_AUDIT_EVENT_OUT ((TPM_STRUCTURE_TAG) 0x0013)
-#define TPM_TAG_CURRENT_TICKS ((TPM_STRUCTURE_TAG) 0x0014)
-#define TPM_TAG_KEY ((TPM_STRUCTURE_TAG) 0x0015)
-#define TPM_TAG_STORED_DATA12 ((TPM_STRUCTURE_TAG) 0x0016)
-#define TPM_TAG_NV_ATTRIBUTES ((TPM_STRUCTURE_TAG) 0x0017)
-#define TPM_TAG_NV_DATA_PUBLIC ((TPM_STRUCTURE_TAG) 0x0018)
-#define TPM_TAG_NV_DATA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0019)
-#define TPM_TAG_DELEGATIONS ((TPM_STRUCTURE_TAG) 0x001A)
-#define TPM_TAG_DELEGATE_PUBLIC ((TPM_STRUCTURE_TAG) 0x001B)
-#define TPM_TAG_DELEGATE_TABLE_ROW ((TPM_STRUCTURE_TAG) 0x001C)
-#define TPM_TAG_TRANSPORT_AUTH ((TPM_STRUCTURE_TAG) 0x001D)
-#define TPM_TAG_TRANSPORT_PUBLIC ((TPM_STRUCTURE_TAG) 0x001E)
-#define TPM_TAG_PERMANENT_FLAGS ((TPM_STRUCTURE_TAG) 0x001F)
-#define TPM_TAG_STCLEAR_FLAGS ((TPM_STRUCTURE_TAG) 0x0020)
-#define TPM_TAG_STANY_FLAGS ((TPM_STRUCTURE_TAG) 0x0021)
-#define TPM_TAG_PERMANENT_DATA ((TPM_STRUCTURE_TAG) 0x0022)
-#define TPM_TAG_STCLEAR_DATA ((TPM_STRUCTURE_TAG) 0x0023)
-#define TPM_TAG_STANY_DATA ((TPM_STRUCTURE_TAG) 0x0024)
-#define TPM_TAG_FAMILY_TABLE_ENTRY ((TPM_STRUCTURE_TAG) 0x0025)
-#define TPM_TAG_DELEGATE_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0026)
-#define TPM_TAG_DELG_KEY_BLOB ((TPM_STRUCTURE_TAG) 0x0027)
-#define TPM_TAG_KEY12 ((TPM_STRUCTURE_TAG) 0x0028)
-#define TPM_TAG_CERTIFY_INFO2 ((TPM_STRUCTURE_TAG) 0x0029)
-#define TPM_TAG_DELEGATE_OWNER_BLOB ((TPM_STRUCTURE_TAG) 0x002A)
-#define TPM_TAG_EK_BLOB_ACTIVATE ((TPM_STRUCTURE_TAG) 0x002B)
-#define TPM_TAG_DAA_BLOB ((TPM_STRUCTURE_TAG) 0x002C)
-#define TPM_TAG_DAA_CONTEXT ((TPM_STRUCTURE_TAG) 0x002D)
-#define TPM_TAG_DAA_ENFORCE ((TPM_STRUCTURE_TAG) 0x002E)
-#define TPM_TAG_DAA_ISSUER ((TPM_STRUCTURE_TAG) 0x002F)
-#define TPM_TAG_CAP_VERSION_INFO ((TPM_STRUCTURE_TAG) 0x0030)
-#define TPM_TAG_DAA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0031)
-#define TPM_TAG_DAA_TPM ((TPM_STRUCTURE_TAG) 0x0032)
-#define TPM_TAG_CMK_MIGAUTH ((TPM_STRUCTURE_TAG) 0x0033)
-#define TPM_TAG_CMK_SIGTICKET ((TPM_STRUCTURE_TAG) 0x0034)
-#define TPM_TAG_CMK_MA_APPROVAL ((TPM_STRUCTURE_TAG) 0x0035)
-#define TPM_TAG_QUOTE_INFO2 ((TPM_STRUCTURE_TAG) 0x0036)
-#define TPM_TAG_DA_INFO ((TPM_STRUCTURE_TAG) 0x0037)
-#define TPM_TAG_DA_LIMITED ((TPM_STRUCTURE_TAG) 0x0038)
-#define TPM_TAG_DA_ACTION_TYPE ((TPM_STRUCTURE_TAG) 0x0039)
+#define TPM_TAG_CONTEXTBLOB ((TPM_STRUCTURE_TAG) 0x0001)
+#define TPM_TAG_CONTEXT_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0002)
+#define TPM_TAG_CONTEXTPOINTER ((TPM_STRUCTURE_TAG) 0x0003)
+#define TPM_TAG_CONTEXTLIST ((TPM_STRUCTURE_TAG) 0x0004)
+#define TPM_TAG_SIGNINFO ((TPM_STRUCTURE_TAG) 0x0005)
+#define TPM_TAG_PCR_INFO_LONG ((TPM_STRUCTURE_TAG) 0x0006)
+#define TPM_TAG_PERSISTENT_FLAGS ((TPM_STRUCTURE_TAG) 0x0007)
+#define TPM_TAG_VOLATILE_FLAGS ((TPM_STRUCTURE_TAG) 0x0008)
+#define TPM_TAG_PERSISTENT_DATA ((TPM_STRUCTURE_TAG) 0x0009)
+#define TPM_TAG_VOLATILE_DATA ((TPM_STRUCTURE_TAG) 0x000A)
+#define TPM_TAG_SV_DATA ((TPM_STRUCTURE_TAG) 0x000B)
+#define TPM_TAG_EK_BLOB ((TPM_STRUCTURE_TAG) 0x000C)
+#define TPM_TAG_EK_BLOB_AUTH ((TPM_STRUCTURE_TAG) 0x000D)
+#define TPM_TAG_COUNTER_VALUE ((TPM_STRUCTURE_TAG) 0x000E)
+#define TPM_TAG_TRANSPORT_INTERNAL ((TPM_STRUCTURE_TAG) 0x000F)
+#define TPM_TAG_TRANSPORT_LOG_IN ((TPM_STRUCTURE_TAG) 0x0010)
+#define TPM_TAG_TRANSPORT_LOG_OUT ((TPM_STRUCTURE_TAG) 0x0011)
+#define TPM_TAG_AUDIT_EVENT_IN ((TPM_STRUCTURE_TAG) 0x0012)
+#define TPM_TAG_AUDIT_EVENT_OUT ((TPM_STRUCTURE_TAG) 0x0013)
+#define TPM_TAG_CURRENT_TICKS ((TPM_STRUCTURE_TAG) 0x0014)
+#define TPM_TAG_KEY ((TPM_STRUCTURE_TAG) 0x0015)
+#define TPM_TAG_STORED_DATA12 ((TPM_STRUCTURE_TAG) 0x0016)
+#define TPM_TAG_NV_ATTRIBUTES ((TPM_STRUCTURE_TAG) 0x0017)
+#define TPM_TAG_NV_DATA_PUBLIC ((TPM_STRUCTURE_TAG) 0x0018)
+#define TPM_TAG_NV_DATA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0019)
+#define TPM_TAG_DELEGATIONS ((TPM_STRUCTURE_TAG) 0x001A)
+#define TPM_TAG_DELEGATE_PUBLIC ((TPM_STRUCTURE_TAG) 0x001B)
+#define TPM_TAG_DELEGATE_TABLE_ROW ((TPM_STRUCTURE_TAG) 0x001C)
+#define TPM_TAG_TRANSPORT_AUTH ((TPM_STRUCTURE_TAG) 0x001D)
+#define TPM_TAG_TRANSPORT_PUBLIC ((TPM_STRUCTURE_TAG) 0x001E)
+#define TPM_TAG_PERMANENT_FLAGS ((TPM_STRUCTURE_TAG) 0x001F)
+#define TPM_TAG_STCLEAR_FLAGS ((TPM_STRUCTURE_TAG) 0x0020)
+#define TPM_TAG_STANY_FLAGS ((TPM_STRUCTURE_TAG) 0x0021)
+#define TPM_TAG_PERMANENT_DATA ((TPM_STRUCTURE_TAG) 0x0022)
+#define TPM_TAG_STCLEAR_DATA ((TPM_STRUCTURE_TAG) 0x0023)
+#define TPM_TAG_STANY_DATA ((TPM_STRUCTURE_TAG) 0x0024)
+#define TPM_TAG_FAMILY_TABLE_ENTRY ((TPM_STRUCTURE_TAG) 0x0025)
+#define TPM_TAG_DELEGATE_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0026)
+#define TPM_TAG_DELG_KEY_BLOB ((TPM_STRUCTURE_TAG) 0x0027)
+#define TPM_TAG_KEY12 ((TPM_STRUCTURE_TAG) 0x0028)
+#define TPM_TAG_CERTIFY_INFO2 ((TPM_STRUCTURE_TAG) 0x0029)
+#define TPM_TAG_DELEGATE_OWNER_BLOB ((TPM_STRUCTURE_TAG) 0x002A)
+#define TPM_TAG_EK_BLOB_ACTIVATE ((TPM_STRUCTURE_TAG) 0x002B)
+#define TPM_TAG_DAA_BLOB ((TPM_STRUCTURE_TAG) 0x002C)
+#define TPM_TAG_DAA_CONTEXT ((TPM_STRUCTURE_TAG) 0x002D)
+#define TPM_TAG_DAA_ENFORCE ((TPM_STRUCTURE_TAG) 0x002E)
+#define TPM_TAG_DAA_ISSUER ((TPM_STRUCTURE_TAG) 0x002F)
+#define TPM_TAG_CAP_VERSION_INFO ((TPM_STRUCTURE_TAG) 0x0030)
+#define TPM_TAG_DAA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0031)
+#define TPM_TAG_DAA_TPM ((TPM_STRUCTURE_TAG) 0x0032)
+#define TPM_TAG_CMK_MIGAUTH ((TPM_STRUCTURE_TAG) 0x0033)
+#define TPM_TAG_CMK_SIGTICKET ((TPM_STRUCTURE_TAG) 0x0034)
+#define TPM_TAG_CMK_MA_APPROVAL ((TPM_STRUCTURE_TAG) 0x0035)
+#define TPM_TAG_QUOTE_INFO2 ((TPM_STRUCTURE_TAG) 0x0036)
+#define TPM_TAG_DA_INFO ((TPM_STRUCTURE_TAG) 0x0037)
+#define TPM_TAG_DA_LIMITED ((TPM_STRUCTURE_TAG) 0x0038)
+#define TPM_TAG_DA_ACTION_TYPE ((TPM_STRUCTURE_TAG) 0x0039)
//
// Part 2, section 4: TPM Types
@@ -283,69 +276,69 @@ typedef UINT32 TPM_FAMILY_OPERATION;
//
// Part 2, section 4.1: TPM_RESOURCE_TYPE
//
-#define TPM_RT_KEY ((TPM_RESOURCE_TYPE) 0x00000001) ///< The handle is a key handle and is the result of a LoadKey type operation
-#define TPM_RT_AUTH ((TPM_RESOURCE_TYPE) 0x00000002) ///< The handle is an authorization handle. Auth handles come from TPM_OIAP, TPM_OSAP and TPM_DSAP
-#define TPM_RT_HASH ((TPM_RESOURCE_TYPE) 0x00000003) ///< Reserved for hashes
-#define TPM_RT_TRANS ((TPM_RESOURCE_TYPE) 0x00000004) ///< The handle is for a transport session. Transport handles come from TPM_EstablishTransport
-#define TPM_RT_CONTEXT ((TPM_RESOURCE_TYPE) 0x00000005) ///< Resource wrapped and held outside the TPM using the context save/restore commands
-#define TPM_RT_COUNTER ((TPM_RESOURCE_TYPE) 0x00000006) ///< Reserved for counters
-#define TPM_RT_DELEGATE ((TPM_RESOURCE_TYPE) 0x00000007) ///< The handle is for a delegate row. These are the internal rows held in NV storage by the TPM
-#define TPM_RT_DAA_TPM ((TPM_RESOURCE_TYPE) 0x00000008) ///< The value is a DAA TPM specific blob
-#define TPM_RT_DAA_V0 ((TPM_RESOURCE_TYPE) 0x00000009) ///< The value is a DAA V0 parameter
-#define TPM_RT_DAA_V1 ((TPM_RESOURCE_TYPE) 0x0000000A) ///< The value is a DAA V1 parameter
+#define TPM_RT_KEY ((TPM_RESOURCE_TYPE) 0x00000001) ///< The handle is a key handle and is the result of a LoadKey type operation
+#define TPM_RT_AUTH ((TPM_RESOURCE_TYPE) 0x00000002) ///< The handle is an authorization handle. Auth handles come from TPM_OIAP, TPM_OSAP and TPM_DSAP
+#define TPM_RT_HASH ((TPM_RESOURCE_TYPE) 0x00000003) ///< Reserved for hashes
+#define TPM_RT_TRANS ((TPM_RESOURCE_TYPE) 0x00000004) ///< The handle is for a transport session. Transport handles come from TPM_EstablishTransport
+#define TPM_RT_CONTEXT ((TPM_RESOURCE_TYPE) 0x00000005) ///< Resource wrapped and held outside the TPM using the context save/restore commands
+#define TPM_RT_COUNTER ((TPM_RESOURCE_TYPE) 0x00000006) ///< Reserved for counters
+#define TPM_RT_DELEGATE ((TPM_RESOURCE_TYPE) 0x00000007) ///< The handle is for a delegate row. These are the internal rows held in NV storage by the TPM
+#define TPM_RT_DAA_TPM ((TPM_RESOURCE_TYPE) 0x00000008) ///< The value is a DAA TPM specific blob
+#define TPM_RT_DAA_V0 ((TPM_RESOURCE_TYPE) 0x00000009) ///< The value is a DAA V0 parameter
+#define TPM_RT_DAA_V1 ((TPM_RESOURCE_TYPE) 0x0000000A) ///< The value is a DAA V1 parameter
//
// Part 2, section 4.2: TPM_PAYLOAD_TYPE
//
-#define TPM_PT_ASYM ((TPM_PAYLOAD_TYPE) 0x01) ///< The entity is an asymmetric key
-#define TPM_PT_BIND ((TPM_PAYLOAD_TYPE) 0x02) ///< The entity is bound data
-#define TPM_PT_MIGRATE ((TPM_PAYLOAD_TYPE) 0x03) ///< The entity is a migration blob
-#define TPM_PT_MAINT ((TPM_PAYLOAD_TYPE) 0x04) ///< The entity is a maintenance blob
-#define TPM_PT_SEAL ((TPM_PAYLOAD_TYPE) 0x05) ///< The entity is sealed data
-#define TPM_PT_MIGRATE_RESTRICTED ((TPM_PAYLOAD_TYPE) 0x06) ///< The entity is a restricted-migration asymmetric key
-#define TPM_PT_MIGRATE_EXTERNAL ((TPM_PAYLOAD_TYPE) 0x07) ///< The entity is a external migratable key
-#define TPM_PT_CMK_MIGRATE ((TPM_PAYLOAD_TYPE) 0x08) ///< The entity is a CMK migratable blob
-#define TPM_PT_VENDOR_SPECIFIC ((TPM_PAYLOAD_TYPE) 0x80) ///< 0x80 - 0xFF Vendor specific payloads
+#define TPM_PT_ASYM ((TPM_PAYLOAD_TYPE) 0x01) ///< The entity is an asymmetric key
+#define TPM_PT_BIND ((TPM_PAYLOAD_TYPE) 0x02) ///< The entity is bound data
+#define TPM_PT_MIGRATE ((TPM_PAYLOAD_TYPE) 0x03) ///< The entity is a migration blob
+#define TPM_PT_MAINT ((TPM_PAYLOAD_TYPE) 0x04) ///< The entity is a maintenance blob
+#define TPM_PT_SEAL ((TPM_PAYLOAD_TYPE) 0x05) ///< The entity is sealed data
+#define TPM_PT_MIGRATE_RESTRICTED ((TPM_PAYLOAD_TYPE) 0x06) ///< The entity is a restricted-migration asymmetric key
+#define TPM_PT_MIGRATE_EXTERNAL ((TPM_PAYLOAD_TYPE) 0x07) ///< The entity is a external migratable key
+#define TPM_PT_CMK_MIGRATE ((TPM_PAYLOAD_TYPE) 0x08) ///< The entity is a CMK migratable blob
+#define TPM_PT_VENDOR_SPECIFIC ((TPM_PAYLOAD_TYPE) 0x80) ///< 0x80 - 0xFF Vendor specific payloads
//
// Part 2, section 4.3: TPM_ENTITY_TYPE
//
-#define TPM_ET_KEYHANDLE ((UINT16) 0x0001) ///< The entity is a keyHandle or key
-#define TPM_ET_OWNER ((UINT16) 0x0002) ///< The entity is the TPM Owner
-#define TPM_ET_DATA ((UINT16) 0x0003) ///< The entity is some data
-#define TPM_ET_SRK ((UINT16) 0x0004) ///< The entity is the SRK
-#define TPM_ET_KEY ((UINT16) 0x0005) ///< The entity is a key or keyHandle
-#define TPM_ET_REVOKE ((UINT16) 0x0006) ///< The entity is the RevokeTrust value
-#define TPM_ET_DEL_OWNER_BLOB ((UINT16) 0x0007) ///< The entity is a delegate owner blob
-#define TPM_ET_DEL_ROW ((UINT16) 0x0008) ///< The entity is a delegate row
-#define TPM_ET_DEL_KEY_BLOB ((UINT16) 0x0009) ///< The entity is a delegate key blob
-#define TPM_ET_COUNTER ((UINT16) 0x000A) ///< The entity is a counter
-#define TPM_ET_NV ((UINT16) 0x000B) ///< The entity is a NV index
-#define TPM_ET_OPERATOR ((UINT16) 0x000C) ///< The entity is the operator
-#define TPM_ET_RESERVED_HANDLE ((UINT16) 0x0040) ///< Reserved. This value avoids collisions with the handle MSB setting.
+#define TPM_ET_KEYHANDLE ((UINT16) 0x0001) ///< The entity is a keyHandle or key
+#define TPM_ET_OWNER ((UINT16) 0x0002) ///< The entity is the TPM Owner
+#define TPM_ET_DATA ((UINT16) 0x0003) ///< The entity is some data
+#define TPM_ET_SRK ((UINT16) 0x0004) ///< The entity is the SRK
+#define TPM_ET_KEY ((UINT16) 0x0005) ///< The entity is a key or keyHandle
+#define TPM_ET_REVOKE ((UINT16) 0x0006) ///< The entity is the RevokeTrust value
+#define TPM_ET_DEL_OWNER_BLOB ((UINT16) 0x0007) ///< The entity is a delegate owner blob
+#define TPM_ET_DEL_ROW ((UINT16) 0x0008) ///< The entity is a delegate row
+#define TPM_ET_DEL_KEY_BLOB ((UINT16) 0x0009) ///< The entity is a delegate key blob
+#define TPM_ET_COUNTER ((UINT16) 0x000A) ///< The entity is a counter
+#define TPM_ET_NV ((UINT16) 0x000B) ///< The entity is a NV index
+#define TPM_ET_OPERATOR ((UINT16) 0x000C) ///< The entity is the operator
+#define TPM_ET_RESERVED_HANDLE ((UINT16) 0x0040) ///< Reserved. This value avoids collisions with the handle MSB setting.
//
// TPM_ENTITY_TYPE MSB Values: The MSB is used to indicate the ADIP encryption sheme when applicable
//
-#define TPM_ET_XOR ((UINT16) 0x0000) ///< ADIP encryption scheme: XOR
-#define TPM_ET_AES128 ((UINT16) 0x0006) ///< ADIP encryption scheme: AES 128 bits
+#define TPM_ET_XOR ((UINT16) 0x0000) ///< ADIP encryption scheme: XOR
+#define TPM_ET_AES128 ((UINT16) 0x0006) ///< ADIP encryption scheme: AES 128 bits
//
// Part 2, section 4.4.1: Reserved Key Handles
//
-#define TPM_KH_SRK ((TPM_KEY_HANDLE) 0x40000000) ///< The handle points to the SRK
-#define TPM_KH_OWNER ((TPM_KEY_HANDLE) 0x40000001) ///< The handle points to the TPM Owner
-#define TPM_KH_REVOKE ((TPM_KEY_HANDLE) 0x40000002) ///< The handle points to the RevokeTrust value
-#define TPM_KH_TRANSPORT ((TPM_KEY_HANDLE) 0x40000003) ///< The handle points to the EstablishTransport static authorization
-#define TPM_KH_OPERATOR ((TPM_KEY_HANDLE) 0x40000004) ///< The handle points to the Operator auth
-#define TPM_KH_ADMIN ((TPM_KEY_HANDLE) 0x40000005) ///< The handle points to the delegation administration auth
-#define TPM_KH_EK ((TPM_KEY_HANDLE) 0x40000006) ///< The handle points to the PUBEK, only usable with TPM_OwnerReadInternalPub
+#define TPM_KH_SRK ((TPM_KEY_HANDLE) 0x40000000) ///< The handle points to the SRK
+#define TPM_KH_OWNER ((TPM_KEY_HANDLE) 0x40000001) ///< The handle points to the TPM Owner
+#define TPM_KH_REVOKE ((TPM_KEY_HANDLE) 0x40000002) ///< The handle points to the RevokeTrust value
+#define TPM_KH_TRANSPORT ((TPM_KEY_HANDLE) 0x40000003) ///< The handle points to the EstablishTransport static authorization
+#define TPM_KH_OPERATOR ((TPM_KEY_HANDLE) 0x40000004) ///< The handle points to the Operator auth
+#define TPM_KH_ADMIN ((TPM_KEY_HANDLE) 0x40000005) ///< The handle points to the delegation administration auth
+#define TPM_KH_EK ((TPM_KEY_HANDLE) 0x40000006) ///< The handle points to the PUBEK, only usable with TPM_OwnerReadInternalPub
//
// Part 2, section 4.5: TPM_STARTUP_TYPE
//
-#define TPM_ST_CLEAR ((TPM_STARTUP_TYPE) 0x0001) ///< The TPM is starting up from a clean state
-#define TPM_ST_STATE ((TPM_STARTUP_TYPE) 0x0002) ///< The TPM is starting up from a saved state
-#define TPM_ST_DEACTIVATED ((TPM_STARTUP_TYPE) 0x0003) ///< The TPM is to startup and set the deactivated flag to TRUE
+#define TPM_ST_CLEAR ((TPM_STARTUP_TYPE) 0x0001) ///< The TPM is starting up from a clean state
+#define TPM_ST_STATE ((TPM_STARTUP_TYPE) 0x0002) ///< The TPM is starting up from a saved state
+#define TPM_ST_DEACTIVATED ((TPM_STARTUP_TYPE) 0x0003) ///< The TPM is to startup and set the deactivated flag to TRUE
//
// Part 2, section 4.6: TPM_STATUP_EFFECTS
@@ -355,65 +348,65 @@ typedef UINT32 TPM_FAMILY_OPERATION;
//
// Part 2, section 4.7: TPM_PROTOCOL_ID
//
-#define TPM_PID_OIAP ((TPM_PROTOCOL_ID) 0x0001) ///< The OIAP protocol.
-#define TPM_PID_OSAP ((TPM_PROTOCOL_ID) 0x0002) ///< The OSAP protocol.
-#define TPM_PID_ADIP ((TPM_PROTOCOL_ID) 0x0003) ///< The ADIP protocol.
-#define TPM_PID_ADCP ((TPM_PROTOCOL_ID) 0x0004) ///< The ADCP protocol.
-#define TPM_PID_OWNER ((TPM_PROTOCOL_ID) 0x0005) ///< The protocol for taking ownership of a TPM.
-#define TPM_PID_DSAP ((TPM_PROTOCOL_ID) 0x0006) ///< The DSAP protocol
-#define TPM_PID_TRANSPORT ((TPM_PROTOCOL_ID) 0x0007) ///< The transport protocol
+#define TPM_PID_OIAP ((TPM_PROTOCOL_ID) 0x0001) ///< The OIAP protocol.
+#define TPM_PID_OSAP ((TPM_PROTOCOL_ID) 0x0002) ///< The OSAP protocol.
+#define TPM_PID_ADIP ((TPM_PROTOCOL_ID) 0x0003) ///< The ADIP protocol.
+#define TPM_PID_ADCP ((TPM_PROTOCOL_ID) 0x0004) ///< The ADCP protocol.
+#define TPM_PID_OWNER ((TPM_PROTOCOL_ID) 0x0005) ///< The protocol for taking ownership of a TPM.
+#define TPM_PID_DSAP ((TPM_PROTOCOL_ID) 0x0006) ///< The DSAP protocol
+#define TPM_PID_TRANSPORT ((TPM_PROTOCOL_ID) 0x0007) ///< The transport protocol
//
// Part 2, section 4.8: TPM_ALGORITHM_ID
// The TPM MUST support the algorithms TPM_ALG_RSA, TPM_ALG_SHA, TPM_ALG_HMAC,
// TPM_ALG_MGF1
//
-#define TPM_ALG_RSA ((TPM_ALGORITHM_ID) 0x00000001) ///< The RSA algorithm.
-#define TPM_ALG_DES ((TPM_ALGORITHM_ID) 0x00000002) ///< The DES algorithm
-#define TPM_ALG_3DES ((TPM_ALGORITHM_ID) 0x00000003) ///< The 3DES algorithm in EDE mode
-#define TPM_ALG_SHA ((TPM_ALGORITHM_ID) 0x00000004) ///< The SHA1 algorithm
-#define TPM_ALG_HMAC ((TPM_ALGORITHM_ID) 0x00000005) ///< The RFC 2104 HMAC algorithm
-#define TPM_ALG_AES128 ((TPM_ALGORITHM_ID) 0x00000006) ///< The AES algorithm, key size 128
-#define TPM_ALG_MGF1 ((TPM_ALGORITHM_ID) 0x00000007) ///< The XOR algorithm using MGF1 to create a string the size of the encrypted block
-#define TPM_ALG_AES192 ((TPM_ALGORITHM_ID) 0x00000008) ///< AES, key size 192
-#define TPM_ALG_AES256 ((TPM_ALGORITHM_ID) 0x00000009) ///< AES, key size 256
-#define TPM_ALG_XOR ((TPM_ALGORITHM_ID) 0x0000000A) ///< XOR using the rolling nonces
+#define TPM_ALG_RSA ((TPM_ALGORITHM_ID) 0x00000001) ///< The RSA algorithm.
+#define TPM_ALG_DES ((TPM_ALGORITHM_ID) 0x00000002) ///< The DES algorithm
+#define TPM_ALG_3DES ((TPM_ALGORITHM_ID) 0x00000003) ///< The 3DES algorithm in EDE mode
+#define TPM_ALG_SHA ((TPM_ALGORITHM_ID) 0x00000004) ///< The SHA1 algorithm
+#define TPM_ALG_HMAC ((TPM_ALGORITHM_ID) 0x00000005) ///< The RFC 2104 HMAC algorithm
+#define TPM_ALG_AES128 ((TPM_ALGORITHM_ID) 0x00000006) ///< The AES algorithm, key size 128
+#define TPM_ALG_MGF1 ((TPM_ALGORITHM_ID) 0x00000007) ///< The XOR algorithm using MGF1 to create a string the size of the encrypted block
+#define TPM_ALG_AES192 ((TPM_ALGORITHM_ID) 0x00000008) ///< AES, key size 192
+#define TPM_ALG_AES256 ((TPM_ALGORITHM_ID) 0x00000009) ///< AES, key size 256
+#define TPM_ALG_XOR ((TPM_ALGORITHM_ID) 0x0000000A) ///< XOR using the rolling nonces
//
// Part 2, section 4.9: TPM_PHYSICAL_PRESENCE
//
-#define TPM_PHYSICAL_PRESENCE_HW_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0200) ///< Sets the physicalPresenceHWEnable to FALSE
-#define TPM_PHYSICAL_PRESENCE_CMD_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0100) ///< Sets the physicalPresenceCMDEnable to FALSE
-#define TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0080) ///< Sets the physicalPresenceLifetimeLock to TRUE
-#define TPM_PHYSICAL_PRESENCE_HW_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0040) ///< Sets the physicalPresenceHWEnable to TRUE
-#define TPM_PHYSICAL_PRESENCE_CMD_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0020) ///< Sets the physicalPresenceCMDEnable to TRUE
-#define TPM_PHYSICAL_PRESENCE_NOTPRESENT ((TPM_PHYSICAL_PRESENCE) 0x0010) ///< Sets PhysicalPresence = FALSE
-#define TPM_PHYSICAL_PRESENCE_PRESENT ((TPM_PHYSICAL_PRESENCE) 0x0008) ///< Sets PhysicalPresence = TRUE
-#define TPM_PHYSICAL_PRESENCE_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0004) ///< Sets PhysicalPresenceLock = TRUE
+#define TPM_PHYSICAL_PRESENCE_HW_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0200) ///< Sets the physicalPresenceHWEnable to FALSE
+#define TPM_PHYSICAL_PRESENCE_CMD_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0100) ///< Sets the physicalPresenceCMDEnable to FALSE
+#define TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0080) ///< Sets the physicalPresenceLifetimeLock to TRUE
+#define TPM_PHYSICAL_PRESENCE_HW_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0040) ///< Sets the physicalPresenceHWEnable to TRUE
+#define TPM_PHYSICAL_PRESENCE_CMD_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0020) ///< Sets the physicalPresenceCMDEnable to TRUE
+#define TPM_PHYSICAL_PRESENCE_NOTPRESENT ((TPM_PHYSICAL_PRESENCE) 0x0010) ///< Sets PhysicalPresence = FALSE
+#define TPM_PHYSICAL_PRESENCE_PRESENT ((TPM_PHYSICAL_PRESENCE) 0x0008) ///< Sets PhysicalPresence = TRUE
+#define TPM_PHYSICAL_PRESENCE_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0004) ///< Sets PhysicalPresenceLock = TRUE
//
// Part 2, section 4.10: TPM_MIGRATE_SCHEME
//
-#define TPM_MS_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0001) ///< A public key that can be used with all TPM migration commands other than 'ReWrap' mode.
-#define TPM_MS_REWRAP ((TPM_MIGRATE_SCHEME) 0x0002) ///< A public key that can be used for the ReWrap mode of TPM_CreateMigrationBlob.
-#define TPM_MS_MAINT ((TPM_MIGRATE_SCHEME) 0x0003) ///< A public key that can be used for the Maintenance commands
-#define TPM_MS_RESTRICT_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0004) ///< The key is to be migrated to a Migration Authority.
-#define TPM_MS_RESTRICT_APPROVE_DOUBLE ((TPM_MIGRATE_SCHEME) 0x0005) ///< The key is to be migrated to an entity approved by a Migration Authority using double wrapping
+#define TPM_MS_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0001) ///< A public key that can be used with all TPM migration commands other than 'ReWrap' mode.
+#define TPM_MS_REWRAP ((TPM_MIGRATE_SCHEME) 0x0002) ///< A public key that can be used for the ReWrap mode of TPM_CreateMigrationBlob.
+#define TPM_MS_MAINT ((TPM_MIGRATE_SCHEME) 0x0003) ///< A public key that can be used for the Maintenance commands
+#define TPM_MS_RESTRICT_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0004) ///< The key is to be migrated to a Migration Authority.
+#define TPM_MS_RESTRICT_APPROVE_DOUBLE ((TPM_MIGRATE_SCHEME) 0x0005) ///< The key is to be migrated to an entity approved by a Migration Authority using double wrapping
//
// Part 2, section 4.11: TPM_EK_TYPE
//
-#define TPM_EK_TYPE_ACTIVATE ((TPM_EK_TYPE) 0x0001) ///< The blob MUST be TPM_EK_BLOB_ACTIVATE
-#define TPM_EK_TYPE_AUTH ((TPM_EK_TYPE) 0x0002) ///< The blob MUST be TPM_EK_BLOB_AUTH
+#define TPM_EK_TYPE_ACTIVATE ((TPM_EK_TYPE) 0x0001) ///< The blob MUST be TPM_EK_BLOB_ACTIVATE
+#define TPM_EK_TYPE_AUTH ((TPM_EK_TYPE) 0x0002) ///< The blob MUST be TPM_EK_BLOB_AUTH
//
// Part 2, section 4.12: TPM_PLATFORM_SPECIFIC
//
-#define TPM_PS_PC_11 ((TPM_PLATFORM_SPECIFIC) 0x0001) ///< PC Specific version 1.1
-#define TPM_PS_PC_12 ((TPM_PLATFORM_SPECIFIC) 0x0002) ///< PC Specific version 1.2
-#define TPM_PS_PDA_12 ((TPM_PLATFORM_SPECIFIC) 0x0003) ///< PDA Specific version 1.2
-#define TPM_PS_Server_12 ((TPM_PLATFORM_SPECIFIC) 0x0004) ///< Server Specific version 1.2
-#define TPM_PS_Mobile_12 ((TPM_PLATFORM_SPECIFIC) 0x0005) ///< Mobil Specific version 1.2
+#define TPM_PS_PC_11 ((TPM_PLATFORM_SPECIFIC) 0x0001) ///< PC Specific version 1.1
+#define TPM_PS_PC_12 ((TPM_PLATFORM_SPECIFIC) 0x0002) ///< PC Specific version 1.2
+#define TPM_PS_PDA_12 ((TPM_PLATFORM_SPECIFIC) 0x0003) ///< PDA Specific version 1.2
+#define TPM_PS_Server_12 ((TPM_PLATFORM_SPECIFIC) 0x0004) ///< Server Specific version 1.2
+#define TPM_PS_Mobile_12 ((TPM_PLATFORM_SPECIFIC) 0x0005) ///< Mobil Specific version 1.2
//
// Part 2, section 5: Basic Structures
@@ -423,72 +416,71 @@ typedef UINT32 TPM_FAMILY_OPERATION;
/// Part 2, section 5.1: TPM_STRUCT_VER
///
typedef struct tdTPM_STRUCT_VER {
- UINT8 major;
- UINT8 minor;
- UINT8 revMajor;
- UINT8 revMinor;
+ UINT8 major;
+ UINT8 minor;
+ UINT8 revMajor;
+ UINT8 revMinor;
} TPM_STRUCT_VER;
///
/// Part 2, section 5.3: TPM_VERSION
///
typedef struct tdTPM_VERSION {
- TPM_VERSION_BYTE major;
- TPM_VERSION_BYTE minor;
- UINT8 revMajor;
- UINT8 revMinor;
+ TPM_VERSION_BYTE major;
+ TPM_VERSION_BYTE minor;
+ UINT8 revMajor;
+ UINT8 revMinor;
} TPM_VERSION;
-
-#define TPM_SHA1_160_HASH_LEN 0x14
-#define TPM_SHA1BASED_NONCE_LEN TPM_SHA1_160_HASH_LEN
+#define TPM_SHA1_160_HASH_LEN 0x14
+#define TPM_SHA1BASED_NONCE_LEN TPM_SHA1_160_HASH_LEN
///
/// Part 2, section 5.4: TPM_DIGEST
///
-typedef struct tdTPM_DIGEST{
- UINT8 digest[TPM_SHA1_160_HASH_LEN];
+typedef struct tdTPM_DIGEST {
+ UINT8 digest[TPM_SHA1_160_HASH_LEN];
} TPM_DIGEST;
///
/// This SHALL be the digest of the chosen identityLabel and privacyCA for a new TPM identity
///
-typedef TPM_DIGEST TPM_CHOSENID_HASH;
+typedef TPM_DIGEST TPM_CHOSENID_HASH;
///
/// This SHALL be the hash of a list of PCR indexes and PCR values that a key or data is bound to
///
-typedef TPM_DIGEST TPM_COMPOSITE_HASH;
+typedef TPM_DIGEST TPM_COMPOSITE_HASH;
///
/// This SHALL be the value of a DIR register
///
-typedef TPM_DIGEST TPM_DIRVALUE;
+typedef TPM_DIGEST TPM_DIRVALUE;
-typedef TPM_DIGEST TPM_HMAC;
+typedef TPM_DIGEST TPM_HMAC;
///
/// The value inside of the PCR
///
-typedef TPM_DIGEST TPM_PCRVALUE;
+typedef TPM_DIGEST TPM_PCRVALUE;
///
/// This SHALL be the value of the current internal audit state
///
-typedef TPM_DIGEST TPM_AUDITDIGEST;
+typedef TPM_DIGEST TPM_AUDITDIGEST;
///
/// Part 2, section 5.5: TPM_NONCE
///
-typedef struct tdTPM_NONCE{
- UINT8 nonce[20];
+typedef struct tdTPM_NONCE {
+ UINT8 nonce[20];
} TPM_NONCE;
///
/// This SHALL be a random value generated by a TPM immediately after the EK is installed
/// in that TPM, whenever an EK is installed in that TPM
///
-typedef TPM_NONCE TPM_DAA_TPM_SEED;
+typedef TPM_NONCE TPM_DAA_TPM_SEED;
///
/// This SHALL be a random value
///
-typedef TPM_NONCE TPM_DAA_CONTEXT_SEED;
+typedef TPM_NONCE TPM_DAA_CONTEXT_SEED;
//
// Part 2, section 5.6: TPM_AUTHDATA
@@ -497,25 +489,25 @@ typedef TPM_NONCE TPM_DAA_CONTEXT_SEED;
/// The AuthData data is the information that is saved or passed to provide proof of ownership
/// 296 of an entity
///
-typedef UINT8 tdTPM_AUTHDATA[20];
+typedef UINT8 tdTPM_AUTHDATA[20];
-typedef tdTPM_AUTHDATA TPM_AUTHDATA;
+typedef tdTPM_AUTHDATA TPM_AUTHDATA;
///
/// A secret plaintext value used in the authorization process
///
-typedef TPM_AUTHDATA TPM_SECRET;
+typedef TPM_AUTHDATA TPM_SECRET;
///
/// A ciphertext (encrypted) version of AuthData data. The encryption mechanism depends on the context
///
-typedef TPM_AUTHDATA TPM_ENCAUTH;
+typedef TPM_AUTHDATA TPM_ENCAUTH;
///
/// Part 2, section 5.7: TPM_KEY_HANDLE_LIST
/// Size of handle is loaded * sizeof(TPM_KEY_HANDLE)
///
typedef struct tdTPM_KEY_HANDLE_LIST {
- UINT16 loaded;
- TPM_KEY_HANDLE handle[1];
+ UINT16 loaded;
+ TPM_KEY_HANDLE handle[1];
} TPM_KEY_HANDLE_LIST;
//
@@ -526,27 +518,27 @@ typedef struct tdTPM_KEY_HANDLE_LIST {
/// used for signing operations, only. This means that it MUST be a leaf of the
/// Protected Storage key hierarchy.
///
-#define TPM_KEY_SIGNING ((UINT16) 0x0010)
+#define TPM_KEY_SIGNING ((UINT16) 0x0010)
///
/// TPM_KEY_STORAGE SHALL indicate a storage key. The key SHALL be used to wrap
/// and unwrap other keys in the Protected Storage hierarchy
///
-#define TPM_KEY_STORAGE ((UINT16) 0x0011)
+#define TPM_KEY_STORAGE ((UINT16) 0x0011)
///
/// TPM_KEY_IDENTITY SHALL indicate an identity key. The key SHALL be used for
/// operations that require a TPM identity, only.
///
-#define TPM_KEY_IDENTITY ((UINT16) 0x0012)
+#define TPM_KEY_IDENTITY ((UINT16) 0x0012)
///
/// TPM_KEY_AUTHCHANGE SHALL indicate an ephemeral key that is in use during
/// the ChangeAuthAsym process, only.
///
-#define TPM_KEY_AUTHCHANGE ((UINT16) 0x0013)
+#define TPM_KEY_AUTHCHANGE ((UINT16) 0x0013)
///
/// TPM_KEY_BIND SHALL indicate a key that can be used for TPM_Bind and
/// TPM_Unbind operations only.
///
-#define TPM_KEY_BIND ((UINT16) 0x0014)
+#define TPM_KEY_BIND ((UINT16) 0x0014)
///
/// TPM_KEY_LEGACY SHALL indicate a key that can perform signing and binding
/// operations. The key MAY be used for both signing and binding operations.
@@ -555,11 +547,11 @@ typedef struct tdTPM_KEY_HANDLE_LIST {
/// key type is not recommended TPM_KEY_MIGRATE 0x0016 This SHALL indicate a
/// key in use for TPM_MigrateKey
///
-#define TPM_KEY_LEGACY ((UINT16) 0x0015)
+#define TPM_KEY_LEGACY ((UINT16) 0x0015)
///
/// TPM_KEY_MIGRAGE SHALL indicate a key in use for TPM_MigrateKey
///
-#define TPM_KEY_MIGRATE ((UINT16) 0x0016)
+#define TPM_KEY_MIGRATE ((UINT16) 0x0016)
//
// Part 2, section 5.8.1: Mandatory Key Usage Schemes
@@ -580,76 +572,76 @@ typedef struct tdTPM_KEY_HANDLE_LIST {
//
// Part 2, section 5.9: TPM_AUTH_DATA_USAGE values
//
-#define TPM_AUTH_NEVER ((TPM_AUTH_DATA_USAGE) 0x00)
-#define TPM_AUTH_ALWAYS ((TPM_AUTH_DATA_USAGE) 0x01)
-#define TPM_AUTH_PRIV_USE_ONLY ((TPM_AUTH_DATA_USAGE) 0x03)
+#define TPM_AUTH_NEVER ((TPM_AUTH_DATA_USAGE) 0x00)
+#define TPM_AUTH_ALWAYS ((TPM_AUTH_DATA_USAGE) 0x01)
+#define TPM_AUTH_PRIV_USE_ONLY ((TPM_AUTH_DATA_USAGE) 0x03)
///
/// Part 2, section 5.10: TPM_KEY_FLAGS
///
typedef enum tdTPM_KEY_FLAGS {
- redirection = 0x00000001,
- migratable = 0x00000002,
- isVolatile = 0x00000004,
- pcrIgnoredOnRead = 0x00000008,
- migrateAuthority = 0x00000010
+ redirection = 0x00000001,
+ migratable = 0x00000002,
+ isVolatile = 0x00000004,
+ pcrIgnoredOnRead = 0x00000008,
+ migrateAuthority = 0x00000010
} TPM_KEY_FLAGS_BITS;
///
/// Part 2, section 5.11: TPM_CHANGEAUTH_VALIDATE
///
typedef struct tdTPM_CHANGEAUTH_VALIDATE {
- TPM_SECRET newAuthSecret;
- TPM_NONCE n1;
+ TPM_SECRET newAuthSecret;
+ TPM_NONCE n1;
} TPM_CHANGEAUTH_VALIDATE;
///
/// Part 2, section 5.12: TPM_MIGRATIONKEYAUTH
-/// decalared after section 10 to catch declaration of TPM_PUBKEY
+/// declared after section 10 to catch declaration of TPM_PUBKEY
///
/// Part 2 section 10.1: TPM_KEY_PARMS
/// [size_is(parmSize)] BYTE* parms;
///
typedef struct tdTPM_KEY_PARMS {
- TPM_ALGORITHM_ID algorithmID;
- TPM_ENC_SCHEME encScheme;
- TPM_SIG_SCHEME sigScheme;
- UINT32 parmSize;
- UINT8 *parms;
+ TPM_ALGORITHM_ID algorithmID;
+ TPM_ENC_SCHEME encScheme;
+ TPM_SIG_SCHEME sigScheme;
+ UINT32 parmSize;
+ UINT8 *parms;
} TPM_KEY_PARMS;
///
/// Part 2, section 10.4: TPM_STORE_PUBKEY
///
typedef struct tdTPM_STORE_PUBKEY {
- UINT32 keyLength;
- UINT8 key[1];
+ UINT32 keyLength;
+ UINT8 key[1];
} TPM_STORE_PUBKEY;
///
/// Part 2, section 10.5: TPM_PUBKEY
///
-typedef struct tdTPM_PUBKEY{
- TPM_KEY_PARMS algorithmParms;
- TPM_STORE_PUBKEY pubKey;
+typedef struct tdTPM_PUBKEY {
+ TPM_KEY_PARMS algorithmParms;
+ TPM_STORE_PUBKEY pubKey;
} TPM_PUBKEY;
///
/// Part 2, section 5.12: TPM_MIGRATIONKEYAUTH
///
-typedef struct tdTPM_MIGRATIONKEYAUTH{
- TPM_PUBKEY migrationKey;
- TPM_MIGRATE_SCHEME migrationScheme;
- TPM_DIGEST digest;
+typedef struct tdTPM_MIGRATIONKEYAUTH {
+ TPM_PUBKEY migrationKey;
+ TPM_MIGRATE_SCHEME migrationScheme;
+ TPM_DIGEST digest;
} TPM_MIGRATIONKEYAUTH;
///
/// Part 2, section 5.13: TPM_COUNTER_VALUE
///
-typedef struct tdTPM_COUNTER_VALUE{
- TPM_STRUCTURE_TAG tag;
- UINT8 label[4];
- TPM_ACTUAL_COUNT counter;
+typedef struct tdTPM_COUNTER_VALUE {
+ TPM_STRUCTURE_TAG tag;
+ UINT8 label[4];
+ TPM_ACTUAL_COUNT counter;
} TPM_COUNTER_VALUE;
///
@@ -657,11 +649,11 @@ typedef struct tdTPM_COUNTER_VALUE{
/// Size of data indicated by dataLen
///
typedef struct tdTPM_SIGN_INFO {
- TPM_STRUCTURE_TAG tag;
- UINT8 fixed[4];
- TPM_NONCE replay;
- UINT32 dataLen;
- UINT8 *data;
+ TPM_STRUCTURE_TAG tag;
+ UINT8 fixed[4];
+ TPM_NONCE replay;
+ UINT32 dataLen;
+ UINT8 *data;
} TPM_SIGN_INFO;
///
@@ -669,163 +661,163 @@ typedef struct tdTPM_SIGN_INFO {
/// Number of migAuthDigest indicated by MSAlist
///
typedef struct tdTPM_MSA_COMPOSITE {
- UINT32 MSAlist;
- TPM_DIGEST migAuthDigest[1];
+ UINT32 MSAlist;
+ TPM_DIGEST migAuthDigest[1];
} TPM_MSA_COMPOSITE;
///
/// Part 2, section 5.16: TPM_CMK_AUTH
///
-typedef struct tdTPM_CMK_AUTH{
- TPM_DIGEST migrationAuthorityDigest;
- TPM_DIGEST destinationKeyDigest;
- TPM_DIGEST sourceKeyDigest;
+typedef struct tdTPM_CMK_AUTH {
+ TPM_DIGEST migrationAuthorityDigest;
+ TPM_DIGEST destinationKeyDigest;
+ TPM_DIGEST sourceKeyDigest;
} TPM_CMK_AUTH;
//
// Part 2, section 5.17: TPM_CMK_DELEGATE
//
-#define TPM_CMK_DELEGATE_SIGNING ((TPM_CMK_DELEGATE) BIT31)
-#define TPM_CMK_DELEGATE_STORAGE ((TPM_CMK_DELEGATE) BIT30)
-#define TPM_CMK_DELEGATE_BIND ((TPM_CMK_DELEGATE) BIT29)
-#define TPM_CMK_DELEGATE_LEGACY ((TPM_CMK_DELEGATE) BIT28)
-#define TPM_CMK_DELEGATE_MIGRATE ((TPM_CMK_DELEGATE) BIT27)
+#define TPM_CMK_DELEGATE_SIGNING ((TPM_CMK_DELEGATE) BIT31)
+#define TPM_CMK_DELEGATE_STORAGE ((TPM_CMK_DELEGATE) BIT30)
+#define TPM_CMK_DELEGATE_BIND ((TPM_CMK_DELEGATE) BIT29)
+#define TPM_CMK_DELEGATE_LEGACY ((TPM_CMK_DELEGATE) BIT28)
+#define TPM_CMK_DELEGATE_MIGRATE ((TPM_CMK_DELEGATE) BIT27)
///
/// Part 2, section 5.18: TPM_SELECT_SIZE
///
typedef struct tdTPM_SELECT_SIZE {
- UINT8 major;
- UINT8 minor;
- UINT16 reqSize;
+ UINT8 major;
+ UINT8 minor;
+ UINT16 reqSize;
} TPM_SELECT_SIZE;
///
/// Part 2, section 5,19: TPM_CMK_MIGAUTH
///
-typedef struct tdTPM_CMK_MIGAUTH{
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST msaDigest;
- TPM_DIGEST pubKeyDigest;
+typedef struct tdTPM_CMK_MIGAUTH {
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST msaDigest;
+ TPM_DIGEST pubKeyDigest;
} TPM_CMK_MIGAUTH;
///
/// Part 2, section 5.20: TPM_CMK_SIGTICKET
///
-typedef struct tdTPM_CMK_SIGTICKET{
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST verKeyDigest;
- TPM_DIGEST signedData;
+typedef struct tdTPM_CMK_SIGTICKET {
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST verKeyDigest;
+ TPM_DIGEST signedData;
} TPM_CMK_SIGTICKET;
///
/// Part 2, section 5.21: TPM_CMK_MA_APPROVAL
///
-typedef struct tdTPM_CMK_MA_APPROVAL{
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST migrationAuthorityDigest;
+typedef struct tdTPM_CMK_MA_APPROVAL {
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST migrationAuthorityDigest;
} TPM_CMK_MA_APPROVAL;
//
// Part 2, section 6: Command Tags
//
-#define TPM_TAG_RQU_COMMAND ((TPM_STRUCTURE_TAG) 0x00C1)
-#define TPM_TAG_RQU_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C2)
-#define TPM_TAG_RQU_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C3)
-#define TPM_TAG_RSP_COMMAND ((TPM_STRUCTURE_TAG) 0x00C4)
-#define TPM_TAG_RSP_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C5)
-#define TPM_TAG_RSP_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C6)
+#define TPM_TAG_RQU_COMMAND ((TPM_STRUCTURE_TAG) 0x00C1)
+#define TPM_TAG_RQU_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C2)
+#define TPM_TAG_RQU_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C3)
+#define TPM_TAG_RSP_COMMAND ((TPM_STRUCTURE_TAG) 0x00C4)
+#define TPM_TAG_RSP_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C5)
+#define TPM_TAG_RSP_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C6)
///
/// Part 2, section 7.1: TPM_PERMANENT_FLAGS
///
-typedef struct tdTPM_PERMANENT_FLAGS{
- TPM_STRUCTURE_TAG tag;
- BOOLEAN disable;
- BOOLEAN ownership;
- BOOLEAN deactivated;
- BOOLEAN readPubek;
- BOOLEAN disableOwnerClear;
- BOOLEAN allowMaintenance;
- BOOLEAN physicalPresenceLifetimeLock;
- BOOLEAN physicalPresenceHWEnable;
- BOOLEAN physicalPresenceCMDEnable;
- BOOLEAN CEKPUsed;
- BOOLEAN TPMpost;
- BOOLEAN TPMpostLock;
- BOOLEAN FIPS;
+typedef struct tdTPM_PERMANENT_FLAGS {
+ TPM_STRUCTURE_TAG tag;
+ BOOLEAN disable;
+ BOOLEAN ownership;
+ BOOLEAN deactivated;
+ BOOLEAN readPubek;
+ BOOLEAN disableOwnerClear;
+ BOOLEAN allowMaintenance;
+ BOOLEAN physicalPresenceLifetimeLock;
+ BOOLEAN physicalPresenceHWEnable;
+ BOOLEAN physicalPresenceCMDEnable;
+ BOOLEAN CEKPUsed;
+ BOOLEAN TPMpost;
+ BOOLEAN TPMpostLock;
+ BOOLEAN FIPS;
BOOLEAN operator;
BOOLEAN enableRevokeEK;
- BOOLEAN nvLocked;
- BOOLEAN readSRKPub;
- BOOLEAN tpmEstablished;
- BOOLEAN maintenanceDone;
- BOOLEAN disableFullDALogicInfo;
+ BOOLEAN nvLocked;
+ BOOLEAN readSRKPub;
+ BOOLEAN tpmEstablished;
+ BOOLEAN maintenanceDone;
+ BOOLEAN disableFullDALogicInfo;
} TPM_PERMANENT_FLAGS;
//
// Part 2, section 7.1.1: Flag Restrictions (of TPM_PERMANENT_FLAGS)
//
-#define TPM_PF_DISABLE ((TPM_CAPABILITY_AREA) 1)
-#define TPM_PF_OWNERSHIP ((TPM_CAPABILITY_AREA) 2)
-#define TPM_PF_DEACTIVATED ((TPM_CAPABILITY_AREA) 3)
-#define TPM_PF_READPUBEK ((TPM_CAPABILITY_AREA) 4)
-#define TPM_PF_DISABLEOWNERCLEAR ((TPM_CAPABILITY_AREA) 5)
-#define TPM_PF_ALLOWMAINTENANCE ((TPM_CAPABILITY_AREA) 6)
-#define TPM_PF_PHYSICALPRESENCELIFETIMELOCK ((TPM_CAPABILITY_AREA) 7)
-#define TPM_PF_PHYSICALPRESENCEHWENABLE ((TPM_CAPABILITY_AREA) 8)
-#define TPM_PF_PHYSICALPRESENCECMDENABLE ((TPM_CAPABILITY_AREA) 9)
-#define TPM_PF_CEKPUSED ((TPM_CAPABILITY_AREA) 10)
-#define TPM_PF_TPMPOST ((TPM_CAPABILITY_AREA) 11)
-#define TPM_PF_TPMPOSTLOCK ((TPM_CAPABILITY_AREA) 12)
-#define TPM_PF_FIPS ((TPM_CAPABILITY_AREA) 13)
-#define TPM_PF_OPERATOR ((TPM_CAPABILITY_AREA) 14)
-#define TPM_PF_ENABLEREVOKEEK ((TPM_CAPABILITY_AREA) 15)
-#define TPM_PF_NV_LOCKED ((TPM_CAPABILITY_AREA) 16)
-#define TPM_PF_READSRKPUB ((TPM_CAPABILITY_AREA) 17)
-#define TPM_PF_TPMESTABLISHED ((TPM_CAPABILITY_AREA) 18)
-#define TPM_PF_MAINTENANCEDONE ((TPM_CAPABILITY_AREA) 19)
-#define TPM_PF_DISABLEFULLDALOGICINFO ((TPM_CAPABILITY_AREA) 20)
+#define TPM_PF_DISABLE ((TPM_CAPABILITY_AREA) 1)
+#define TPM_PF_OWNERSHIP ((TPM_CAPABILITY_AREA) 2)
+#define TPM_PF_DEACTIVATED ((TPM_CAPABILITY_AREA) 3)
+#define TPM_PF_READPUBEK ((TPM_CAPABILITY_AREA) 4)
+#define TPM_PF_DISABLEOWNERCLEAR ((TPM_CAPABILITY_AREA) 5)
+#define TPM_PF_ALLOWMAINTENANCE ((TPM_CAPABILITY_AREA) 6)
+#define TPM_PF_PHYSICALPRESENCELIFETIMELOCK ((TPM_CAPABILITY_AREA) 7)
+#define TPM_PF_PHYSICALPRESENCEHWENABLE ((TPM_CAPABILITY_AREA) 8)
+#define TPM_PF_PHYSICALPRESENCECMDENABLE ((TPM_CAPABILITY_AREA) 9)
+#define TPM_PF_CEKPUSED ((TPM_CAPABILITY_AREA) 10)
+#define TPM_PF_TPMPOST ((TPM_CAPABILITY_AREA) 11)
+#define TPM_PF_TPMPOSTLOCK ((TPM_CAPABILITY_AREA) 12)
+#define TPM_PF_FIPS ((TPM_CAPABILITY_AREA) 13)
+#define TPM_PF_OPERATOR ((TPM_CAPABILITY_AREA) 14)
+#define TPM_PF_ENABLEREVOKEEK ((TPM_CAPABILITY_AREA) 15)
+#define TPM_PF_NV_LOCKED ((TPM_CAPABILITY_AREA) 16)
+#define TPM_PF_READSRKPUB ((TPM_CAPABILITY_AREA) 17)
+#define TPM_PF_TPMESTABLISHED ((TPM_CAPABILITY_AREA) 18)
+#define TPM_PF_MAINTENANCEDONE ((TPM_CAPABILITY_AREA) 19)
+#define TPM_PF_DISABLEFULLDALOGICINFO ((TPM_CAPABILITY_AREA) 20)
///
/// Part 2, section 7.2: TPM_STCLEAR_FLAGS
///
-typedef struct tdTPM_STCLEAR_FLAGS{
- TPM_STRUCTURE_TAG tag;
- BOOLEAN deactivated;
- BOOLEAN disableForceClear;
- BOOLEAN physicalPresence;
- BOOLEAN physicalPresenceLock;
- BOOLEAN bGlobalLock;
+typedef struct tdTPM_STCLEAR_FLAGS {
+ TPM_STRUCTURE_TAG tag;
+ BOOLEAN deactivated;
+ BOOLEAN disableForceClear;
+ BOOLEAN physicalPresence;
+ BOOLEAN physicalPresenceLock;
+ BOOLEAN bGlobalLock;
} TPM_STCLEAR_FLAGS;
//
// Part 2, section 7.2.1: Flag Restrictions (of TPM_STCLEAR_FLAGS)
//
-#define TPM_SF_DEACTIVATED ((TPM_CAPABILITY_AREA) 1)
-#define TPM_SF_DISABLEFORCECLEAR ((TPM_CAPABILITY_AREA) 2)
-#define TPM_SF_PHYSICALPRESENCE ((TPM_CAPABILITY_AREA) 3)
-#define TPM_SF_PHYSICALPRESENCELOCK ((TPM_CAPABILITY_AREA) 4)
-#define TPM_SF_BGLOBALLOCK ((TPM_CAPABILITY_AREA) 5)
+#define TPM_SF_DEACTIVATED ((TPM_CAPABILITY_AREA) 1)
+#define TPM_SF_DISABLEFORCECLEAR ((TPM_CAPABILITY_AREA) 2)
+#define TPM_SF_PHYSICALPRESENCE ((TPM_CAPABILITY_AREA) 3)
+#define TPM_SF_PHYSICALPRESENCELOCK ((TPM_CAPABILITY_AREA) 4)
+#define TPM_SF_BGLOBALLOCK ((TPM_CAPABILITY_AREA) 5)
///
/// Part 2, section 7.3: TPM_STANY_FLAGS
///
-typedef struct tdTPM_STANY_FLAGS{
- TPM_STRUCTURE_TAG tag;
- BOOLEAN postInitialise;
- TPM_MODIFIER_INDICATOR localityModifier;
- BOOLEAN transportExclusive;
- BOOLEAN TOSPresent;
+typedef struct tdTPM_STANY_FLAGS {
+ TPM_STRUCTURE_TAG tag;
+ BOOLEAN postInitialise;
+ TPM_MODIFIER_INDICATOR localityModifier;
+ BOOLEAN transportExclusive;
+ BOOLEAN TOSPresent;
} TPM_STANY_FLAGS;
//
// Part 2, section 7.3.1: Flag Restrictions (of TPM_STANY_FLAGS)
//
-#define TPM_AF_POSTINITIALISE ((TPM_CAPABILITY_AREA) 1)
-#define TPM_AF_LOCALITYMODIFIER ((TPM_CAPABILITY_AREA) 2)
-#define TPM_AF_TRANSPORTEXCLUSIVE ((TPM_CAPABILITY_AREA) 3)
-#define TPM_AF_TOSPRESENT ((TPM_CAPABILITY_AREA) 4)
+#define TPM_AF_POSTINITIALISE ((TPM_CAPABILITY_AREA) 1)
+#define TPM_AF_LOCALITYMODIFIER ((TPM_CAPABILITY_AREA) 2)
+#define TPM_AF_TRANSPORTEXCLUSIVE ((TPM_CAPABILITY_AREA) 3)
+#define TPM_AF_TOSPRESENT ((TPM_CAPABILITY_AREA) 4)
//
// All those structures defined in section 7.4, 7.5, 7.6 are not normative and
@@ -833,10 +825,10 @@ typedef struct tdTPM_STANY_FLAGS{
//
// Part 2, section 7.4: TPM_PERMANENT_DATA
//
-#define TPM_MIN_COUNTERS 4 ///< the minimum number of counters is 4
-#define TPM_DELEGATE_KEY TPM_KEY
-#define TPM_NUM_PCR 16
-#define TPM_MAX_NV_WRITE_NOOWNER 64
+#define TPM_MIN_COUNTERS 4 ///< the minimum number of counters is 4
+#define TPM_DELEGATE_KEY TPM_KEY
+#define TPM_NUM_PCR 16
+#define TPM_MAX_NV_WRITE_NOOWNER 64
//
// Part 2, section 7.4.1: PERMANENT_DATA Subcap for SetCapability
@@ -871,35 +863,35 @@ typedef struct tdTPM_STANY_FLAGS{
/// Part 2, section 7.5: TPM_STCLEAR_DATA
/// available inside TPM only
///
- typedef struct tdTPM_STCLEAR_DATA{
- TPM_STRUCTURE_TAG tag;
- TPM_NONCE contextNonceKey;
- TPM_COUNT_ID countID;
- UINT32 ownerReference;
- BOOLEAN disableResetLock;
- TPM_PCRVALUE PCR[TPM_NUM_PCR];
- UINT32 deferredPhysicalPresence;
- }TPM_STCLEAR_DATA;
+typedef struct tdTPM_STCLEAR_DATA {
+ TPM_STRUCTURE_TAG tag;
+ TPM_NONCE contextNonceKey;
+ TPM_COUNT_ID countID;
+ UINT32 ownerReference;
+ BOOLEAN disableResetLock;
+ TPM_PCRVALUE PCR[TPM_NUM_PCR];
+ UINT32 deferredPhysicalPresence;
+} TPM_STCLEAR_DATA;
//
// Part 2, section 7.5.1: STCLEAR_DATA Subcap for SetCapability
//
-#define TPM_SD_CONTEXTNONCEKEY ((TPM_CAPABILITY_AREA)0x00000001)
-#define TPM_SD_COUNTID ((TPM_CAPABILITY_AREA)0x00000002)
-#define TPM_SD_OWNERREFERENCE ((TPM_CAPABILITY_AREA)0x00000003)
-#define TPM_SD_DISABLERESETLOCK ((TPM_CAPABILITY_AREA)0x00000004)
-#define TPM_SD_PCR ((TPM_CAPABILITY_AREA)0x00000005)
-#define TPM_SD_DEFERREDPHYSICALPRESENCE ((TPM_CAPABILITY_AREA)0x00000006)
+#define TPM_SD_CONTEXTNONCEKEY ((TPM_CAPABILITY_AREA)0x00000001)
+#define TPM_SD_COUNTID ((TPM_CAPABILITY_AREA)0x00000002)
+#define TPM_SD_OWNERREFERENCE ((TPM_CAPABILITY_AREA)0x00000003)
+#define TPM_SD_DISABLERESETLOCK ((TPM_CAPABILITY_AREA)0x00000004)
+#define TPM_SD_PCR ((TPM_CAPABILITY_AREA)0x00000005)
+#define TPM_SD_DEFERREDPHYSICALPRESENCE ((TPM_CAPABILITY_AREA)0x00000006)
//
// Part 2, section 7.6.1: STANY_DATA Subcap for SetCapability
//
-#define TPM_AD_CONTEXTNONCESESSION ((TPM_CAPABILITY_AREA) 1)
-#define TPM_AD_AUDITDIGEST ((TPM_CAPABILITY_AREA) 2)
-#define TPM_AD_CURRENTTICKS ((TPM_CAPABILITY_AREA) 3)
-#define TPM_AD_CONTEXTCOUNT ((TPM_CAPABILITY_AREA) 4)
-#define TPM_AD_CONTEXTLIST ((TPM_CAPABILITY_AREA) 5)
-#define TPM_AD_SESSIONS ((TPM_CAPABILITY_AREA) 6)
+#define TPM_AD_CONTEXTNONCESESSION ((TPM_CAPABILITY_AREA) 1)
+#define TPM_AD_AUDITDIGEST ((TPM_CAPABILITY_AREA) 2)
+#define TPM_AD_CURRENTTICKS ((TPM_CAPABILITY_AREA) 3)
+#define TPM_AD_CONTEXTCOUNT ((TPM_CAPABILITY_AREA) 4)
+#define TPM_AD_CONTEXTLIST ((TPM_CAPABILITY_AREA) 5)
+#define TPM_AD_SESSIONS ((TPM_CAPABILITY_AREA) 6)
//
// Part 2, section 8: PCR Structures
@@ -910,8 +902,8 @@ typedef struct tdTPM_STANY_FLAGS{
/// Size of pcrSelect[] indicated by sizeOfSelect
///
typedef struct tdTPM_PCR_SELECTION {
- UINT16 sizeOfSelect;
- UINT8 pcrSelect[1];
+ UINT16 sizeOfSelect;
+ UINT8 pcrSelect[1];
} TPM_PCR_SELECTION;
///
@@ -919,60 +911,60 @@ typedef struct tdTPM_PCR_SELECTION {
/// Size of pcrValue[] indicated by valueSize
///
typedef struct tdTPM_PCR_COMPOSITE {
- TPM_PCR_SELECTION select;
- UINT32 valueSize;
- TPM_PCRVALUE pcrValue[1];
+ TPM_PCR_SELECTION select;
+ UINT32 valueSize;
+ TPM_PCRVALUE pcrValue[1];
} TPM_PCR_COMPOSITE;
///
/// Part 2, section 8.3: TPM_PCR_INFO
///
typedef struct tdTPM_PCR_INFO {
- TPM_PCR_SELECTION pcrSelection;
- TPM_COMPOSITE_HASH digestAtRelease;
- TPM_COMPOSITE_HASH digestAtCreation;
+ TPM_PCR_SELECTION pcrSelection;
+ TPM_COMPOSITE_HASH digestAtRelease;
+ TPM_COMPOSITE_HASH digestAtCreation;
} TPM_PCR_INFO;
///
/// Part 2, section 8.6: TPM_LOCALITY_SELECTION
///
-typedef UINT8 TPM_LOCALITY_SELECTION;
+typedef UINT8 TPM_LOCALITY_SELECTION;
-#define TPM_LOC_FOUR ((UINT8) 0x10)
-#define TPM_LOC_THREE ((UINT8) 0x08)
-#define TPM_LOC_TWO ((UINT8) 0x04)
-#define TPM_LOC_ONE ((UINT8) 0x02)
-#define TPM_LOC_ZERO ((UINT8) 0x01)
+#define TPM_LOC_FOUR ((UINT8) 0x10)
+#define TPM_LOC_THREE ((UINT8) 0x08)
+#define TPM_LOC_TWO ((UINT8) 0x04)
+#define TPM_LOC_ONE ((UINT8) 0x02)
+#define TPM_LOC_ZERO ((UINT8) 0x01)
///
/// Part 2, section 8.4: TPM_PCR_INFO_LONG
///
typedef struct tdTPM_PCR_INFO_LONG {
- TPM_STRUCTURE_TAG tag;
- TPM_LOCALITY_SELECTION localityAtCreation;
- TPM_LOCALITY_SELECTION localityAtRelease;
- TPM_PCR_SELECTION creationPCRSelection;
- TPM_PCR_SELECTION releasePCRSelection;
- TPM_COMPOSITE_HASH digestAtCreation;
- TPM_COMPOSITE_HASH digestAtRelease;
+ TPM_STRUCTURE_TAG tag;
+ TPM_LOCALITY_SELECTION localityAtCreation;
+ TPM_LOCALITY_SELECTION localityAtRelease;
+ TPM_PCR_SELECTION creationPCRSelection;
+ TPM_PCR_SELECTION releasePCRSelection;
+ TPM_COMPOSITE_HASH digestAtCreation;
+ TPM_COMPOSITE_HASH digestAtRelease;
} TPM_PCR_INFO_LONG;
///
/// Part 2, section 8.5: TPM_PCR_INFO_SHORT
///
-typedef struct tdTPM_PCR_INFO_SHORT{
- TPM_PCR_SELECTION pcrSelection;
- TPM_LOCALITY_SELECTION localityAtRelease;
- TPM_COMPOSITE_HASH digestAtRelease;
+typedef struct tdTPM_PCR_INFO_SHORT {
+ TPM_PCR_SELECTION pcrSelection;
+ TPM_LOCALITY_SELECTION localityAtRelease;
+ TPM_COMPOSITE_HASH digestAtRelease;
} TPM_PCR_INFO_SHORT;
///
/// Part 2, section 8.8: TPM_PCR_ATTRIBUTES
///
-typedef struct tdTPM_PCR_ATTRIBUTES{
- BOOLEAN pcrReset;
- TPM_LOCALITY_SELECTION pcrExtendLocal;
- TPM_LOCALITY_SELECTION pcrResetLocal;
+typedef struct tdTPM_PCR_ATTRIBUTES {
+ BOOLEAN pcrReset;
+ TPM_LOCALITY_SELECTION pcrExtendLocal;
+ TPM_LOCALITY_SELECTION pcrResetLocal;
} TPM_PCR_ATTRIBUTES;
//
@@ -985,11 +977,11 @@ typedef struct tdTPM_PCR_ATTRIBUTES{
/// [size_is(encDataSize)] BYTE* encData;
///
typedef struct tdTPM_STORED_DATA {
- TPM_STRUCT_VER ver;
- UINT32 sealInfoSize;
- UINT8 *sealInfo;
- UINT32 encDataSize;
- UINT8 *encData;
+ TPM_STRUCT_VER ver;
+ UINT32 sealInfoSize;
+ UINT8 *sealInfo;
+ UINT32 encDataSize;
+ UINT8 *encData;
} TPM_STORED_DATA;
///
@@ -998,12 +990,12 @@ typedef struct tdTPM_STORED_DATA {
/// [size_is(encDataSize)] BYTE* encData;
///
typedef struct tdTPM_STORED_DATA12 {
- TPM_STRUCTURE_TAG tag;
- TPM_ENTITY_TYPE et;
- UINT32 sealInfoSize;
- UINT8 *sealInfo;
- UINT32 encDataSize;
- UINT8 *encData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_ENTITY_TYPE et;
+ UINT32 sealInfoSize;
+ UINT8 *sealInfo;
+ UINT32 encDataSize;
+ UINT8 *encData;
} TPM_STORED_DATA12;
///
@@ -1011,12 +1003,12 @@ typedef struct tdTPM_STORED_DATA12 {
/// [size_is(dataSize)] BYTE* data;
///
typedef struct tdTPM_SEALED_DATA {
- TPM_PAYLOAD_TYPE payload;
- TPM_SECRET authData;
- TPM_NONCE tpmProof;
- TPM_DIGEST storedDigest;
- UINT32 dataSize;
- UINT8 *data;
+ TPM_PAYLOAD_TYPE payload;
+ TPM_SECRET authData;
+ TPM_NONCE tpmProof;
+ TPM_DIGEST storedDigest;
+ UINT32 dataSize;
+ UINT8 *data;
} TPM_SEALED_DATA;
///
@@ -1024,19 +1016,19 @@ typedef struct tdTPM_SEALED_DATA {
/// [size_is(size)] BYTE* data;
///
typedef struct tdTPM_SYMMETRIC_KEY {
- TPM_ALGORITHM_ID algId;
- TPM_ENC_SCHEME encScheme;
- UINT16 dataSize;
- UINT8 *data;
+ TPM_ALGORITHM_ID algId;
+ TPM_ENC_SCHEME encScheme;
+ UINT16 dataSize;
+ UINT8 *data;
} TPM_SYMMETRIC_KEY;
///
/// Part 2, section 9.5: TPM_BOUND_DATA
///
typedef struct tdTPM_BOUND_DATA {
- TPM_STRUCT_VER ver;
- TPM_PAYLOAD_TYPE payload;
- UINT8 payloadData[1];
+ TPM_STRUCT_VER ver;
+ TPM_PAYLOAD_TYPE payload;
+ UINT8 payloadData[1];
} TPM_BOUND_DATA;
//
@@ -1051,35 +1043,35 @@ typedef struct tdTPM_BOUND_DATA {
/// Part 2, section 10.2: TPM_KEY
/// [size_is(encDataSize)] BYTE* encData;
///
-typedef struct tdTPM_KEY{
- TPM_STRUCT_VER ver;
- TPM_KEY_USAGE keyUsage;
- TPM_KEY_FLAGS keyFlags;
- TPM_AUTH_DATA_USAGE authDataUsage;
- TPM_KEY_PARMS algorithmParms;
- UINT32 PCRInfoSize;
- UINT8 *PCRInfo;
- TPM_STORE_PUBKEY pubKey;
- UINT32 encDataSize;
- UINT8 *encData;
+typedef struct tdTPM_KEY {
+ TPM_STRUCT_VER ver;
+ TPM_KEY_USAGE keyUsage;
+ TPM_KEY_FLAGS keyFlags;
+ TPM_AUTH_DATA_USAGE authDataUsage;
+ TPM_KEY_PARMS algorithmParms;
+ UINT32 PCRInfoSize;
+ UINT8 *PCRInfo;
+ TPM_STORE_PUBKEY pubKey;
+ UINT32 encDataSize;
+ UINT8 *encData;
} TPM_KEY;
///
/// Part 2, section 10.3: TPM_KEY12
/// [size_is(encDataSize)] BYTE* encData;
///
-typedef struct tdTPM_KEY12{
- TPM_STRUCTURE_TAG tag;
- UINT16 fill;
- TPM_KEY_USAGE keyUsage;
- TPM_KEY_FLAGS keyFlags;
- TPM_AUTH_DATA_USAGE authDataUsage;
- TPM_KEY_PARMS algorithmParms;
- UINT32 PCRInfoSize;
- UINT8 *PCRInfo;
- TPM_STORE_PUBKEY pubKey;
- UINT32 encDataSize;
- UINT8 *encData;
+typedef struct tdTPM_KEY12 {
+ TPM_STRUCTURE_TAG tag;
+ UINT16 fill;
+ TPM_KEY_USAGE keyUsage;
+ TPM_KEY_FLAGS keyFlags;
+ TPM_AUTH_DATA_USAGE authDataUsage;
+ TPM_KEY_PARMS algorithmParms;
+ UINT32 PCRInfoSize;
+ UINT8 *PCRInfo;
+ TPM_STORE_PUBKEY pubKey;
+ UINT32 encDataSize;
+ UINT8 *encData;
} TPM_KEY12;
///
@@ -1087,37 +1079,39 @@ typedef struct tdTPM_KEY12{
/// [size_is(keyLength)] BYTE* key;
///
typedef struct tdTPM_STORE_PRIVKEY {
- UINT32 keyLength;
- UINT8 *key;
+ UINT32 keyLength;
+ UINT8 *key;
} TPM_STORE_PRIVKEY;
///
/// Part 2, section 10.6: TPM_STORE_ASYMKEY
///
-typedef struct tdTPM_STORE_ASYMKEY { // pos len total
- TPM_PAYLOAD_TYPE payload; // 0 1 1
- TPM_SECRET usageAuth; // 1 20 21
- TPM_SECRET migrationAuth; // 21 20 41
- TPM_DIGEST pubDataDigest; // 41 20 61
- TPM_STORE_PRIVKEY privKey; // 61 132-151 193-214
+typedef struct tdTPM_STORE_ASYMKEY {
+ // pos len total
+ TPM_PAYLOAD_TYPE payload; // 0 1 1
+ TPM_SECRET usageAuth; // 1 20 21
+ TPM_SECRET migrationAuth; // 21 20 41
+ TPM_DIGEST pubDataDigest; // 41 20 61
+ TPM_STORE_PRIVKEY privKey; // 61 132-151 193-214
} TPM_STORE_ASYMKEY;
///
/// Part 2, section 10.8: TPM_MIGRATE_ASYMKEY
/// [size_is(partPrivKeyLen)] BYTE* partPrivKey;
///
-typedef struct tdTPM_MIGRATE_ASYMKEY { // pos len total
- TPM_PAYLOAD_TYPE payload; // 0 1 1
- TPM_SECRET usageAuth; // 1 20 21
- TPM_DIGEST pubDataDigest; // 21 20 41
- UINT32 partPrivKeyLen; // 41 4 45
- UINT8 *partPrivKey; // 45 112-127 157-172
+typedef struct tdTPM_MIGRATE_ASYMKEY {
+ // pos len total
+ TPM_PAYLOAD_TYPE payload; // 0 1 1
+ TPM_SECRET usageAuth; // 1 20 21
+ TPM_DIGEST pubDataDigest; // 21 20 41
+ UINT32 partPrivKeyLen; // 41 4 45
+ UINT8 *partPrivKey; // 45 112-127 157-172
} TPM_MIGRATE_ASYMKEY;
///
/// Part 2, section 10.9: TPM_KEY_CONTROL
///
-#define TPM_KEY_CONTROL_OWNER_EVICT ((UINT32) 0x00000001)
+#define TPM_KEY_CONTROL_OWNER_EVICT ((UINT32) 0x00000001)
//
// Part 2, section 11: Signed Structures
@@ -1127,56 +1121,56 @@ typedef struct tdTPM_MIGRATE_ASYMKEY { // pos len total
/// Part 2, section 11.1: TPM_CERTIFY_INFO Structure
///
typedef struct tdTPM_CERTIFY_INFO {
- TPM_STRUCT_VER version;
- TPM_KEY_USAGE keyUsage;
- TPM_KEY_FLAGS keyFlags;
- TPM_AUTH_DATA_USAGE authDataUsage;
- TPM_KEY_PARMS algorithmParms;
- TPM_DIGEST pubkeyDigest;
- TPM_NONCE data;
- BOOLEAN parentPCRStatus;
- UINT32 PCRInfoSize;
- UINT8 *PCRInfo;
+ TPM_STRUCT_VER version;
+ TPM_KEY_USAGE keyUsage;
+ TPM_KEY_FLAGS keyFlags;
+ TPM_AUTH_DATA_USAGE authDataUsage;
+ TPM_KEY_PARMS algorithmParms;
+ TPM_DIGEST pubkeyDigest;
+ TPM_NONCE data;
+ BOOLEAN parentPCRStatus;
+ UINT32 PCRInfoSize;
+ UINT8 *PCRInfo;
} TPM_CERTIFY_INFO;
///
/// Part 2, section 11.2: TPM_CERTIFY_INFO2 Structure
///
typedef struct tdTPM_CERTIFY_INFO2 {
- TPM_STRUCTURE_TAG tag;
- UINT8 fill;
- TPM_PAYLOAD_TYPE payloadType;
- TPM_KEY_USAGE keyUsage;
- TPM_KEY_FLAGS keyFlags;
- TPM_AUTH_DATA_USAGE authDataUsage;
- TPM_KEY_PARMS algorithmParms;
- TPM_DIGEST pubkeyDigest;
- TPM_NONCE data;
- BOOLEAN parentPCRStatus;
- UINT32 PCRInfoSize;
- UINT8 *PCRInfo;
- UINT32 migrationAuthoritySize;
- UINT8 *migrationAuthority;
+ TPM_STRUCTURE_TAG tag;
+ UINT8 fill;
+ TPM_PAYLOAD_TYPE payloadType;
+ TPM_KEY_USAGE keyUsage;
+ TPM_KEY_FLAGS keyFlags;
+ TPM_AUTH_DATA_USAGE authDataUsage;
+ TPM_KEY_PARMS algorithmParms;
+ TPM_DIGEST pubkeyDigest;
+ TPM_NONCE data;
+ BOOLEAN parentPCRStatus;
+ UINT32 PCRInfoSize;
+ UINT8 *PCRInfo;
+ UINT32 migrationAuthoritySize;
+ UINT8 *migrationAuthority;
} TPM_CERTIFY_INFO2;
///
/// Part 2, section 11.3 TPM_QUOTE_INFO Structure
///
typedef struct tdTPM_QUOTE_INFO {
- TPM_STRUCT_VER version;
- UINT8 fixed[4];
- TPM_COMPOSITE_HASH digestValue;
- TPM_NONCE externalData;
+ TPM_STRUCT_VER version;
+ UINT8 fixed[4];
+ TPM_COMPOSITE_HASH digestValue;
+ TPM_NONCE externalData;
} TPM_QUOTE_INFO;
///
/// Part 2, section 11.4 TPM_QUOTE_INFO2 Structure
///
typedef struct tdTPM_QUOTE_INFO2 {
- TPM_STRUCTURE_TAG tag;
- UINT8 fixed[4];
- TPM_NONCE externalData;
- TPM_PCR_INFO_SHORT infoShort;
+ TPM_STRUCTURE_TAG tag;
+ UINT8 fixed[4];
+ TPM_NONCE externalData;
+ TPM_PCR_INFO_SHORT infoShort;
} TPM_QUOTE_INFO2;
//
@@ -1187,86 +1181,85 @@ typedef struct tdTPM_QUOTE_INFO2 {
/// Part 2, section 12.1 TPM_EK_BLOB
///
typedef struct tdTPM_EK_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_EK_TYPE ekType;
- UINT32 blobSize;
- UINT8 *blob;
+ TPM_STRUCTURE_TAG tag;
+ TPM_EK_TYPE ekType;
+ UINT32 blobSize;
+ UINT8 *blob;
} TPM_EK_BLOB;
///
/// Part 2, section 12.2 TPM_EK_BLOB_ACTIVATE
///
typedef struct tdTPM_EK_BLOB_ACTIVATE {
- TPM_STRUCTURE_TAG tag;
- TPM_SYMMETRIC_KEY sessionKey;
- TPM_DIGEST idDigest;
- TPM_PCR_INFO_SHORT pcrInfo;
+ TPM_STRUCTURE_TAG tag;
+ TPM_SYMMETRIC_KEY sessionKey;
+ TPM_DIGEST idDigest;
+ TPM_PCR_INFO_SHORT pcrInfo;
} TPM_EK_BLOB_ACTIVATE;
///
/// Part 2, section 12.3 TPM_EK_BLOB_AUTH
///
typedef struct tdTPM_EK_BLOB_AUTH {
- TPM_STRUCTURE_TAG tag;
- TPM_SECRET authValue;
+ TPM_STRUCTURE_TAG tag;
+ TPM_SECRET authValue;
} TPM_EK_BLOB_AUTH;
-
///
/// Part 2, section 12.5 TPM_IDENTITY_CONTENTS
///
typedef struct tdTPM_IDENTITY_CONTENTS {
- TPM_STRUCT_VER ver;
- UINT32 ordinal;
- TPM_CHOSENID_HASH labelPrivCADigest;
- TPM_PUBKEY identityPubKey;
+ TPM_STRUCT_VER ver;
+ UINT32 ordinal;
+ TPM_CHOSENID_HASH labelPrivCADigest;
+ TPM_PUBKEY identityPubKey;
} TPM_IDENTITY_CONTENTS;
///
/// Part 2, section 12.6 TPM_IDENTITY_REQ
///
typedef struct tdTPM_IDENTITY_REQ {
- UINT32 asymSize;
- UINT32 symSize;
- TPM_KEY_PARMS asymAlgorithm;
- TPM_KEY_PARMS symAlgorithm;
- UINT8 *asymBlob;
- UINT8 *symBlob;
+ UINT32 asymSize;
+ UINT32 symSize;
+ TPM_KEY_PARMS asymAlgorithm;
+ TPM_KEY_PARMS symAlgorithm;
+ UINT8 *asymBlob;
+ UINT8 *symBlob;
} TPM_IDENTITY_REQ;
///
/// Part 2, section 12.7 TPM_IDENTITY_PROOF
///
typedef struct tdTPM_IDENTITY_PROOF {
- TPM_STRUCT_VER ver;
- UINT32 labelSize;
- UINT32 identityBindingSize;
- UINT32 endorsementSize;
- UINT32 platformSize;
- UINT32 conformanceSize;
- TPM_PUBKEY identityKey;
- UINT8 *labelArea;
- UINT8 *identityBinding;
- UINT8 *endorsementCredential;
- UINT8 *platformCredential;
- UINT8 *conformanceCredential;
+ TPM_STRUCT_VER ver;
+ UINT32 labelSize;
+ UINT32 identityBindingSize;
+ UINT32 endorsementSize;
+ UINT32 platformSize;
+ UINT32 conformanceSize;
+ TPM_PUBKEY identityKey;
+ UINT8 *labelArea;
+ UINT8 *identityBinding;
+ UINT8 *endorsementCredential;
+ UINT8 *platformCredential;
+ UINT8 *conformanceCredential;
} TPM_IDENTITY_PROOF;
///
/// Part 2, section 12.8 TPM_ASYM_CA_CONTENTS
///
typedef struct tdTPM_ASYM_CA_CONTENTS {
- TPM_SYMMETRIC_KEY sessionKey;
- TPM_DIGEST idDigest;
+ TPM_SYMMETRIC_KEY sessionKey;
+ TPM_DIGEST idDigest;
} TPM_ASYM_CA_CONTENTS;
///
/// Part 2, section 12.9 TPM_SYM_CA_ATTESTATION
///
typedef struct tdTPM_SYM_CA_ATTESTATION {
- UINT32 credSize;
- TPM_KEY_PARMS algorithm;
- UINT8 *credential;
+ UINT32 credSize;
+ TPM_KEY_PARMS algorithm;
+ UINT8 *credential;
} TPM_SYM_CA_ATTESTATION;
///
@@ -1274,10 +1267,10 @@ typedef struct tdTPM_SYM_CA_ATTESTATION {
/// Placed here out of order because definitions are used in section 13.
///
typedef struct tdTPM_CURRENT_TICKS {
- TPM_STRUCTURE_TAG tag;
- UINT64 currentTicks;
- UINT16 tickRate;
- TPM_NONCE tickNonce;
+ TPM_STRUCTURE_TAG tag;
+ UINT64 currentTicks;
+ UINT16 tickRate;
+ TPM_NONCE tickNonce;
} TPM_CURRENT_TICKS;
///
@@ -1288,56 +1281,56 @@ typedef struct tdTPM_CURRENT_TICKS {
/// Part 2, section 13.1: TPM _TRANSPORT_PUBLIC
///
typedef struct tdTPM_TRANSPORT_PUBLIC {
- TPM_STRUCTURE_TAG tag;
- TPM_TRANSPORT_ATTRIBUTES transAttributes;
- TPM_ALGORITHM_ID algId;
- TPM_ENC_SCHEME encScheme;
+ TPM_STRUCTURE_TAG tag;
+ TPM_TRANSPORT_ATTRIBUTES transAttributes;
+ TPM_ALGORITHM_ID algId;
+ TPM_ENC_SCHEME encScheme;
} TPM_TRANSPORT_PUBLIC;
//
// Part 2, section 13.1.1 TPM_TRANSPORT_ATTRIBUTES Definitions
//
-#define TPM_TRANSPORT_ENCRYPT ((UINT32)BIT0)
-#define TPM_TRANSPORT_LOG ((UINT32)BIT1)
-#define TPM_TRANSPORT_EXCLUSIVE ((UINT32)BIT2)
+#define TPM_TRANSPORT_ENCRYPT ((UINT32)BIT0)
+#define TPM_TRANSPORT_LOG ((UINT32)BIT1)
+#define TPM_TRANSPORT_EXCLUSIVE ((UINT32)BIT2)
///
/// Part 2, section 13.2 TPM_TRANSPORT_INTERNAL
///
typedef struct tdTPM_TRANSPORT_INTERNAL {
- TPM_STRUCTURE_TAG tag;
- TPM_AUTHDATA authData;
- TPM_TRANSPORT_PUBLIC transPublic;
- TPM_TRANSHANDLE transHandle;
- TPM_NONCE transNonceEven;
- TPM_DIGEST transDigest;
+ TPM_STRUCTURE_TAG tag;
+ TPM_AUTHDATA authData;
+ TPM_TRANSPORT_PUBLIC transPublic;
+ TPM_TRANSHANDLE transHandle;
+ TPM_NONCE transNonceEven;
+ TPM_DIGEST transDigest;
} TPM_TRANSPORT_INTERNAL;
///
/// Part 2, section 13.3 TPM_TRANSPORT_LOG_IN structure
///
typedef struct tdTPM_TRANSPORT_LOG_IN {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST parameters;
- TPM_DIGEST pubKeyHash;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST parameters;
+ TPM_DIGEST pubKeyHash;
} TPM_TRANSPORT_LOG_IN;
///
/// Part 2, section 13.4 TPM_TRANSPORT_LOG_OUT structure
///
typedef struct tdTPM_TRANSPORT_LOG_OUT {
- TPM_STRUCTURE_TAG tag;
- TPM_CURRENT_TICKS currentTicks;
- TPM_DIGEST parameters;
- TPM_MODIFIER_INDICATOR locality;
+ TPM_STRUCTURE_TAG tag;
+ TPM_CURRENT_TICKS currentTicks;
+ TPM_DIGEST parameters;
+ TPM_MODIFIER_INDICATOR locality;
} TPM_TRANSPORT_LOG_OUT;
///
/// Part 2, section 13.5 TPM_TRANSPORT_AUTH structure
///
typedef struct tdTPM_TRANSPORT_AUTH {
- TPM_STRUCTURE_TAG tag;
- TPM_AUTHDATA authData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_AUTHDATA authData;
} TPM_TRANSPORT_AUTH;
//
@@ -1348,28 +1341,28 @@ typedef struct tdTPM_TRANSPORT_AUTH {
/// Part 2, section 14.1 TPM_AUDIT_EVENT_IN structure
///
typedef struct tdTPM_AUDIT_EVENT_IN {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST inputParms;
- TPM_COUNTER_VALUE auditCount;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST inputParms;
+ TPM_COUNTER_VALUE auditCount;
} TPM_AUDIT_EVENT_IN;
///
/// Part 2, section 14.2 TPM_AUDIT_EVENT_OUT structure
///
typedef struct tdTPM_AUDIT_EVENT_OUT {
- TPM_STRUCTURE_TAG tag;
- TPM_COMMAND_CODE ordinal;
- TPM_DIGEST outputParms;
- TPM_COUNTER_VALUE auditCount;
- TPM_RESULT returnCode;
+ TPM_STRUCTURE_TAG tag;
+ TPM_COMMAND_CODE ordinal;
+ TPM_DIGEST outputParms;
+ TPM_COUNTER_VALUE auditCount;
+ TPM_RESULT returnCode;
} TPM_AUDIT_EVENT_OUT;
//
// Part 2, section 16: Return Codes
//
-#define TPM_VENDOR_ERROR TPM_Vendor_Specific32
-#define TPM_NON_FATAL 0x00000800
+#define TPM_VENDOR_ERROR TPM_Vendor_Specific32
+#define TPM_NON_FATAL 0x00000800
#define TPM_SUCCESS ((TPM_RESULT) TPM_BASE)
#define TPM_AUTHFAIL ((TPM_RESULT) (TPM_BASE + 1))
@@ -1471,10 +1464,10 @@ typedef struct tdTPM_AUDIT_EVENT_OUT {
#define TPM_BAD_SIGNATURE ((TPM_RESULT) (TPM_BASE + 98))
#define TPM_NOCONTEXTSPACE ((TPM_RESULT) (TPM_BASE + 99))
-#define TPM_RETRY ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL))
-#define TPM_NEEDS_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 1))
-#define TPM_DOING_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 2))
-#define TPM_DEFEND_LOCK_RUNNING ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 3))
+#define TPM_RETRY ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL))
+#define TPM_NEEDS_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 1))
+#define TPM_DOING_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 2))
+#define TPM_DEFEND_LOCK_RUNNING ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 3))
//
// Part 2, section 17: Ordinals
@@ -1504,131 +1497,131 @@ typedef struct tdTPM_AUDIT_EVENT_OUT {
// * All reserved area bits are set to 0.
//
-#define TPM_ORD_ActivateIdentity ((TPM_COMMAND_CODE) 0x0000007A)
-#define TPM_ORD_AuthorizeMigrationKey ((TPM_COMMAND_CODE) 0x0000002B)
-#define TPM_ORD_CertifyKey ((TPM_COMMAND_CODE) 0x00000032)
-#define TPM_ORD_CertifyKey2 ((TPM_COMMAND_CODE) 0x00000033)
-#define TPM_ORD_CertifySelfTest ((TPM_COMMAND_CODE) 0x00000052)
-#define TPM_ORD_ChangeAuth ((TPM_COMMAND_CODE) 0x0000000C)
-#define TPM_ORD_ChangeAuthAsymFinish ((TPM_COMMAND_CODE) 0x0000000F)
-#define TPM_ORD_ChangeAuthAsymStart ((TPM_COMMAND_CODE) 0x0000000E)
-#define TPM_ORD_ChangeAuthOwner ((TPM_COMMAND_CODE) 0x00000010)
-#define TPM_ORD_CMK_ApproveMA ((TPM_COMMAND_CODE) 0x0000001D)
-#define TPM_ORD_CMK_ConvertMigration ((TPM_COMMAND_CODE) 0x00000024)
-#define TPM_ORD_CMK_CreateBlob ((TPM_COMMAND_CODE) 0x0000001B)
-#define TPM_ORD_CMK_CreateKey ((TPM_COMMAND_CODE) 0x00000013)
-#define TPM_ORD_CMK_CreateTicket ((TPM_COMMAND_CODE) 0x00000012)
-#define TPM_ORD_CMK_SetRestrictions ((TPM_COMMAND_CODE) 0x0000001C)
-#define TPM_ORD_ContinueSelfTest ((TPM_COMMAND_CODE) 0x00000053)
-#define TPM_ORD_ConvertMigrationBlob ((TPM_COMMAND_CODE) 0x0000002A)
-#define TPM_ORD_CreateCounter ((TPM_COMMAND_CODE) 0x000000DC)
-#define TPM_ORD_CreateEndorsementKeyPair ((TPM_COMMAND_CODE) 0x00000078)
-#define TPM_ORD_CreateMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002C)
-#define TPM_ORD_CreateMigrationBlob ((TPM_COMMAND_CODE) 0x00000028)
-#define TPM_ORD_CreateRevocableEK ((TPM_COMMAND_CODE) 0x0000007F)
-#define TPM_ORD_CreateWrapKey ((TPM_COMMAND_CODE) 0x0000001F)
-#define TPM_ORD_DAA_JOIN ((TPM_COMMAND_CODE) 0x00000029)
-#define TPM_ORD_DAA_SIGN ((TPM_COMMAND_CODE) 0x00000031)
-#define TPM_ORD_Delegate_CreateKeyDelegation ((TPM_COMMAND_CODE) 0x000000D4)
-#define TPM_ORD_Delegate_CreateOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D5)
-#define TPM_ORD_Delegate_LoadOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D8)
-#define TPM_ORD_Delegate_Manage ((TPM_COMMAND_CODE) 0x000000D2)
-#define TPM_ORD_Delegate_ReadTable ((TPM_COMMAND_CODE) 0x000000DB)
-#define TPM_ORD_Delegate_UpdateVerification ((TPM_COMMAND_CODE) 0x000000D1)
-#define TPM_ORD_Delegate_VerifyDelegation ((TPM_COMMAND_CODE) 0x000000D6)
-#define TPM_ORD_DirRead ((TPM_COMMAND_CODE) 0x0000001A)
-#define TPM_ORD_DirWriteAuth ((TPM_COMMAND_CODE) 0x00000019)
-#define TPM_ORD_DisableForceClear ((TPM_COMMAND_CODE) 0x0000005E)
-#define TPM_ORD_DisableOwnerClear ((TPM_COMMAND_CODE) 0x0000005C)
-#define TPM_ORD_DisablePubekRead ((TPM_COMMAND_CODE) 0x0000007E)
-#define TPM_ORD_DSAP ((TPM_COMMAND_CODE) 0x00000011)
-#define TPM_ORD_EstablishTransport ((TPM_COMMAND_CODE) 0x000000E6)
-#define TPM_ORD_EvictKey ((TPM_COMMAND_CODE) 0x00000022)
-#define TPM_ORD_ExecuteTransport ((TPM_COMMAND_CODE) 0x000000E7)
-#define TPM_ORD_Extend ((TPM_COMMAND_CODE) 0x00000014)
-#define TPM_ORD_FieldUpgrade ((TPM_COMMAND_CODE) 0x000000AA)
-#define TPM_ORD_FlushSpecific ((TPM_COMMAND_CODE) 0x000000BA)
-#define TPM_ORD_ForceClear ((TPM_COMMAND_CODE) 0x0000005D)
-#define TPM_ORD_GetAuditDigest ((TPM_COMMAND_CODE) 0x00000085)
-#define TPM_ORD_GetAuditDigestSigned ((TPM_COMMAND_CODE) 0x00000086)
-#define TPM_ORD_GetAuditEvent ((TPM_COMMAND_CODE) 0x00000082)
-#define TPM_ORD_GetAuditEventSigned ((TPM_COMMAND_CODE) 0x00000083)
-#define TPM_ORD_GetCapability ((TPM_COMMAND_CODE) 0x00000065)
-#define TPM_ORD_GetCapabilityOwner ((TPM_COMMAND_CODE) 0x00000066)
-#define TPM_ORD_GetCapabilitySigned ((TPM_COMMAND_CODE) 0x00000064)
-#define TPM_ORD_GetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008C)
-#define TPM_ORD_GetPubKey ((TPM_COMMAND_CODE) 0x00000021)
-#define TPM_ORD_GetRandom ((TPM_COMMAND_CODE) 0x00000046)
-#define TPM_ORD_GetTestResult ((TPM_COMMAND_CODE) 0x00000054)
-#define TPM_ORD_GetTicks ((TPM_COMMAND_CODE) 0x000000F1)
-#define TPM_ORD_IncrementCounter ((TPM_COMMAND_CODE) 0x000000DD)
-#define TPM_ORD_Init ((TPM_COMMAND_CODE) 0x00000097)
-#define TPM_ORD_KeyControlOwner ((TPM_COMMAND_CODE) 0x00000023)
-#define TPM_ORD_KillMaintenanceFeature ((TPM_COMMAND_CODE) 0x0000002E)
-#define TPM_ORD_LoadAuthContext ((TPM_COMMAND_CODE) 0x000000B7)
-#define TPM_ORD_LoadContext ((TPM_COMMAND_CODE) 0x000000B9)
-#define TPM_ORD_LoadKey ((TPM_COMMAND_CODE) 0x00000020)
-#define TPM_ORD_LoadKey2 ((TPM_COMMAND_CODE) 0x00000041)
-#define TPM_ORD_LoadKeyContext ((TPM_COMMAND_CODE) 0x000000B5)
-#define TPM_ORD_LoadMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002D)
-#define TPM_ORD_LoadManuMaintPub ((TPM_COMMAND_CODE) 0x0000002F)
-#define TPM_ORD_MakeIdentity ((TPM_COMMAND_CODE) 0x00000079)
-#define TPM_ORD_MigrateKey ((TPM_COMMAND_CODE) 0x00000025)
-#define TPM_ORD_NV_DefineSpace ((TPM_COMMAND_CODE) 0x000000CC)
-#define TPM_ORD_NV_ReadValue ((TPM_COMMAND_CODE) 0x000000CF)
-#define TPM_ORD_NV_ReadValueAuth ((TPM_COMMAND_CODE) 0x000000D0)
-#define TPM_ORD_NV_WriteValue ((TPM_COMMAND_CODE) 0x000000CD)
-#define TPM_ORD_NV_WriteValueAuth ((TPM_COMMAND_CODE) 0x000000CE)
-#define TPM_ORD_OIAP ((TPM_COMMAND_CODE) 0x0000000A)
-#define TPM_ORD_OSAP ((TPM_COMMAND_CODE) 0x0000000B)
-#define TPM_ORD_OwnerClear ((TPM_COMMAND_CODE) 0x0000005B)
-#define TPM_ORD_OwnerReadInternalPub ((TPM_COMMAND_CODE) 0x00000081)
-#define TPM_ORD_OwnerReadPubek ((TPM_COMMAND_CODE) 0x0000007D)
-#define TPM_ORD_OwnerSetDisable ((TPM_COMMAND_CODE) 0x0000006E)
-#define TPM_ORD_PCR_Reset ((TPM_COMMAND_CODE) 0x000000C8)
-#define TPM_ORD_PcrRead ((TPM_COMMAND_CODE) 0x00000015)
-#define TPM_ORD_PhysicalDisable ((TPM_COMMAND_CODE) 0x00000070)
-#define TPM_ORD_PhysicalEnable ((TPM_COMMAND_CODE) 0x0000006F)
-#define TPM_ORD_PhysicalSetDeactivated ((TPM_COMMAND_CODE) 0x00000072)
-#define TPM_ORD_Quote ((TPM_COMMAND_CODE) 0x00000016)
-#define TPM_ORD_Quote2 ((TPM_COMMAND_CODE) 0x0000003E)
-#define TPM_ORD_ReadCounter ((TPM_COMMAND_CODE) 0x000000DE)
-#define TPM_ORD_ReadManuMaintPub ((TPM_COMMAND_CODE) 0x00000030)
-#define TPM_ORD_ReadPubek ((TPM_COMMAND_CODE) 0x0000007C)
-#define TPM_ORD_ReleaseCounter ((TPM_COMMAND_CODE) 0x000000DF)
-#define TPM_ORD_ReleaseCounterOwner ((TPM_COMMAND_CODE) 0x000000E0)
-#define TPM_ORD_ReleaseTransportSigned ((TPM_COMMAND_CODE) 0x000000E8)
-#define TPM_ORD_Reset ((TPM_COMMAND_CODE) 0x0000005A)
-#define TPM_ORD_ResetLockValue ((TPM_COMMAND_CODE) 0x00000040)
-#define TPM_ORD_RevokeTrust ((TPM_COMMAND_CODE) 0x00000080)
-#define TPM_ORD_SaveAuthContext ((TPM_COMMAND_CODE) 0x000000B6)
-#define TPM_ORD_SaveContext ((TPM_COMMAND_CODE) 0x000000B8)
-#define TPM_ORD_SaveKeyContext ((TPM_COMMAND_CODE) 0x000000B4)
-#define TPM_ORD_SaveState ((TPM_COMMAND_CODE) 0x00000098)
-#define TPM_ORD_Seal ((TPM_COMMAND_CODE) 0x00000017)
-#define TPM_ORD_Sealx ((TPM_COMMAND_CODE) 0x0000003D)
-#define TPM_ORD_SelfTestFull ((TPM_COMMAND_CODE) 0x00000050)
-#define TPM_ORD_SetCapability ((TPM_COMMAND_CODE) 0x0000003F)
-#define TPM_ORD_SetOperatorAuth ((TPM_COMMAND_CODE) 0x00000074)
-#define TPM_ORD_SetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008D)
-#define TPM_ORD_SetOwnerInstall ((TPM_COMMAND_CODE) 0x00000071)
-#define TPM_ORD_SetOwnerPointer ((TPM_COMMAND_CODE) 0x00000075)
-#define TPM_ORD_SetRedirection ((TPM_COMMAND_CODE) 0x0000009A)
-#define TPM_ORD_SetTempDeactivated ((TPM_COMMAND_CODE) 0x00000073)
-#define TPM_ORD_SHA1Complete ((TPM_COMMAND_CODE) 0x000000A2)
-#define TPM_ORD_SHA1CompleteExtend ((TPM_COMMAND_CODE) 0x000000A3)
-#define TPM_ORD_SHA1Start ((TPM_COMMAND_CODE) 0x000000A0)
-#define TPM_ORD_SHA1Update ((TPM_COMMAND_CODE) 0x000000A1)
-#define TPM_ORD_Sign ((TPM_COMMAND_CODE) 0x0000003C)
-#define TPM_ORD_Startup ((TPM_COMMAND_CODE) 0x00000099)
-#define TPM_ORD_StirRandom ((TPM_COMMAND_CODE) 0x00000047)
-#define TPM_ORD_TakeOwnership ((TPM_COMMAND_CODE) 0x0000000D)
-#define TPM_ORD_Terminate_Handle ((TPM_COMMAND_CODE) 0x00000096)
-#define TPM_ORD_TickStampBlob ((TPM_COMMAND_CODE) 0x000000F2)
-#define TPM_ORD_UnBind ((TPM_COMMAND_CODE) 0x0000001E)
-#define TPM_ORD_Unseal ((TPM_COMMAND_CODE) 0x00000018)
-#define TSC_ORD_PhysicalPresence ((TPM_COMMAND_CODE) 0x4000000A)
-#define TSC_ORD_ResetEstablishmentBit ((TPM_COMMAND_CODE) 0x4000000B)
+#define TPM_ORD_ActivateIdentity ((TPM_COMMAND_CODE) 0x0000007A)
+#define TPM_ORD_AuthorizeMigrationKey ((TPM_COMMAND_CODE) 0x0000002B)
+#define TPM_ORD_CertifyKey ((TPM_COMMAND_CODE) 0x00000032)
+#define TPM_ORD_CertifyKey2 ((TPM_COMMAND_CODE) 0x00000033)
+#define TPM_ORD_CertifySelfTest ((TPM_COMMAND_CODE) 0x00000052)
+#define TPM_ORD_ChangeAuth ((TPM_COMMAND_CODE) 0x0000000C)
+#define TPM_ORD_ChangeAuthAsymFinish ((TPM_COMMAND_CODE) 0x0000000F)
+#define TPM_ORD_ChangeAuthAsymStart ((TPM_COMMAND_CODE) 0x0000000E)
+#define TPM_ORD_ChangeAuthOwner ((TPM_COMMAND_CODE) 0x00000010)
+#define TPM_ORD_CMK_ApproveMA ((TPM_COMMAND_CODE) 0x0000001D)
+#define TPM_ORD_CMK_ConvertMigration ((TPM_COMMAND_CODE) 0x00000024)
+#define TPM_ORD_CMK_CreateBlob ((TPM_COMMAND_CODE) 0x0000001B)
+#define TPM_ORD_CMK_CreateKey ((TPM_COMMAND_CODE) 0x00000013)
+#define TPM_ORD_CMK_CreateTicket ((TPM_COMMAND_CODE) 0x00000012)
+#define TPM_ORD_CMK_SetRestrictions ((TPM_COMMAND_CODE) 0x0000001C)
+#define TPM_ORD_ContinueSelfTest ((TPM_COMMAND_CODE) 0x00000053)
+#define TPM_ORD_ConvertMigrationBlob ((TPM_COMMAND_CODE) 0x0000002A)
+#define TPM_ORD_CreateCounter ((TPM_COMMAND_CODE) 0x000000DC)
+#define TPM_ORD_CreateEndorsementKeyPair ((TPM_COMMAND_CODE) 0x00000078)
+#define TPM_ORD_CreateMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002C)
+#define TPM_ORD_CreateMigrationBlob ((TPM_COMMAND_CODE) 0x00000028)
+#define TPM_ORD_CreateRevocableEK ((TPM_COMMAND_CODE) 0x0000007F)
+#define TPM_ORD_CreateWrapKey ((TPM_COMMAND_CODE) 0x0000001F)
+#define TPM_ORD_DAA_JOIN ((TPM_COMMAND_CODE) 0x00000029)
+#define TPM_ORD_DAA_SIGN ((TPM_COMMAND_CODE) 0x00000031)
+#define TPM_ORD_Delegate_CreateKeyDelegation ((TPM_COMMAND_CODE) 0x000000D4)
+#define TPM_ORD_Delegate_CreateOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D5)
+#define TPM_ORD_Delegate_LoadOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D8)
+#define TPM_ORD_Delegate_Manage ((TPM_COMMAND_CODE) 0x000000D2)
+#define TPM_ORD_Delegate_ReadTable ((TPM_COMMAND_CODE) 0x000000DB)
+#define TPM_ORD_Delegate_UpdateVerification ((TPM_COMMAND_CODE) 0x000000D1)
+#define TPM_ORD_Delegate_VerifyDelegation ((TPM_COMMAND_CODE) 0x000000D6)
+#define TPM_ORD_DirRead ((TPM_COMMAND_CODE) 0x0000001A)
+#define TPM_ORD_DirWriteAuth ((TPM_COMMAND_CODE) 0x00000019)
+#define TPM_ORD_DisableForceClear ((TPM_COMMAND_CODE) 0x0000005E)
+#define TPM_ORD_DisableOwnerClear ((TPM_COMMAND_CODE) 0x0000005C)
+#define TPM_ORD_DisablePubekRead ((TPM_COMMAND_CODE) 0x0000007E)
+#define TPM_ORD_DSAP ((TPM_COMMAND_CODE) 0x00000011)
+#define TPM_ORD_EstablishTransport ((TPM_COMMAND_CODE) 0x000000E6)
+#define TPM_ORD_EvictKey ((TPM_COMMAND_CODE) 0x00000022)
+#define TPM_ORD_ExecuteTransport ((TPM_COMMAND_CODE) 0x000000E7)
+#define TPM_ORD_Extend ((TPM_COMMAND_CODE) 0x00000014)
+#define TPM_ORD_FieldUpgrade ((TPM_COMMAND_CODE) 0x000000AA)
+#define TPM_ORD_FlushSpecific ((TPM_COMMAND_CODE) 0x000000BA)
+#define TPM_ORD_ForceClear ((TPM_COMMAND_CODE) 0x0000005D)
+#define TPM_ORD_GetAuditDigest ((TPM_COMMAND_CODE) 0x00000085)
+#define TPM_ORD_GetAuditDigestSigned ((TPM_COMMAND_CODE) 0x00000086)
+#define TPM_ORD_GetAuditEvent ((TPM_COMMAND_CODE) 0x00000082)
+#define TPM_ORD_GetAuditEventSigned ((TPM_COMMAND_CODE) 0x00000083)
+#define TPM_ORD_GetCapability ((TPM_COMMAND_CODE) 0x00000065)
+#define TPM_ORD_GetCapabilityOwner ((TPM_COMMAND_CODE) 0x00000066)
+#define TPM_ORD_GetCapabilitySigned ((TPM_COMMAND_CODE) 0x00000064)
+#define TPM_ORD_GetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008C)
+#define TPM_ORD_GetPubKey ((TPM_COMMAND_CODE) 0x00000021)
+#define TPM_ORD_GetRandom ((TPM_COMMAND_CODE) 0x00000046)
+#define TPM_ORD_GetTestResult ((TPM_COMMAND_CODE) 0x00000054)
+#define TPM_ORD_GetTicks ((TPM_COMMAND_CODE) 0x000000F1)
+#define TPM_ORD_IncrementCounter ((TPM_COMMAND_CODE) 0x000000DD)
+#define TPM_ORD_Init ((TPM_COMMAND_CODE) 0x00000097)
+#define TPM_ORD_KeyControlOwner ((TPM_COMMAND_CODE) 0x00000023)
+#define TPM_ORD_KillMaintenanceFeature ((TPM_COMMAND_CODE) 0x0000002E)
+#define TPM_ORD_LoadAuthContext ((TPM_COMMAND_CODE) 0x000000B7)
+#define TPM_ORD_LoadContext ((TPM_COMMAND_CODE) 0x000000B9)
+#define TPM_ORD_LoadKey ((TPM_COMMAND_CODE) 0x00000020)
+#define TPM_ORD_LoadKey2 ((TPM_COMMAND_CODE) 0x00000041)
+#define TPM_ORD_LoadKeyContext ((TPM_COMMAND_CODE) 0x000000B5)
+#define TPM_ORD_LoadMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002D)
+#define TPM_ORD_LoadManuMaintPub ((TPM_COMMAND_CODE) 0x0000002F)
+#define TPM_ORD_MakeIdentity ((TPM_COMMAND_CODE) 0x00000079)
+#define TPM_ORD_MigrateKey ((TPM_COMMAND_CODE) 0x00000025)
+#define TPM_ORD_NV_DefineSpace ((TPM_COMMAND_CODE) 0x000000CC)
+#define TPM_ORD_NV_ReadValue ((TPM_COMMAND_CODE) 0x000000CF)
+#define TPM_ORD_NV_ReadValueAuth ((TPM_COMMAND_CODE) 0x000000D0)
+#define TPM_ORD_NV_WriteValue ((TPM_COMMAND_CODE) 0x000000CD)
+#define TPM_ORD_NV_WriteValueAuth ((TPM_COMMAND_CODE) 0x000000CE)
+#define TPM_ORD_OIAP ((TPM_COMMAND_CODE) 0x0000000A)
+#define TPM_ORD_OSAP ((TPM_COMMAND_CODE) 0x0000000B)
+#define TPM_ORD_OwnerClear ((TPM_COMMAND_CODE) 0x0000005B)
+#define TPM_ORD_OwnerReadInternalPub ((TPM_COMMAND_CODE) 0x00000081)
+#define TPM_ORD_OwnerReadPubek ((TPM_COMMAND_CODE) 0x0000007D)
+#define TPM_ORD_OwnerSetDisable ((TPM_COMMAND_CODE) 0x0000006E)
+#define TPM_ORD_PCR_Reset ((TPM_COMMAND_CODE) 0x000000C8)
+#define TPM_ORD_PcrRead ((TPM_COMMAND_CODE) 0x00000015)
+#define TPM_ORD_PhysicalDisable ((TPM_COMMAND_CODE) 0x00000070)
+#define TPM_ORD_PhysicalEnable ((TPM_COMMAND_CODE) 0x0000006F)
+#define TPM_ORD_PhysicalSetDeactivated ((TPM_COMMAND_CODE) 0x00000072)
+#define TPM_ORD_Quote ((TPM_COMMAND_CODE) 0x00000016)
+#define TPM_ORD_Quote2 ((TPM_COMMAND_CODE) 0x0000003E)
+#define TPM_ORD_ReadCounter ((TPM_COMMAND_CODE) 0x000000DE)
+#define TPM_ORD_ReadManuMaintPub ((TPM_COMMAND_CODE) 0x00000030)
+#define TPM_ORD_ReadPubek ((TPM_COMMAND_CODE) 0x0000007C)
+#define TPM_ORD_ReleaseCounter ((TPM_COMMAND_CODE) 0x000000DF)
+#define TPM_ORD_ReleaseCounterOwner ((TPM_COMMAND_CODE) 0x000000E0)
+#define TPM_ORD_ReleaseTransportSigned ((TPM_COMMAND_CODE) 0x000000E8)
+#define TPM_ORD_Reset ((TPM_COMMAND_CODE) 0x0000005A)
+#define TPM_ORD_ResetLockValue ((TPM_COMMAND_CODE) 0x00000040)
+#define TPM_ORD_RevokeTrust ((TPM_COMMAND_CODE) 0x00000080)
+#define TPM_ORD_SaveAuthContext ((TPM_COMMAND_CODE) 0x000000B6)
+#define TPM_ORD_SaveContext ((TPM_COMMAND_CODE) 0x000000B8)
+#define TPM_ORD_SaveKeyContext ((TPM_COMMAND_CODE) 0x000000B4)
+#define TPM_ORD_SaveState ((TPM_COMMAND_CODE) 0x00000098)
+#define TPM_ORD_Seal ((TPM_COMMAND_CODE) 0x00000017)
+#define TPM_ORD_Sealx ((TPM_COMMAND_CODE) 0x0000003D)
+#define TPM_ORD_SelfTestFull ((TPM_COMMAND_CODE) 0x00000050)
+#define TPM_ORD_SetCapability ((TPM_COMMAND_CODE) 0x0000003F)
+#define TPM_ORD_SetOperatorAuth ((TPM_COMMAND_CODE) 0x00000074)
+#define TPM_ORD_SetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008D)
+#define TPM_ORD_SetOwnerInstall ((TPM_COMMAND_CODE) 0x00000071)
+#define TPM_ORD_SetOwnerPointer ((TPM_COMMAND_CODE) 0x00000075)
+#define TPM_ORD_SetRedirection ((TPM_COMMAND_CODE) 0x0000009A)
+#define TPM_ORD_SetTempDeactivated ((TPM_COMMAND_CODE) 0x00000073)
+#define TPM_ORD_SHA1Complete ((TPM_COMMAND_CODE) 0x000000A2)
+#define TPM_ORD_SHA1CompleteExtend ((TPM_COMMAND_CODE) 0x000000A3)
+#define TPM_ORD_SHA1Start ((TPM_COMMAND_CODE) 0x000000A0)
+#define TPM_ORD_SHA1Update ((TPM_COMMAND_CODE) 0x000000A1)
+#define TPM_ORD_Sign ((TPM_COMMAND_CODE) 0x0000003C)
+#define TPM_ORD_Startup ((TPM_COMMAND_CODE) 0x00000099)
+#define TPM_ORD_StirRandom ((TPM_COMMAND_CODE) 0x00000047)
+#define TPM_ORD_TakeOwnership ((TPM_COMMAND_CODE) 0x0000000D)
+#define TPM_ORD_Terminate_Handle ((TPM_COMMAND_CODE) 0x00000096)
+#define TPM_ORD_TickStampBlob ((TPM_COMMAND_CODE) 0x000000F2)
+#define TPM_ORD_UnBind ((TPM_COMMAND_CODE) 0x0000001E)
+#define TPM_ORD_Unseal ((TPM_COMMAND_CODE) 0x00000018)
+#define TSC_ORD_PhysicalPresence ((TPM_COMMAND_CODE) 0x4000000A)
+#define TSC_ORD_ResetEstablishmentBit ((TPM_COMMAND_CODE) 0x4000000B)
//
// Part 2, section 18: Context structures
@@ -1638,26 +1631,26 @@ typedef struct tdTPM_AUDIT_EVENT_OUT {
/// Part 2, section 18.1: TPM_CONTEXT_BLOB
///
typedef struct tdTPM_CONTEXT_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_RESOURCE_TYPE resourceType;
- TPM_HANDLE handle;
- UINT8 label[16];
- UINT32 contextCount;
- TPM_DIGEST integrityDigest;
- UINT32 additionalSize;
- UINT8 *additionalData;
- UINT32 sensitiveSize;
- UINT8 *sensitiveData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_RESOURCE_TYPE resourceType;
+ TPM_HANDLE handle;
+ UINT8 label[16];
+ UINT32 contextCount;
+ TPM_DIGEST integrityDigest;
+ UINT32 additionalSize;
+ UINT8 *additionalData;
+ UINT32 sensitiveSize;
+ UINT8 *sensitiveData;
} TPM_CONTEXT_BLOB;
///
/// Part 2, section 18.2 TPM_CONTEXT_SENSITIVE
///
typedef struct tdTPM_CONTEXT_SENSITIVE {
- TPM_STRUCTURE_TAG tag;
- TPM_NONCE contextNonce;
- UINT32 internalSize;
- UINT8 *internalData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_NONCE contextNonce;
+ UINT32 internalSize;
+ UINT8 *internalData;
} TPM_CONTEXT_SENSITIVE;
//
@@ -1667,382 +1660,382 @@ typedef struct tdTPM_CONTEXT_SENSITIVE {
//
// Part 2, section 19.1.1: Required TPM_NV_INDEX values
//
-#define TPM_NV_INDEX_LOCK ((UINT32)0xffffffff)
-#define TPM_NV_INDEX0 ((UINT32)0x00000000)
-#define TPM_NV_INDEX_DIR ((UINT32)0x10000001)
-#define TPM_NV_INDEX_EKCert ((UINT32)0x0000f000)
-#define TPM_NV_INDEX_TPM_CC ((UINT32)0x0000f001)
-#define TPM_NV_INDEX_PlatformCert ((UINT32)0x0000f002)
-#define TPM_NV_INDEX_Platform_CC ((UINT32)0x0000f003)
+#define TPM_NV_INDEX_LOCK ((UINT32)0xffffffff)
+#define TPM_NV_INDEX0 ((UINT32)0x00000000)
+#define TPM_NV_INDEX_DIR ((UINT32)0x10000001)
+#define TPM_NV_INDEX_EKCert ((UINT32)0x0000f000)
+#define TPM_NV_INDEX_TPM_CC ((UINT32)0x0000f001)
+#define TPM_NV_INDEX_PlatformCert ((UINT32)0x0000f002)
+#define TPM_NV_INDEX_Platform_CC ((UINT32)0x0000f003)
//
// Part 2, section 19.1.2: Reserved Index values
//
-#define TPM_NV_INDEX_TSS_BASE ((UINT32)0x00011100)
-#define TPM_NV_INDEX_PC_BASE ((UINT32)0x00011200)
-#define TPM_NV_INDEX_SERVER_BASE ((UINT32)0x00011300)
-#define TPM_NV_INDEX_MOBILE_BASE ((UINT32)0x00011400)
-#define TPM_NV_INDEX_PERIPHERAL_BASE ((UINT32)0x00011500)
-#define TPM_NV_INDEX_GROUP_RESV_BASE ((UINT32)0x00010000)
+#define TPM_NV_INDEX_TSS_BASE ((UINT32)0x00011100)
+#define TPM_NV_INDEX_PC_BASE ((UINT32)0x00011200)
+#define TPM_NV_INDEX_SERVER_BASE ((UINT32)0x00011300)
+#define TPM_NV_INDEX_MOBILE_BASE ((UINT32)0x00011400)
+#define TPM_NV_INDEX_PERIPHERAL_BASE ((UINT32)0x00011500)
+#define TPM_NV_INDEX_GROUP_RESV_BASE ((UINT32)0x00010000)
///
/// Part 2, section 19.2: TPM_NV_ATTRIBUTES
///
typedef struct tdTPM_NV_ATTRIBUTES {
- TPM_STRUCTURE_TAG tag;
- UINT32 attributes;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 attributes;
} TPM_NV_ATTRIBUTES;
-#define TPM_NV_PER_READ_STCLEAR (BIT31)
-#define TPM_NV_PER_AUTHREAD (BIT18)
-#define TPM_NV_PER_OWNERREAD (BIT17)
-#define TPM_NV_PER_PPREAD (BIT16)
-#define TPM_NV_PER_GLOBALLOCK (BIT15)
-#define TPM_NV_PER_WRITE_STCLEAR (BIT14)
-#define TPM_NV_PER_WRITEDEFINE (BIT13)
-#define TPM_NV_PER_WRITEALL (BIT12)
-#define TPM_NV_PER_AUTHWRITE (BIT2)
-#define TPM_NV_PER_OWNERWRITE (BIT1)
-#define TPM_NV_PER_PPWRITE (BIT0)
+#define TPM_NV_PER_READ_STCLEAR (BIT31)
+#define TPM_NV_PER_AUTHREAD (BIT18)
+#define TPM_NV_PER_OWNERREAD (BIT17)
+#define TPM_NV_PER_PPREAD (BIT16)
+#define TPM_NV_PER_GLOBALLOCK (BIT15)
+#define TPM_NV_PER_WRITE_STCLEAR (BIT14)
+#define TPM_NV_PER_WRITEDEFINE (BIT13)
+#define TPM_NV_PER_WRITEALL (BIT12)
+#define TPM_NV_PER_AUTHWRITE (BIT2)
+#define TPM_NV_PER_OWNERWRITE (BIT1)
+#define TPM_NV_PER_PPWRITE (BIT0)
///
/// Part 2, section 19.3: TPM_NV_DATA_PUBLIC
///
typedef struct tdTPM_NV_DATA_PUBLIC {
- TPM_STRUCTURE_TAG tag;
- TPM_NV_INDEX nvIndex;
- TPM_PCR_INFO_SHORT pcrInfoRead;
- TPM_PCR_INFO_SHORT pcrInfoWrite;
- TPM_NV_ATTRIBUTES permission;
- BOOLEAN bReadSTClear;
- BOOLEAN bWriteSTClear;
- BOOLEAN bWriteDefine;
- UINT32 dataSize;
+ TPM_STRUCTURE_TAG tag;
+ TPM_NV_INDEX nvIndex;
+ TPM_PCR_INFO_SHORT pcrInfoRead;
+ TPM_PCR_INFO_SHORT pcrInfoWrite;
+ TPM_NV_ATTRIBUTES permission;
+ BOOLEAN bReadSTClear;
+ BOOLEAN bWriteSTClear;
+ BOOLEAN bWriteDefine;
+ UINT32 dataSize;
} TPM_NV_DATA_PUBLIC;
//
// Part 2, section 20: Delegate Structures
//
-#define TPM_DEL_OWNER_BITS ((UINT32)0x00000001)
-#define TPM_DEL_KEY_BITS ((UINT32)0x00000002)
+#define TPM_DEL_OWNER_BITS ((UINT32)0x00000001)
+#define TPM_DEL_KEY_BITS ((UINT32)0x00000002)
///
/// Part 2, section 20.2: Delegate Definitions
///
typedef struct tdTPM_DELEGATIONS {
- TPM_STRUCTURE_TAG tag;
- UINT32 delegateType;
- UINT32 per1;
- UINT32 per2;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 delegateType;
+ UINT32 per1;
+ UINT32 per2;
} TPM_DELEGATIONS;
//
// Part 2, section 20.2.1: Owner Permission Settings
//
-#define TPM_DELEGATE_SetOrdinalAuditStatus (BIT30)
-#define TPM_DELEGATE_DirWriteAuth (BIT29)
-#define TPM_DELEGATE_CMK_ApproveMA (BIT28)
-#define TPM_DELEGATE_NV_WriteValue (BIT27)
-#define TPM_DELEGATE_CMK_CreateTicket (BIT26)
-#define TPM_DELEGATE_NV_ReadValue (BIT25)
-#define TPM_DELEGATE_Delegate_LoadOwnerDelegation (BIT24)
-#define TPM_DELEGATE_DAA_Join (BIT23)
-#define TPM_DELEGATE_AuthorizeMigrationKey (BIT22)
-#define TPM_DELEGATE_CreateMaintenanceArchive (BIT21)
-#define TPM_DELEGATE_LoadMaintenanceArchive (BIT20)
-#define TPM_DELEGATE_KillMaintenanceFeature (BIT19)
-#define TPM_DELEGATE_OwnerReadInteralPub (BIT18)
-#define TPM_DELEGATE_ResetLockValue (BIT17)
-#define TPM_DELEGATE_OwnerClear (BIT16)
-#define TPM_DELEGATE_DisableOwnerClear (BIT15)
-#define TPM_DELEGATE_NV_DefineSpace (BIT14)
-#define TPM_DELEGATE_OwnerSetDisable (BIT13)
-#define TPM_DELEGATE_SetCapability (BIT12)
-#define TPM_DELEGATE_MakeIdentity (BIT11)
-#define TPM_DELEGATE_ActivateIdentity (BIT10)
-#define TPM_DELEGATE_OwnerReadPubek (BIT9)
-#define TPM_DELEGATE_DisablePubekRead (BIT8)
-#define TPM_DELEGATE_SetRedirection (BIT7)
-#define TPM_DELEGATE_FieldUpgrade (BIT6)
-#define TPM_DELEGATE_Delegate_UpdateVerification (BIT5)
-#define TPM_DELEGATE_CreateCounter (BIT4)
-#define TPM_DELEGATE_ReleaseCounterOwner (BIT3)
-#define TPM_DELEGATE_DelegateManage (BIT2)
-#define TPM_DELEGATE_Delegate_CreateOwnerDelegation (BIT1)
-#define TPM_DELEGATE_DAA_Sign (BIT0)
+#define TPM_DELEGATE_SetOrdinalAuditStatus (BIT30)
+#define TPM_DELEGATE_DirWriteAuth (BIT29)
+#define TPM_DELEGATE_CMK_ApproveMA (BIT28)
+#define TPM_DELEGATE_NV_WriteValue (BIT27)
+#define TPM_DELEGATE_CMK_CreateTicket (BIT26)
+#define TPM_DELEGATE_NV_ReadValue (BIT25)
+#define TPM_DELEGATE_Delegate_LoadOwnerDelegation (BIT24)
+#define TPM_DELEGATE_DAA_Join (BIT23)
+#define TPM_DELEGATE_AuthorizeMigrationKey (BIT22)
+#define TPM_DELEGATE_CreateMaintenanceArchive (BIT21)
+#define TPM_DELEGATE_LoadMaintenanceArchive (BIT20)
+#define TPM_DELEGATE_KillMaintenanceFeature (BIT19)
+#define TPM_DELEGATE_OwnerReadInteralPub (BIT18)
+#define TPM_DELEGATE_ResetLockValue (BIT17)
+#define TPM_DELEGATE_OwnerClear (BIT16)
+#define TPM_DELEGATE_DisableOwnerClear (BIT15)
+#define TPM_DELEGATE_NV_DefineSpace (BIT14)
+#define TPM_DELEGATE_OwnerSetDisable (BIT13)
+#define TPM_DELEGATE_SetCapability (BIT12)
+#define TPM_DELEGATE_MakeIdentity (BIT11)
+#define TPM_DELEGATE_ActivateIdentity (BIT10)
+#define TPM_DELEGATE_OwnerReadPubek (BIT9)
+#define TPM_DELEGATE_DisablePubekRead (BIT8)
+#define TPM_DELEGATE_SetRedirection (BIT7)
+#define TPM_DELEGATE_FieldUpgrade (BIT6)
+#define TPM_DELEGATE_Delegate_UpdateVerification (BIT5)
+#define TPM_DELEGATE_CreateCounter (BIT4)
+#define TPM_DELEGATE_ReleaseCounterOwner (BIT3)
+#define TPM_DELEGATE_DelegateManage (BIT2)
+#define TPM_DELEGATE_Delegate_CreateOwnerDelegation (BIT1)
+#define TPM_DELEGATE_DAA_Sign (BIT0)
//
// Part 2, section 20.2.3: Key Permission settings
//
-#define TPM_KEY_DELEGATE_CMK_ConvertMigration (BIT28)
-#define TPM_KEY_DELEGATE_TickStampBlob (BIT27)
-#define TPM_KEY_DELEGATE_ChangeAuthAsymStart (BIT26)
-#define TPM_KEY_DELEGATE_ChangeAuthAsymFinish (BIT25)
-#define TPM_KEY_DELEGATE_CMK_CreateKey (BIT24)
-#define TPM_KEY_DELEGATE_MigrateKey (BIT23)
-#define TPM_KEY_DELEGATE_LoadKey2 (BIT22)
-#define TPM_KEY_DELEGATE_EstablishTransport (BIT21)
-#define TPM_KEY_DELEGATE_ReleaseTransportSigned (BIT20)
-#define TPM_KEY_DELEGATE_Quote2 (BIT19)
-#define TPM_KEY_DELEGATE_Sealx (BIT18)
-#define TPM_KEY_DELEGATE_MakeIdentity (BIT17)
-#define TPM_KEY_DELEGATE_ActivateIdentity (BIT16)
-#define TPM_KEY_DELEGATE_GetAuditDigestSigned (BIT15)
-#define TPM_KEY_DELEGATE_Sign (BIT14)
-#define TPM_KEY_DELEGATE_CertifyKey2 (BIT13)
-#define TPM_KEY_DELEGATE_CertifyKey (BIT12)
-#define TPM_KEY_DELEGATE_CreateWrapKey (BIT11)
-#define TPM_KEY_DELEGATE_CMK_CreateBlob (BIT10)
-#define TPM_KEY_DELEGATE_CreateMigrationBlob (BIT9)
-#define TPM_KEY_DELEGATE_ConvertMigrationBlob (BIT8)
-#define TPM_KEY_DELEGATE_CreateKeyDelegation (BIT7)
-#define TPM_KEY_DELEGATE_ChangeAuth (BIT6)
-#define TPM_KEY_DELEGATE_GetPubKey (BIT5)
-#define TPM_KEY_DELEGATE_UnBind (BIT4)
-#define TPM_KEY_DELEGATE_Quote (BIT3)
-#define TPM_KEY_DELEGATE_Unseal (BIT2)
-#define TPM_KEY_DELEGATE_Seal (BIT1)
-#define TPM_KEY_DELEGATE_LoadKey (BIT0)
+#define TPM_KEY_DELEGATE_CMK_ConvertMigration (BIT28)
+#define TPM_KEY_DELEGATE_TickStampBlob (BIT27)
+#define TPM_KEY_DELEGATE_ChangeAuthAsymStart (BIT26)
+#define TPM_KEY_DELEGATE_ChangeAuthAsymFinish (BIT25)
+#define TPM_KEY_DELEGATE_CMK_CreateKey (BIT24)
+#define TPM_KEY_DELEGATE_MigrateKey (BIT23)
+#define TPM_KEY_DELEGATE_LoadKey2 (BIT22)
+#define TPM_KEY_DELEGATE_EstablishTransport (BIT21)
+#define TPM_KEY_DELEGATE_ReleaseTransportSigned (BIT20)
+#define TPM_KEY_DELEGATE_Quote2 (BIT19)
+#define TPM_KEY_DELEGATE_Sealx (BIT18)
+#define TPM_KEY_DELEGATE_MakeIdentity (BIT17)
+#define TPM_KEY_DELEGATE_ActivateIdentity (BIT16)
+#define TPM_KEY_DELEGATE_GetAuditDigestSigned (BIT15)
+#define TPM_KEY_DELEGATE_Sign (BIT14)
+#define TPM_KEY_DELEGATE_CertifyKey2 (BIT13)
+#define TPM_KEY_DELEGATE_CertifyKey (BIT12)
+#define TPM_KEY_DELEGATE_CreateWrapKey (BIT11)
+#define TPM_KEY_DELEGATE_CMK_CreateBlob (BIT10)
+#define TPM_KEY_DELEGATE_CreateMigrationBlob (BIT9)
+#define TPM_KEY_DELEGATE_ConvertMigrationBlob (BIT8)
+#define TPM_KEY_DELEGATE_CreateKeyDelegation (BIT7)
+#define TPM_KEY_DELEGATE_ChangeAuth (BIT6)
+#define TPM_KEY_DELEGATE_GetPubKey (BIT5)
+#define TPM_KEY_DELEGATE_UnBind (BIT4)
+#define TPM_KEY_DELEGATE_Quote (BIT3)
+#define TPM_KEY_DELEGATE_Unseal (BIT2)
+#define TPM_KEY_DELEGATE_Seal (BIT1)
+#define TPM_KEY_DELEGATE_LoadKey (BIT0)
//
// Part 2, section 20.3: TPM_FAMILY_FLAGS
//
-#define TPM_DELEGATE_ADMIN_LOCK (BIT1)
-#define TPM_FAMFLAG_ENABLE (BIT0)
+#define TPM_DELEGATE_ADMIN_LOCK (BIT1)
+#define TPM_FAMFLAG_ENABLE (BIT0)
///
/// Part 2, section 20.4: TPM_FAMILY_LABEL
///
typedef struct tdTPM_FAMILY_LABEL {
- UINT8 label;
+ UINT8 label;
} TPM_FAMILY_LABEL;
///
/// Part 2, section 20.5: TPM_FAMILY_TABLE_ENTRY
///
typedef struct tdTPM_FAMILY_TABLE_ENTRY {
- TPM_STRUCTURE_TAG tag;
- TPM_FAMILY_LABEL label;
- TPM_FAMILY_ID familyID;
- TPM_FAMILY_VERIFICATION verificationCount;
- TPM_FAMILY_FLAGS flags;
+ TPM_STRUCTURE_TAG tag;
+ TPM_FAMILY_LABEL label;
+ TPM_FAMILY_ID familyID;
+ TPM_FAMILY_VERIFICATION verificationCount;
+ TPM_FAMILY_FLAGS flags;
} TPM_FAMILY_TABLE_ENTRY;
//
// Part 2, section 20.6: TPM_FAMILY_TABLE
//
-#define TPM_NUM_FAMILY_TABLE_ENTRY_MIN 8
+#define TPM_NUM_FAMILY_TABLE_ENTRY_MIN 8
-typedef struct tdTPM_FAMILY_TABLE{
- TPM_FAMILY_TABLE_ENTRY famTableRow[TPM_NUM_FAMILY_TABLE_ENTRY_MIN];
+typedef struct tdTPM_FAMILY_TABLE {
+ TPM_FAMILY_TABLE_ENTRY famTableRow[TPM_NUM_FAMILY_TABLE_ENTRY_MIN];
} TPM_FAMILY_TABLE;
///
/// Part 2, section 20.7: TPM_DELEGATE_LABEL
///
typedef struct tdTPM_DELEGATE_LABEL {
- UINT8 label;
+ UINT8 label;
} TPM_DELEGATE_LABEL;
///
/// Part 2, section 20.8: TPM_DELEGATE_PUBLIC
///
typedef struct tdTPM_DELEGATE_PUBLIC {
- TPM_STRUCTURE_TAG tag;
- TPM_DELEGATE_LABEL label;
- TPM_PCR_INFO_SHORT pcrInfo;
- TPM_DELEGATIONS permissions;
- TPM_FAMILY_ID familyID;
- TPM_FAMILY_VERIFICATION verificationCount;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DELEGATE_LABEL label;
+ TPM_PCR_INFO_SHORT pcrInfo;
+ TPM_DELEGATIONS permissions;
+ TPM_FAMILY_ID familyID;
+ TPM_FAMILY_VERIFICATION verificationCount;
} TPM_DELEGATE_PUBLIC;
///
/// Part 2, section 20.9: TPM_DELEGATE_TABLE_ROW
///
typedef struct tdTPM_DELEGATE_TABLE_ROW {
- TPM_STRUCTURE_TAG tag;
- TPM_DELEGATE_PUBLIC pub;
- TPM_SECRET authValue;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DELEGATE_PUBLIC pub;
+ TPM_SECRET authValue;
} TPM_DELEGATE_TABLE_ROW;
//
// Part 2, section 20.10: TPM_DELEGATE_TABLE
//
-#define TPM_NUM_DELEGATE_TABLE_ENTRY_MIN 2
+#define TPM_NUM_DELEGATE_TABLE_ENTRY_MIN 2
-typedef struct tdTPM_DELEGATE_TABLE{
- TPM_DELEGATE_TABLE_ROW delRow[TPM_NUM_DELEGATE_TABLE_ENTRY_MIN];
+typedef struct tdTPM_DELEGATE_TABLE {
+ TPM_DELEGATE_TABLE_ROW delRow[TPM_NUM_DELEGATE_TABLE_ENTRY_MIN];
} TPM_DELEGATE_TABLE;
///
/// Part 2, section 20.11: TPM_DELEGATE_SENSITIVE
///
typedef struct tdTPM_DELEGATE_SENSITIVE {
- TPM_STRUCTURE_TAG tag;
- TPM_SECRET authValue;
+ TPM_STRUCTURE_TAG tag;
+ TPM_SECRET authValue;
} TPM_DELEGATE_SENSITIVE;
///
/// Part 2, section 20.12: TPM_DELEGATE_OWNER_BLOB
///
typedef struct tdTPM_DELEGATE_OWNER_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_DELEGATE_PUBLIC pub;
- TPM_DIGEST integrityDigest;
- UINT32 additionalSize;
- UINT8 *additionalArea;
- UINT32 sensitiveSize;
- UINT8 *sensitiveArea;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DELEGATE_PUBLIC pub;
+ TPM_DIGEST integrityDigest;
+ UINT32 additionalSize;
+ UINT8 *additionalArea;
+ UINT32 sensitiveSize;
+ UINT8 *sensitiveArea;
} TPM_DELEGATE_OWNER_BLOB;
///
/// Part 2, section 20.13: TTPM_DELEGATE_KEY_BLOB
///
typedef struct tdTPM_DELEGATE_KEY_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_DELEGATE_PUBLIC pub;
- TPM_DIGEST integrityDigest;
- TPM_DIGEST pubKeyDigest;
- UINT32 additionalSize;
- UINT8 *additionalArea;
- UINT32 sensitiveSize;
- UINT8 *sensitiveArea;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DELEGATE_PUBLIC pub;
+ TPM_DIGEST integrityDigest;
+ TPM_DIGEST pubKeyDigest;
+ UINT32 additionalSize;
+ UINT8 *additionalArea;
+ UINT32 sensitiveSize;
+ UINT8 *sensitiveArea;
} TPM_DELEGATE_KEY_BLOB;
//
// Part 2, section 20.14: TPM_FAMILY_OPERATION Values
//
-#define TPM_FAMILY_CREATE ((UINT32)0x00000001)
-#define TPM_FAMILY_ENABLE ((UINT32)0x00000002)
-#define TPM_FAMILY_ADMIN ((UINT32)0x00000003)
-#define TPM_FAMILY_INVALIDATE ((UINT32)0x00000004)
+#define TPM_FAMILY_CREATE ((UINT32)0x00000001)
+#define TPM_FAMILY_ENABLE ((UINT32)0x00000002)
+#define TPM_FAMILY_ADMIN ((UINT32)0x00000003)
+#define TPM_FAMILY_INVALIDATE ((UINT32)0x00000004)
//
// Part 2, section 21.1: TPM_CAPABILITY_AREA for GetCapability
//
-#define TPM_CAP_ORD ((TPM_CAPABILITY_AREA) 0x00000001)
-#define TPM_CAP_ALG ((TPM_CAPABILITY_AREA) 0x00000002)
-#define TPM_CAP_PID ((TPM_CAPABILITY_AREA) 0x00000003)
-#define TPM_CAP_FLAG ((TPM_CAPABILITY_AREA) 0x00000004)
-#define TPM_CAP_PROPERTY ((TPM_CAPABILITY_AREA) 0x00000005)
-#define TPM_CAP_VERSION ((TPM_CAPABILITY_AREA) 0x00000006)
-#define TPM_CAP_KEY_HANDLE ((TPM_CAPABILITY_AREA) 0x00000007)
-#define TPM_CAP_CHECK_LOADED ((TPM_CAPABILITY_AREA) 0x00000008)
-#define TPM_CAP_SYM_MODE ((TPM_CAPABILITY_AREA) 0x00000009)
-#define TPM_CAP_KEY_STATUS ((TPM_CAPABILITY_AREA) 0x0000000C)
-#define TPM_CAP_NV_LIST ((TPM_CAPABILITY_AREA) 0x0000000D)
-#define TPM_CAP_MFR ((TPM_CAPABILITY_AREA) 0x00000010)
-#define TPM_CAP_NV_INDEX ((TPM_CAPABILITY_AREA) 0x00000011)
-#define TPM_CAP_TRANS_ALG ((TPM_CAPABILITY_AREA) 0x00000012)
-#define TPM_CAP_HANDLE ((TPM_CAPABILITY_AREA) 0x00000014)
-#define TPM_CAP_TRANS_ES ((TPM_CAPABILITY_AREA) 0x00000015)
-#define TPM_CAP_AUTH_ENCRYPT ((TPM_CAPABILITY_AREA) 0x00000017)
-#define TPM_CAP_SELECT_SIZE ((TPM_CAPABILITY_AREA) 0x00000018)
-#define TPM_CAP_VERSION_VAL ((TPM_CAPABILITY_AREA) 0x0000001A)
-
-#define TPM_CAP_FLAG_PERMANENT ((TPM_CAPABILITY_AREA) 0x00000108)
-#define TPM_CAP_FLAG_VOLATILE ((TPM_CAPABILITY_AREA) 0x00000109)
+#define TPM_CAP_ORD ((TPM_CAPABILITY_AREA) 0x00000001)
+#define TPM_CAP_ALG ((TPM_CAPABILITY_AREA) 0x00000002)
+#define TPM_CAP_PID ((TPM_CAPABILITY_AREA) 0x00000003)
+#define TPM_CAP_FLAG ((TPM_CAPABILITY_AREA) 0x00000004)
+#define TPM_CAP_PROPERTY ((TPM_CAPABILITY_AREA) 0x00000005)
+#define TPM_CAP_VERSION ((TPM_CAPABILITY_AREA) 0x00000006)
+#define TPM_CAP_KEY_HANDLE ((TPM_CAPABILITY_AREA) 0x00000007)
+#define TPM_CAP_CHECK_LOADED ((TPM_CAPABILITY_AREA) 0x00000008)
+#define TPM_CAP_SYM_MODE ((TPM_CAPABILITY_AREA) 0x00000009)
+#define TPM_CAP_KEY_STATUS ((TPM_CAPABILITY_AREA) 0x0000000C)
+#define TPM_CAP_NV_LIST ((TPM_CAPABILITY_AREA) 0x0000000D)
+#define TPM_CAP_MFR ((TPM_CAPABILITY_AREA) 0x00000010)
+#define TPM_CAP_NV_INDEX ((TPM_CAPABILITY_AREA) 0x00000011)
+#define TPM_CAP_TRANS_ALG ((TPM_CAPABILITY_AREA) 0x00000012)
+#define TPM_CAP_HANDLE ((TPM_CAPABILITY_AREA) 0x00000014)
+#define TPM_CAP_TRANS_ES ((TPM_CAPABILITY_AREA) 0x00000015)
+#define TPM_CAP_AUTH_ENCRYPT ((TPM_CAPABILITY_AREA) 0x00000017)
+#define TPM_CAP_SELECT_SIZE ((TPM_CAPABILITY_AREA) 0x00000018)
+#define TPM_CAP_VERSION_VAL ((TPM_CAPABILITY_AREA) 0x0000001A)
+
+#define TPM_CAP_FLAG_PERMANENT ((TPM_CAPABILITY_AREA) 0x00000108)
+#define TPM_CAP_FLAG_VOLATILE ((TPM_CAPABILITY_AREA) 0x00000109)
//
// Part 2, section 21.2: CAP_PROPERTY Subcap values for GetCapability
//
-#define TPM_CAP_PROP_PCR ((TPM_CAPABILITY_AREA) 0x00000101)
-#define TPM_CAP_PROP_DIR ((TPM_CAPABILITY_AREA) 0x00000102)
-#define TPM_CAP_PROP_MANUFACTURER ((TPM_CAPABILITY_AREA) 0x00000103)
-#define TPM_CAP_PROP_KEYS ((TPM_CAPABILITY_AREA) 0x00000104)
-#define TPM_CAP_PROP_MIN_COUNTER ((TPM_CAPABILITY_AREA) 0x00000107)
-#define TPM_CAP_PROP_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010A)
-#define TPM_CAP_PROP_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010B)
-#define TPM_CAP_PROP_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010C)
-#define TPM_CAP_PROP_MAX_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010D)
-#define TPM_CAP_PROP_MAX_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010E)
-#define TPM_CAP_PROP_MAX_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010F)
-#define TPM_CAP_PROP_MAX_KEYS ((TPM_CAPABILITY_AREA) 0x00000110)
-#define TPM_CAP_PROP_OWNER ((TPM_CAPABILITY_AREA) 0x00000111)
-#define TPM_CAP_PROP_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000112)
-#define TPM_CAP_PROP_MAX_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000113)
-#define TPM_CAP_PROP_FAMILYROWS ((TPM_CAPABILITY_AREA) 0x00000114)
-#define TPM_CAP_PROP_TIS_TIMEOUT ((TPM_CAPABILITY_AREA) 0x00000115)
-#define TPM_CAP_PROP_STARTUP_EFFECT ((TPM_CAPABILITY_AREA) 0x00000116)
-#define TPM_CAP_PROP_DELEGATE_ROW ((TPM_CAPABILITY_AREA) 0x00000117)
-#define TPM_CAP_PROP_DAA_MAX ((TPM_CAPABILITY_AREA) 0x00000119)
-#define CAP_PROP_SESSION_DAA ((TPM_CAPABILITY_AREA) 0x0000011A)
-#define TPM_CAP_PROP_CONTEXT_DIST ((TPM_CAPABILITY_AREA) 0x0000011B)
-#define TPM_CAP_PROP_DAA_INTERRUPT ((TPM_CAPABILITY_AREA) 0x0000011C)
-#define TPM_CAP_PROP_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011D)
-#define TPM_CAP_PROP_MAX_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011E)
-#define TPM_CAP_PROP_CMK_RESTRICTION ((TPM_CAPABILITY_AREA) 0x0000011F)
-#define TPM_CAP_PROP_DURATION ((TPM_CAPABILITY_AREA) 0x00000120)
-#define TPM_CAP_PROP_ACTIVE_COUNTER ((TPM_CAPABILITY_AREA) 0x00000122)
-#define TPM_CAP_PROP_MAX_NV_AVAILABLE ((TPM_CAPABILITY_AREA) 0x00000123)
-#define TPM_CAP_PROP_INPUT_BUFFER ((TPM_CAPABILITY_AREA) 0x00000124)
+#define TPM_CAP_PROP_PCR ((TPM_CAPABILITY_AREA) 0x00000101)
+#define TPM_CAP_PROP_DIR ((TPM_CAPABILITY_AREA) 0x00000102)
+#define TPM_CAP_PROP_MANUFACTURER ((TPM_CAPABILITY_AREA) 0x00000103)
+#define TPM_CAP_PROP_KEYS ((TPM_CAPABILITY_AREA) 0x00000104)
+#define TPM_CAP_PROP_MIN_COUNTER ((TPM_CAPABILITY_AREA) 0x00000107)
+#define TPM_CAP_PROP_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010A)
+#define TPM_CAP_PROP_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010B)
+#define TPM_CAP_PROP_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010C)
+#define TPM_CAP_PROP_MAX_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010D)
+#define TPM_CAP_PROP_MAX_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010E)
+#define TPM_CAP_PROP_MAX_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010F)
+#define TPM_CAP_PROP_MAX_KEYS ((TPM_CAPABILITY_AREA) 0x00000110)
+#define TPM_CAP_PROP_OWNER ((TPM_CAPABILITY_AREA) 0x00000111)
+#define TPM_CAP_PROP_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000112)
+#define TPM_CAP_PROP_MAX_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000113)
+#define TPM_CAP_PROP_FAMILYROWS ((TPM_CAPABILITY_AREA) 0x00000114)
+#define TPM_CAP_PROP_TIS_TIMEOUT ((TPM_CAPABILITY_AREA) 0x00000115)
+#define TPM_CAP_PROP_STARTUP_EFFECT ((TPM_CAPABILITY_AREA) 0x00000116)
+#define TPM_CAP_PROP_DELEGATE_ROW ((TPM_CAPABILITY_AREA) 0x00000117)
+#define TPM_CAP_PROP_DAA_MAX ((TPM_CAPABILITY_AREA) 0x00000119)
+#define CAP_PROP_SESSION_DAA ((TPM_CAPABILITY_AREA) 0x0000011A)
+#define TPM_CAP_PROP_CONTEXT_DIST ((TPM_CAPABILITY_AREA) 0x0000011B)
+#define TPM_CAP_PROP_DAA_INTERRUPT ((TPM_CAPABILITY_AREA) 0x0000011C)
+#define TPM_CAP_PROP_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011D)
+#define TPM_CAP_PROP_MAX_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011E)
+#define TPM_CAP_PROP_CMK_RESTRICTION ((TPM_CAPABILITY_AREA) 0x0000011F)
+#define TPM_CAP_PROP_DURATION ((TPM_CAPABILITY_AREA) 0x00000120)
+#define TPM_CAP_PROP_ACTIVE_COUNTER ((TPM_CAPABILITY_AREA) 0x00000122)
+#define TPM_CAP_PROP_MAX_NV_AVAILABLE ((TPM_CAPABILITY_AREA) 0x00000123)
+#define TPM_CAP_PROP_INPUT_BUFFER ((TPM_CAPABILITY_AREA) 0x00000124)
//
// Part 2, section 21.4: TPM_CAPABILITY_AREA for SetCapability
//
-#define TPM_SET_PERM_FLAGS ((TPM_CAPABILITY_AREA) 0x00000001)
-#define TPM_SET_PERM_DATA ((TPM_CAPABILITY_AREA) 0x00000002)
-#define TPM_SET_STCLEAR_FLAGS ((TPM_CAPABILITY_AREA) 0x00000003)
-#define TPM_SET_STCLEAR_DATA ((TPM_CAPABILITY_AREA) 0x00000004)
-#define TPM_SET_STANY_FLAGS ((TPM_CAPABILITY_AREA) 0x00000005)
-#define TPM_SET_STANY_DATA ((TPM_CAPABILITY_AREA) 0x00000006)
+#define TPM_SET_PERM_FLAGS ((TPM_CAPABILITY_AREA) 0x00000001)
+#define TPM_SET_PERM_DATA ((TPM_CAPABILITY_AREA) 0x00000002)
+#define TPM_SET_STCLEAR_FLAGS ((TPM_CAPABILITY_AREA) 0x00000003)
+#define TPM_SET_STCLEAR_DATA ((TPM_CAPABILITY_AREA) 0x00000004)
+#define TPM_SET_STANY_FLAGS ((TPM_CAPABILITY_AREA) 0x00000005)
+#define TPM_SET_STANY_DATA ((TPM_CAPABILITY_AREA) 0x00000006)
///
/// Part 2, section 21.6: TPM_CAP_VERSION_INFO
/// [size_is(vendorSpecificSize)] BYTE* vendorSpecific;
///
typedef struct tdTPM_CAP_VERSION_INFO {
- TPM_STRUCTURE_TAG tag;
- TPM_VERSION version;
- UINT16 specLevel;
- UINT8 errataRev;
- UINT8 tpmVendorID[4];
- UINT16 vendorSpecificSize;
- UINT8 *vendorSpecific;
+ TPM_STRUCTURE_TAG tag;
+ TPM_VERSION version;
+ UINT16 specLevel;
+ UINT8 errataRev;
+ UINT8 tpmVendorID[4];
+ UINT16 vendorSpecificSize;
+ UINT8 *vendorSpecific;
} TPM_CAP_VERSION_INFO;
///
/// Part 2, section 21.10: TPM_DA_ACTION_TYPE
///
typedef struct tdTPM_DA_ACTION_TYPE {
- TPM_STRUCTURE_TAG tag;
- UINT32 actions;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 actions;
} TPM_DA_ACTION_TYPE;
-#define TPM_DA_ACTION_FAILURE_MODE (((UINT32)1)<<3)
-#define TPM_DA_ACTION_DEACTIVATE (((UINT32)1)<<2)
-#define TPM_DA_ACTION_DISABLE (((UINT32)1)<<1)
-#define TPM_DA_ACTION_TIMEOUT (((UINT32)1)<<0)
+#define TPM_DA_ACTION_FAILURE_MODE (((UINT32)1)<<3)
+#define TPM_DA_ACTION_DEACTIVATE (((UINT32)1)<<2)
+#define TPM_DA_ACTION_DISABLE (((UINT32)1)<<1)
+#define TPM_DA_ACTION_TIMEOUT (((UINT32)1)<<0)
///
/// Part 2, section 21.7: TPM_DA_INFO
///
typedef struct tdTPM_DA_INFO {
- TPM_STRUCTURE_TAG tag;
- TPM_DA_STATE state;
- UINT16 currentCount;
- UINT16 thresholdCount;
- TPM_DA_ACTION_TYPE actionAtThreshold;
- UINT32 actionDependValue;
- UINT32 vendorDataSize;
- UINT8 *vendorData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DA_STATE state;
+ UINT16 currentCount;
+ UINT16 thresholdCount;
+ TPM_DA_ACTION_TYPE actionAtThreshold;
+ UINT32 actionDependValue;
+ UINT32 vendorDataSize;
+ UINT8 *vendorData;
} TPM_DA_INFO;
///
/// Part 2, section 21.8: TPM_DA_INFO_LIMITED
///
typedef struct tdTPM_DA_INFO_LIMITED {
- TPM_STRUCTURE_TAG tag;
- TPM_DA_STATE state;
- TPM_DA_ACTION_TYPE actionAtThreshold;
- UINT32 vendorDataSize;
- UINT8 *vendorData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DA_STATE state;
+ TPM_DA_ACTION_TYPE actionAtThreshold;
+ UINT32 vendorDataSize;
+ UINT8 *vendorData;
} TPM_DA_INFO_LIMITED;
//
// Part 2, section 21.9: CAP_PROPERTY Subcap values for GetCapability
//
-#define TPM_DA_STATE_INACTIVE ((UINT8)0x00)
-#define TPM_DA_STATE_ACTIVE ((UINT8)0x01)
+#define TPM_DA_STATE_INACTIVE ((UINT8)0x00)
+#define TPM_DA_STATE_ACTIVE ((UINT8)0x01)
//
// Part 2, section 22: DAA Structures
@@ -2051,94 +2044,93 @@ typedef struct tdTPM_DA_INFO_LIMITED {
//
// Part 2, section 22.1: Size definitions
//
-#define TPM_DAA_SIZE_r0 (43)
-#define TPM_DAA_SIZE_r1 (43)
-#define TPM_DAA_SIZE_r2 (128)
-#define TPM_DAA_SIZE_r3 (168)
-#define TPM_DAA_SIZE_r4 (219)
-#define TPM_DAA_SIZE_NT (20)
-#define TPM_DAA_SIZE_v0 (128)
-#define TPM_DAA_SIZE_v1 (192)
-#define TPM_DAA_SIZE_NE (256)
-#define TPM_DAA_SIZE_w (256)
-#define TPM_DAA_SIZE_issuerModulus (256)
+#define TPM_DAA_SIZE_r0 (43)
+#define TPM_DAA_SIZE_r1 (43)
+#define TPM_DAA_SIZE_r2 (128)
+#define TPM_DAA_SIZE_r3 (168)
+#define TPM_DAA_SIZE_r4 (219)
+#define TPM_DAA_SIZE_NT (20)
+#define TPM_DAA_SIZE_v0 (128)
+#define TPM_DAA_SIZE_v1 (192)
+#define TPM_DAA_SIZE_NE (256)
+#define TPM_DAA_SIZE_w (256)
+#define TPM_DAA_SIZE_issuerModulus (256)
//
// Part 2, section 22.2: Constant definitions
//
-#define TPM_DAA_power0 (104)
-#define TPM_DAA_power1 (1024)
+#define TPM_DAA_power0 (104)
+#define TPM_DAA_power1 (1024)
///
/// Part 2, section 22.3: TPM_DAA_ISSUER
///
typedef struct tdTPM_DAA_ISSUER {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST DAA_digest_R0;
- TPM_DIGEST DAA_digest_R1;
- TPM_DIGEST DAA_digest_S0;
- TPM_DIGEST DAA_digest_S1;
- TPM_DIGEST DAA_digest_n;
- TPM_DIGEST DAA_digest_gamma;
- UINT8 DAA_generic_q[26];
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST DAA_digest_R0;
+ TPM_DIGEST DAA_digest_R1;
+ TPM_DIGEST DAA_digest_S0;
+ TPM_DIGEST DAA_digest_S1;
+ TPM_DIGEST DAA_digest_n;
+ TPM_DIGEST DAA_digest_gamma;
+ UINT8 DAA_generic_q[26];
} TPM_DAA_ISSUER;
///
/// Part 2, section 22.4: TPM_DAA_TPM
///
typedef struct tdTPM_DAA_TPM {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST DAA_digestIssuer;
- TPM_DIGEST DAA_digest_v0;
- TPM_DIGEST DAA_digest_v1;
- TPM_DIGEST DAA_rekey;
- UINT32 DAA_count;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST DAA_digestIssuer;
+ TPM_DIGEST DAA_digest_v0;
+ TPM_DIGEST DAA_digest_v1;
+ TPM_DIGEST DAA_rekey;
+ UINT32 DAA_count;
} TPM_DAA_TPM;
///
/// Part 2, section 22.5: TPM_DAA_CONTEXT
///
typedef struct tdTPM_DAA_CONTEXT {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST DAA_digestContext;
- TPM_DIGEST DAA_digest;
- TPM_DAA_CONTEXT_SEED DAA_contextSeed;
- UINT8 DAA_scratch[256];
- UINT8 DAA_stage;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST DAA_digestContext;
+ TPM_DIGEST DAA_digest;
+ TPM_DAA_CONTEXT_SEED DAA_contextSeed;
+ UINT8 DAA_scratch[256];
+ UINT8 DAA_stage;
} TPM_DAA_CONTEXT;
///
/// Part 2, section 22.6: TPM_DAA_JOINDATA
///
typedef struct tdTPM_DAA_JOINDATA {
- UINT8 DAA_join_u0[128];
- UINT8 DAA_join_u1[138];
- TPM_DIGEST DAA_digest_n0;
+ UINT8 DAA_join_u0[128];
+ UINT8 DAA_join_u1[138];
+ TPM_DIGEST DAA_digest_n0;
} TPM_DAA_JOINDATA;
///
/// Part 2, section 22.8: TPM_DAA_BLOB
///
typedef struct tdTPM_DAA_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_RESOURCE_TYPE resourceType;
- UINT8 label[16];
- TPM_DIGEST blobIntegrity;
- UINT32 additionalSize;
- UINT8 *additionalData;
- UINT32 sensitiveSize;
- UINT8 *sensitiveData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_RESOURCE_TYPE resourceType;
+ UINT8 label[16];
+ TPM_DIGEST blobIntegrity;
+ UINT32 additionalSize;
+ UINT8 *additionalData;
+ UINT32 sensitiveSize;
+ UINT8 *sensitiveData;
} TPM_DAA_BLOB;
///
/// Part 2, section 22.9: TPM_DAA_SENSITIVE
///
typedef struct tdTPM_DAA_SENSITIVE {
- TPM_STRUCTURE_TAG tag;
- UINT32 internalSize;
- UINT8 *internalData;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 internalSize;
+ UINT8 *internalData;
} TPM_DAA_SENSITIVE;
-
//
// Part 2, section 23: Redirection
//
@@ -2150,24 +2142,24 @@ typedef struct tdTPM_DAA_SENSITIVE {
/// refers to exactly one name but does not give its value. We join
/// them here.
///
-#define TPM_REDIR_GPIO (0x00000001)
+#define TPM_REDIR_GPIO (0x00000001)
///
/// TPM Command Headers defined in Part 3
///
typedef struct tdTPM_RQU_COMMAND_HDR {
- TPM_STRUCTURE_TAG tag;
- UINT32 paramSize;
- TPM_COMMAND_CODE ordinal;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 paramSize;
+ TPM_COMMAND_CODE ordinal;
} TPM_RQU_COMMAND_HDR;
///
/// TPM Response Headers defined in Part 3
///
typedef struct tdTPM_RSP_COMMAND_HDR {
- TPM_STRUCTURE_TAG tag;
- UINT32 paramSize;
- TPM_RESULT returnCode;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 paramSize;
+ TPM_RESULT returnCode;
} TPM_RSP_COMMAND_HDR;
#pragma pack ()
diff --git a/src/include/ipxe/efi/IndustryStandard/Tpm20.h b/src/include/ipxe/efi/IndustryStandard/Tpm20.h
index 656bf21eb..b314d6e91 100644
--- a/src/include/ipxe/efi/IndustryStandard/Tpm20.h
+++ b/src/include/ipxe/efi/IndustryStandard/Tpm20.h
@@ -6,21 +6,14 @@
Check http://trustedcomputinggroup.org for latest specification updates.
Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved. <BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef _TPM20_H_
#define _TPM20_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Tpm12.h>
@@ -29,121 +22,121 @@ FILE_LICENCE ( BSD3 );
// Annex A Algorithm Constants
// Table 205 - Defines for SHA1 Hash Values
-#define SHA1_DIGEST_SIZE 20
-#define SHA1_BLOCK_SIZE 64
+#define SHA1_DIGEST_SIZE 20
+#define SHA1_BLOCK_SIZE 64
// Table 206 - Defines for SHA256 Hash Values
-#define SHA256_DIGEST_SIZE 32
-#define SHA256_BLOCK_SIZE 64
+#define SHA256_DIGEST_SIZE 32
+#define SHA256_BLOCK_SIZE 64
// Table 207 - Defines for SHA384 Hash Values
-#define SHA384_DIGEST_SIZE 48
-#define SHA384_BLOCK_SIZE 128
+#define SHA384_DIGEST_SIZE 48
+#define SHA384_BLOCK_SIZE 128
// Table 208 - Defines for SHA512 Hash Values
-#define SHA512_DIGEST_SIZE 64
-#define SHA512_BLOCK_SIZE 128
+#define SHA512_DIGEST_SIZE 64
+#define SHA512_BLOCK_SIZE 128
// Table 209 - Defines for SM3_256 Hash Values
-#define SM3_256_DIGEST_SIZE 32
-#define SM3_256_BLOCK_SIZE 64
+#define SM3_256_DIGEST_SIZE 32
+#define SM3_256_BLOCK_SIZE 64
// Table 210 - Defines for Architectural Limits Values
-#define MAX_SESSION_NUMBER 3
+#define MAX_SESSION_NUMBER 3
// Annex B Implementation Definitions
// Table 211 - Defines for Logic Values
-#define YES 1
-#define NO 0
-#define SET 1
-#define CLEAR 0
+#define YES 1
+#define NO 0
+#define SET 1
+#define CLEAR 0
// Table 215 - Defines for RSA Algorithm Constants
-#define MAX_RSA_KEY_BITS 2048
-#define MAX_RSA_KEY_BYTES ((MAX_RSA_KEY_BITS + 7) / 8)
+#define MAX_RSA_KEY_BITS 2048
+#define MAX_RSA_KEY_BYTES ((MAX_RSA_KEY_BITS + 7) / 8)
// Table 216 - Defines for ECC Algorithm Constants
-#define MAX_ECC_KEY_BITS 256
-#define MAX_ECC_KEY_BYTES ((MAX_ECC_KEY_BITS + 7) / 8)
+#define MAX_ECC_KEY_BITS 256
+#define MAX_ECC_KEY_BYTES ((MAX_ECC_KEY_BITS + 7) / 8)
// Table 217 - Defines for AES Algorithm Constants
-#define MAX_AES_KEY_BITS 128
-#define MAX_AES_BLOCK_SIZE_BYTES 16
-#define MAX_AES_KEY_BYTES ((MAX_AES_KEY_BITS + 7) / 8)
+#define MAX_AES_KEY_BITS 128
+#define MAX_AES_BLOCK_SIZE_BYTES 16
+#define MAX_AES_KEY_BYTES ((MAX_AES_KEY_BITS + 7) / 8)
// Table 218 - Defines for SM4 Algorithm Constants
-#define MAX_SM4_KEY_BITS 128
-#define MAX_SM4_BLOCK_SIZE_BYTES 16
-#define MAX_SM4_KEY_BYTES ((MAX_SM4_KEY_BITS + 7) / 8)
+#define MAX_SM4_KEY_BITS 128
+#define MAX_SM4_BLOCK_SIZE_BYTES 16
+#define MAX_SM4_KEY_BYTES ((MAX_SM4_KEY_BITS + 7) / 8)
// Table 219 - Defines for Symmetric Algorithm Constants
-#define MAX_SYM_KEY_BITS MAX_AES_KEY_BITS
-#define MAX_SYM_KEY_BYTES MAX_AES_KEY_BYTES
-#define MAX_SYM_BLOCK_SIZE MAX_AES_BLOCK_SIZE_BYTES
+#define MAX_SYM_KEY_BITS MAX_AES_KEY_BITS
+#define MAX_SYM_KEY_BYTES MAX_AES_KEY_BYTES
+#define MAX_SYM_BLOCK_SIZE MAX_AES_BLOCK_SIZE_BYTES
// Table 220 - Defines for Implementation Values
-typedef UINT16 BSIZE;
-#define BUFFER_ALIGNMENT 4
-#define IMPLEMENTATION_PCR 24
-#define PLATFORM_PCR 24
-#define DRTM_PCR 17
-#define NUM_LOCALITIES 5
-#define MAX_HANDLE_NUM 3
-#define MAX_ACTIVE_SESSIONS 64
-typedef UINT16 CONTEXT_SLOT;
-typedef UINT64 CONTEXT_COUNTER;
-#define MAX_LOADED_SESSIONS 3
-#define MAX_SESSION_NUM 3
-#define MAX_LOADED_OBJECTS 3
-#define MIN_EVICT_OBJECTS 2
-#define PCR_SELECT_MIN ((PLATFORM_PCR + 7) / 8)
-#define PCR_SELECT_MAX ((IMPLEMENTATION_PCR + 7) / 8)
-#define NUM_POLICY_PCR_GROUP 1
-#define NUM_AUTHVALUE_PCR_GROUP 1
-#define MAX_CONTEXT_SIZE 4000
-#define MAX_DIGEST_BUFFER 1024
-#define MAX_NV_INDEX_SIZE 1024
-#define MAX_CAP_BUFFER 1024
-#define NV_MEMORY_SIZE 16384
-#define NUM_STATIC_PCR 16
-#define MAX_ALG_LIST_SIZE 64
-#define TIMER_PRESCALE 100000
-#define PRIMARY_SEED_SIZE 32
-#define CONTEXT_ENCRYPT_ALG TPM_ALG_AES
-#define CONTEXT_ENCRYPT_KEY_BITS MAX_SYM_KEY_BITS
-#define CONTEXT_ENCRYPT_KEY_BYTES ((CONTEXT_ENCRYPT_KEY_BITS + 7) / 8)
-#define CONTEXT_INTEGRITY_HASH_ALG TPM_ALG_SHA256
-#define CONTEXT_INTEGRITY_HASH_SIZE SHA256_DIGEST_SIZE
-#define PROOF_SIZE CONTEXT_INTEGRITY_HASH_SIZE
-#define NV_CLOCK_UPDATE_INTERVAL 12
-#define NUM_POLICY_PCR 1
-#define MAX_COMMAND_SIZE 4096
-#define MAX_RESPONSE_SIZE 4096
-#define ORDERLY_BITS 8
-#define MAX_ORDERLY_COUNT ((1 << ORDERLY_BITS) - 1)
-#define ALG_ID_FIRST TPM_ALG_FIRST
-#define ALG_ID_LAST TPM_ALG_LAST
-#define MAX_SYM_DATA 128
-#define MAX_RNG_ENTROPY_SIZE 64
-#define RAM_INDEX_SPACE 512
-#define RSA_DEFAULT_PUBLIC_EXPONENT 0x00010001
-#define CRT_FORMAT_RSA YES
-#define PRIVATE_VENDOR_SPECIFIC_BYTES ((MAX_RSA_KEY_BYTES / 2) * ( 3 + CRT_FORMAT_RSA * 2))
+typedef UINT16 BSIZE;
+#define BUFFER_ALIGNMENT 4
+#define IMPLEMENTATION_PCR 24
+#define PLATFORM_PCR 24
+#define DRTM_PCR 17
+#define NUM_LOCALITIES 5
+#define MAX_HANDLE_NUM 3
+#define MAX_ACTIVE_SESSIONS 64
+typedef UINT16 CONTEXT_SLOT;
+typedef UINT64 CONTEXT_COUNTER;
+#define MAX_LOADED_SESSIONS 3
+#define MAX_SESSION_NUM 3
+#define MAX_LOADED_OBJECTS 3
+#define MIN_EVICT_OBJECTS 2
+#define PCR_SELECT_MIN ((PLATFORM_PCR + 7) / 8)
+#define PCR_SELECT_MAX ((IMPLEMENTATION_PCR + 7) / 8)
+#define NUM_POLICY_PCR_GROUP 1
+#define NUM_AUTHVALUE_PCR_GROUP 1
+#define MAX_CONTEXT_SIZE 4000
+#define MAX_DIGEST_BUFFER 1024
+#define MAX_NV_INDEX_SIZE 1024
+#define MAX_CAP_BUFFER 1024
+#define NV_MEMORY_SIZE 16384
+#define NUM_STATIC_PCR 16
+#define MAX_ALG_LIST_SIZE 64
+#define TIMER_PRESCALE 100000
+#define PRIMARY_SEED_SIZE 32
+#define CONTEXT_ENCRYPT_ALG TPM_ALG_AES
+#define CONTEXT_ENCRYPT_KEY_BITS MAX_SYM_KEY_BITS
+#define CONTEXT_ENCRYPT_KEY_BYTES ((CONTEXT_ENCRYPT_KEY_BITS + 7) / 8)
+#define CONTEXT_INTEGRITY_HASH_ALG TPM_ALG_SHA256
+#define CONTEXT_INTEGRITY_HASH_SIZE SHA256_DIGEST_SIZE
+#define PROOF_SIZE CONTEXT_INTEGRITY_HASH_SIZE
+#define NV_CLOCK_UPDATE_INTERVAL 12
+#define NUM_POLICY_PCR 1
+#define MAX_COMMAND_SIZE 4096
+#define MAX_RESPONSE_SIZE 4096
+#define ORDERLY_BITS 8
+#define MAX_ORDERLY_COUNT ((1 << ORDERLY_BITS) - 1)
+#define ALG_ID_FIRST TPM_ALG_FIRST
+#define ALG_ID_LAST TPM_ALG_LAST
+#define MAX_SYM_DATA 128
+#define MAX_RNG_ENTROPY_SIZE 64
+#define RAM_INDEX_SPACE 512
+#define RSA_DEFAULT_PUBLIC_EXPONENT 0x00010001
+#define CRT_FORMAT_RSA YES
+#define PRIVATE_VENDOR_SPECIFIC_BYTES ((MAX_RSA_KEY_BYTES / 2) * ( 3 + CRT_FORMAT_RSA * 2))
// Capability related MAX_ value
-#define MAX_CAP_DATA (MAX_CAP_BUFFER - sizeof(TPM_CAP) - sizeof(UINT32))
-#define MAX_CAP_ALGS (MAX_CAP_DATA / sizeof(TPMS_ALG_PROPERTY))
-#define MAX_CAP_HANDLES (MAX_CAP_DATA / sizeof(TPM_HANDLE))
-#define MAX_CAP_CC (MAX_CAP_DATA / sizeof(TPM_CC))
-#define MAX_TPM_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PROPERTY))
-#define MAX_PCR_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PCR_SELECT))
-#define MAX_ECC_CURVES (MAX_CAP_DATA / sizeof(TPM_ECC_CURVE))
+#define MAX_CAP_DATA (MAX_CAP_BUFFER - sizeof(TPM_CAP) - sizeof(UINT32))
+#define MAX_CAP_ALGS (MAX_CAP_DATA / sizeof(TPMS_ALG_PROPERTY))
+#define MAX_CAP_HANDLES (MAX_CAP_DATA / sizeof(TPM_HANDLE))
+#define MAX_CAP_CC (MAX_CAP_DATA / sizeof(TPM_CC))
+#define MAX_TPM_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PROPERTY))
+#define MAX_PCR_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PCR_SELECT))
+#define MAX_ECC_CURVES (MAX_CAP_DATA / sizeof(TPM_ECC_CURVE))
//
// Always set 5 here, because we want to support all hash algo in BIOS.
//
-#define HASH_COUNT 5
+#define HASH_COUNT 5
// 5 Base Types
@@ -154,8 +147,8 @@ typedef UINT8 BYTE;
//
// NOTE: Comment because it has same name as TPM1.2 (value is same, so not runtime issue)
//
-//typedef UINT32 TPM_ALGORITHM_ID;
-//typedef UINT32 TPM_MODIFIER_INDICATOR;
+// typedef UINT32 TPM_ALGORITHM_ID;
+// typedef UINT32 TPM_MODIFIER_INDICATOR;
typedef UINT32 TPM_AUTHORIZATION_SIZE;
typedef UINT32 TPM_PARAMETER_SIZE;
typedef UINT16 TPM_KEY_SIZE;
@@ -165,481 +158,481 @@ typedef UINT16 TPM_KEY_BITS;
// Table 6 - TPM_GENERATED Constants
typedef UINT32 TPM_GENERATED;
-#define TPM_GENERATED_VALUE (TPM_GENERATED)(0xff544347)
+#define TPM_GENERATED_VALUE (TPM_GENERATED)(0xff544347)
// Table 7 - TPM_ALG_ID Constants
typedef UINT16 TPM_ALG_ID;
//
// NOTE: Comment some algo which has same name as TPM1.2 (value is same, so not runtime issue)
//
-#define TPM_ALG_ERROR (TPM_ALG_ID)(0x0000)
-#define TPM_ALG_FIRST (TPM_ALG_ID)(0x0001)
-//#define TPM_ALG_RSA (TPM_ALG_ID)(0x0001)
-//#define TPM_ALG_SHA (TPM_ALG_ID)(0x0004)
-#define TPM_ALG_SHA1 (TPM_ALG_ID)(0x0004)
-//#define TPM_ALG_HMAC (TPM_ALG_ID)(0x0005)
-#define TPM_ALG_AES (TPM_ALG_ID)(0x0006)
-//#define TPM_ALG_MGF1 (TPM_ALG_ID)(0x0007)
-#define TPM_ALG_KEYEDHASH (TPM_ALG_ID)(0x0008)
-//#define TPM_ALG_XOR (TPM_ALG_ID)(0x000A)
-#define TPM_ALG_SHA256 (TPM_ALG_ID)(0x000B)
-#define TPM_ALG_SHA384 (TPM_ALG_ID)(0x000C)
-#define TPM_ALG_SHA512 (TPM_ALG_ID)(0x000D)
-#define TPM_ALG_NULL (TPM_ALG_ID)(0x0010)
-#define TPM_ALG_SM3_256 (TPM_ALG_ID)(0x0012)
-#define TPM_ALG_SM4 (TPM_ALG_ID)(0x0013)
-#define TPM_ALG_RSASSA (TPM_ALG_ID)(0x0014)
-#define TPM_ALG_RSAES (TPM_ALG_ID)(0x0015)
-#define TPM_ALG_RSAPSS (TPM_ALG_ID)(0x0016)
-#define TPM_ALG_OAEP (TPM_ALG_ID)(0x0017)
-#define TPM_ALG_ECDSA (TPM_ALG_ID)(0x0018)
-#define TPM_ALG_ECDH (TPM_ALG_ID)(0x0019)
-#define TPM_ALG_ECDAA (TPM_ALG_ID)(0x001A)
-#define TPM_ALG_SM2 (TPM_ALG_ID)(0x001B)
-#define TPM_ALG_ECSCHNORR (TPM_ALG_ID)(0x001C)
-#define TPM_ALG_ECMQV (TPM_ALG_ID)(0x001D)
-#define TPM_ALG_KDF1_SP800_56a (TPM_ALG_ID)(0x0020)
-#define TPM_ALG_KDF2 (TPM_ALG_ID)(0x0021)
-#define TPM_ALG_KDF1_SP800_108 (TPM_ALG_ID)(0x0022)
-#define TPM_ALG_ECC (TPM_ALG_ID)(0x0023)
-#define TPM_ALG_SYMCIPHER (TPM_ALG_ID)(0x0025)
-#define TPM_ALG_CTR (TPM_ALG_ID)(0x0040)
-#define TPM_ALG_OFB (TPM_ALG_ID)(0x0041)
-#define TPM_ALG_CBC (TPM_ALG_ID)(0x0042)
-#define TPM_ALG_CFB (TPM_ALG_ID)(0x0043)
-#define TPM_ALG_ECB (TPM_ALG_ID)(0x0044)
-#define TPM_ALG_LAST (TPM_ALG_ID)(0x0044)
+#define TPM_ALG_ERROR (TPM_ALG_ID)(0x0000)
+#define TPM_ALG_FIRST (TPM_ALG_ID)(0x0001)
+// #define TPM_ALG_RSA (TPM_ALG_ID)(0x0001)
+// #define TPM_ALG_SHA (TPM_ALG_ID)(0x0004)
+#define TPM_ALG_SHA1 (TPM_ALG_ID)(0x0004)
+// #define TPM_ALG_HMAC (TPM_ALG_ID)(0x0005)
+#define TPM_ALG_AES (TPM_ALG_ID)(0x0006)
+// #define TPM_ALG_MGF1 (TPM_ALG_ID)(0x0007)
+#define TPM_ALG_KEYEDHASH (TPM_ALG_ID)(0x0008)
+// #define TPM_ALG_XOR (TPM_ALG_ID)(0x000A)
+#define TPM_ALG_SHA256 (TPM_ALG_ID)(0x000B)
+#define TPM_ALG_SHA384 (TPM_ALG_ID)(0x000C)
+#define TPM_ALG_SHA512 (TPM_ALG_ID)(0x000D)
+#define TPM_ALG_NULL (TPM_ALG_ID)(0x0010)
+#define TPM_ALG_SM3_256 (TPM_ALG_ID)(0x0012)
+#define TPM_ALG_SM4 (TPM_ALG_ID)(0x0013)
+#define TPM_ALG_RSASSA (TPM_ALG_ID)(0x0014)
+#define TPM_ALG_RSAES (TPM_ALG_ID)(0x0015)
+#define TPM_ALG_RSAPSS (TPM_ALG_ID)(0x0016)
+#define TPM_ALG_OAEP (TPM_ALG_ID)(0x0017)
+#define TPM_ALG_ECDSA (TPM_ALG_ID)(0x0018)
+#define TPM_ALG_ECDH (TPM_ALG_ID)(0x0019)
+#define TPM_ALG_ECDAA (TPM_ALG_ID)(0x001A)
+#define TPM_ALG_SM2 (TPM_ALG_ID)(0x001B)
+#define TPM_ALG_ECSCHNORR (TPM_ALG_ID)(0x001C)
+#define TPM_ALG_ECMQV (TPM_ALG_ID)(0x001D)
+#define TPM_ALG_KDF1_SP800_56a (TPM_ALG_ID)(0x0020)
+#define TPM_ALG_KDF2 (TPM_ALG_ID)(0x0021)
+#define TPM_ALG_KDF1_SP800_108 (TPM_ALG_ID)(0x0022)
+#define TPM_ALG_ECC (TPM_ALG_ID)(0x0023)
+#define TPM_ALG_SYMCIPHER (TPM_ALG_ID)(0x0025)
+#define TPM_ALG_CTR (TPM_ALG_ID)(0x0040)
+#define TPM_ALG_OFB (TPM_ALG_ID)(0x0041)
+#define TPM_ALG_CBC (TPM_ALG_ID)(0x0042)
+#define TPM_ALG_CFB (TPM_ALG_ID)(0x0043)
+#define TPM_ALG_ECB (TPM_ALG_ID)(0x0044)
+#define TPM_ALG_LAST (TPM_ALG_ID)(0x0044)
// Table 8 - TPM_ECC_CURVE Constants
typedef UINT16 TPM_ECC_CURVE;
-#define TPM_ECC_NONE (TPM_ECC_CURVE)(0x0000)
-#define TPM_ECC_NIST_P192 (TPM_ECC_CURVE)(0x0001)
-#define TPM_ECC_NIST_P224 (TPM_ECC_CURVE)(0x0002)
-#define TPM_ECC_NIST_P256 (TPM_ECC_CURVE)(0x0003)
-#define TPM_ECC_NIST_P384 (TPM_ECC_CURVE)(0x0004)
-#define TPM_ECC_NIST_P521 (TPM_ECC_CURVE)(0x0005)
-#define TPM_ECC_BN_P256 (TPM_ECC_CURVE)(0x0010)
-#define TPM_ECC_BN_P638 (TPM_ECC_CURVE)(0x0011)
-#define TPM_ECC_SM2_P256 (TPM_ECC_CURVE)(0x0020)
+#define TPM_ECC_NONE (TPM_ECC_CURVE)(0x0000)
+#define TPM_ECC_NIST_P192 (TPM_ECC_CURVE)(0x0001)
+#define TPM_ECC_NIST_P224 (TPM_ECC_CURVE)(0x0002)
+#define TPM_ECC_NIST_P256 (TPM_ECC_CURVE)(0x0003)
+#define TPM_ECC_NIST_P384 (TPM_ECC_CURVE)(0x0004)
+#define TPM_ECC_NIST_P521 (TPM_ECC_CURVE)(0x0005)
+#define TPM_ECC_BN_P256 (TPM_ECC_CURVE)(0x0010)
+#define TPM_ECC_BN_P638 (TPM_ECC_CURVE)(0x0011)
+#define TPM_ECC_SM2_P256 (TPM_ECC_CURVE)(0x0020)
// Table 11 - TPM_CC Constants (Numeric Order)
typedef UINT32 TPM_CC;
-#define TPM_CC_FIRST (TPM_CC)(0x0000011F)
-#define TPM_CC_PP_FIRST (TPM_CC)(0x0000011F)
-#define TPM_CC_NV_UndefineSpaceSpecial (TPM_CC)(0x0000011F)
-#define TPM_CC_EvictControl (TPM_CC)(0x00000120)
-#define TPM_CC_HierarchyControl (TPM_CC)(0x00000121)
-#define TPM_CC_NV_UndefineSpace (TPM_CC)(0x00000122)
-#define TPM_CC_ChangeEPS (TPM_CC)(0x00000124)
-#define TPM_CC_ChangePPS (TPM_CC)(0x00000125)
-#define TPM_CC_Clear (TPM_CC)(0x00000126)
-#define TPM_CC_ClearControl (TPM_CC)(0x00000127)
-#define TPM_CC_ClockSet (TPM_CC)(0x00000128)
-#define TPM_CC_HierarchyChangeAuth (TPM_CC)(0x00000129)
-#define TPM_CC_NV_DefineSpace (TPM_CC)(0x0000012A)
-#define TPM_CC_PCR_Allocate (TPM_CC)(0x0000012B)
-#define TPM_CC_PCR_SetAuthPolicy (TPM_CC)(0x0000012C)
-#define TPM_CC_PP_Commands (TPM_CC)(0x0000012D)
-#define TPM_CC_SetPrimaryPolicy (TPM_CC)(0x0000012E)
-#define TPM_CC_FieldUpgradeStart (TPM_CC)(0x0000012F)
-#define TPM_CC_ClockRateAdjust (TPM_CC)(0x00000130)
-#define TPM_CC_CreatePrimary (TPM_CC)(0x00000131)
-#define TPM_CC_NV_GlobalWriteLock (TPM_CC)(0x00000132)
-#define TPM_CC_PP_LAST (TPM_CC)(0x00000132)
-#define TPM_CC_GetCommandAuditDigest (TPM_CC)(0x00000133)
-#define TPM_CC_NV_Increment (TPM_CC)(0x00000134)
-#define TPM_CC_NV_SetBits (TPM_CC)(0x00000135)
-#define TPM_CC_NV_Extend (TPM_CC)(0x00000136)
-#define TPM_CC_NV_Write (TPM_CC)(0x00000137)
-#define TPM_CC_NV_WriteLock (TPM_CC)(0x00000138)
-#define TPM_CC_DictionaryAttackLockReset (TPM_CC)(0x00000139)
-#define TPM_CC_DictionaryAttackParameters (TPM_CC)(0x0000013A)
-#define TPM_CC_NV_ChangeAuth (TPM_CC)(0x0000013B)
-#define TPM_CC_PCR_Event (TPM_CC)(0x0000013C)
-#define TPM_CC_PCR_Reset (TPM_CC)(0x0000013D)
-#define TPM_CC_SequenceComplete (TPM_CC)(0x0000013E)
-#define TPM_CC_SetAlgorithmSet (TPM_CC)(0x0000013F)
-#define TPM_CC_SetCommandCodeAuditStatus (TPM_CC)(0x00000140)
-#define TPM_CC_FieldUpgradeData (TPM_CC)(0x00000141)
-#define TPM_CC_IncrementalSelfTest (TPM_CC)(0x00000142)
-#define TPM_CC_SelfTest (TPM_CC)(0x00000143)
-#define TPM_CC_Startup (TPM_CC)(0x00000144)
-#define TPM_CC_Shutdown (TPM_CC)(0x00000145)
-#define TPM_CC_StirRandom (TPM_CC)(0x00000146)
-#define TPM_CC_ActivateCredential (TPM_CC)(0x00000147)
-#define TPM_CC_Certify (TPM_CC)(0x00000148)
-#define TPM_CC_PolicyNV (TPM_CC)(0x00000149)
-#define TPM_CC_CertifyCreation (TPM_CC)(0x0000014A)
-#define TPM_CC_Duplicate (TPM_CC)(0x0000014B)
-#define TPM_CC_GetTime (TPM_CC)(0x0000014C)
-#define TPM_CC_GetSessionAuditDigest (TPM_CC)(0x0000014D)
-#define TPM_CC_NV_Read (TPM_CC)(0x0000014E)
-#define TPM_CC_NV_ReadLock (TPM_CC)(0x0000014F)
-#define TPM_CC_ObjectChangeAuth (TPM_CC)(0x00000150)
-#define TPM_CC_PolicySecret (TPM_CC)(0x00000151)
-#define TPM_CC_Rewrap (TPM_CC)(0x00000152)
-#define TPM_CC_Create (TPM_CC)(0x00000153)
-#define TPM_CC_ECDH_ZGen (TPM_CC)(0x00000154)
-#define TPM_CC_HMAC (TPM_CC)(0x00000155)
-#define TPM_CC_Import (TPM_CC)(0x00000156)
-#define TPM_CC_Load (TPM_CC)(0x00000157)
-#define TPM_CC_Quote (TPM_CC)(0x00000158)
-#define TPM_CC_RSA_Decrypt (TPM_CC)(0x00000159)
-#define TPM_CC_HMAC_Start (TPM_CC)(0x0000015B)
-#define TPM_CC_SequenceUpdate (TPM_CC)(0x0000015C)
-#define TPM_CC_Sign (TPM_CC)(0x0000015D)
-#define TPM_CC_Unseal (TPM_CC)(0x0000015E)
-#define TPM_CC_PolicySigned (TPM_CC)(0x00000160)
-#define TPM_CC_ContextLoad (TPM_CC)(0x00000161)
-#define TPM_CC_ContextSave (TPM_CC)(0x00000162)
-#define TPM_CC_ECDH_KeyGen (TPM_CC)(0x00000163)
-#define TPM_CC_EncryptDecrypt (TPM_CC)(0x00000164)
-#define TPM_CC_FlushContext (TPM_CC)(0x00000165)
-#define TPM_CC_LoadExternal (TPM_CC)(0x00000167)
-#define TPM_CC_MakeCredential (TPM_CC)(0x00000168)
-#define TPM_CC_NV_ReadPublic (TPM_CC)(0x00000169)
-#define TPM_CC_PolicyAuthorize (TPM_CC)(0x0000016A)
-#define TPM_CC_PolicyAuthValue (TPM_CC)(0x0000016B)
-#define TPM_CC_PolicyCommandCode (TPM_CC)(0x0000016C)
-#define TPM_CC_PolicyCounterTimer (TPM_CC)(0x0000016D)
-#define TPM_CC_PolicyCpHash (TPM_CC)(0x0000016E)
-#define TPM_CC_PolicyLocality (TPM_CC)(0x0000016F)
-#define TPM_CC_PolicyNameHash (TPM_CC)(0x00000170)
-#define TPM_CC_PolicyOR (TPM_CC)(0x00000171)
-#define TPM_CC_PolicyTicket (TPM_CC)(0x00000172)
-#define TPM_CC_ReadPublic (TPM_CC)(0x00000173)
-#define TPM_CC_RSA_Encrypt (TPM_CC)(0x00000174)
-#define TPM_CC_StartAuthSession (TPM_CC)(0x00000176)
-#define TPM_CC_VerifySignature (TPM_CC)(0x00000177)
-#define TPM_CC_ECC_Parameters (TPM_CC)(0x00000178)
-#define TPM_CC_FirmwareRead (TPM_CC)(0x00000179)
-#define TPM_CC_GetCapability (TPM_CC)(0x0000017A)
-#define TPM_CC_GetRandom (TPM_CC)(0x0000017B)
-#define TPM_CC_GetTestResult (TPM_CC)(0x0000017C)
-#define TPM_CC_Hash (TPM_CC)(0x0000017D)
-#define TPM_CC_PCR_Read (TPM_CC)(0x0000017E)
-#define TPM_CC_PolicyPCR (TPM_CC)(0x0000017F)
-#define TPM_CC_PolicyRestart (TPM_CC)(0x00000180)
-#define TPM_CC_ReadClock (TPM_CC)(0x00000181)
-#define TPM_CC_PCR_Extend (TPM_CC)(0x00000182)
-#define TPM_CC_PCR_SetAuthValue (TPM_CC)(0x00000183)
-#define TPM_CC_NV_Certify (TPM_CC)(0x00000184)
-#define TPM_CC_EventSequenceComplete (TPM_CC)(0x00000185)
-#define TPM_CC_HashSequenceStart (TPM_CC)(0x00000186)
-#define TPM_CC_PolicyPhysicalPresence (TPM_CC)(0x00000187)
-#define TPM_CC_PolicyDuplicationSelect (TPM_CC)(0x00000188)
-#define TPM_CC_PolicyGetDigest (TPM_CC)(0x00000189)
-#define TPM_CC_TestParms (TPM_CC)(0x0000018A)
-#define TPM_CC_Commit (TPM_CC)(0x0000018B)
-#define TPM_CC_PolicyPassword (TPM_CC)(0x0000018C)
-#define TPM_CC_ZGen_2Phase (TPM_CC)(0x0000018D)
-#define TPM_CC_EC_Ephemeral (TPM_CC)(0x0000018E)
-#define TPM_CC_LAST (TPM_CC)(0x0000018E)
+#define TPM_CC_FIRST (TPM_CC)(0x0000011F)
+#define TPM_CC_PP_FIRST (TPM_CC)(0x0000011F)
+#define TPM_CC_NV_UndefineSpaceSpecial (TPM_CC)(0x0000011F)
+#define TPM_CC_EvictControl (TPM_CC)(0x00000120)
+#define TPM_CC_HierarchyControl (TPM_CC)(0x00000121)
+#define TPM_CC_NV_UndefineSpace (TPM_CC)(0x00000122)
+#define TPM_CC_ChangeEPS (TPM_CC)(0x00000124)
+#define TPM_CC_ChangePPS (TPM_CC)(0x00000125)
+#define TPM_CC_Clear (TPM_CC)(0x00000126)
+#define TPM_CC_ClearControl (TPM_CC)(0x00000127)
+#define TPM_CC_ClockSet (TPM_CC)(0x00000128)
+#define TPM_CC_HierarchyChangeAuth (TPM_CC)(0x00000129)
+#define TPM_CC_NV_DefineSpace (TPM_CC)(0x0000012A)
+#define TPM_CC_PCR_Allocate (TPM_CC)(0x0000012B)
+#define TPM_CC_PCR_SetAuthPolicy (TPM_CC)(0x0000012C)
+#define TPM_CC_PP_Commands (TPM_CC)(0x0000012D)
+#define TPM_CC_SetPrimaryPolicy (TPM_CC)(0x0000012E)
+#define TPM_CC_FieldUpgradeStart (TPM_CC)(0x0000012F)
+#define TPM_CC_ClockRateAdjust (TPM_CC)(0x00000130)
+#define TPM_CC_CreatePrimary (TPM_CC)(0x00000131)
+#define TPM_CC_NV_GlobalWriteLock (TPM_CC)(0x00000132)
+#define TPM_CC_PP_LAST (TPM_CC)(0x00000132)
+#define TPM_CC_GetCommandAuditDigest (TPM_CC)(0x00000133)
+#define TPM_CC_NV_Increment (TPM_CC)(0x00000134)
+#define TPM_CC_NV_SetBits (TPM_CC)(0x00000135)
+#define TPM_CC_NV_Extend (TPM_CC)(0x00000136)
+#define TPM_CC_NV_Write (TPM_CC)(0x00000137)
+#define TPM_CC_NV_WriteLock (TPM_CC)(0x00000138)
+#define TPM_CC_DictionaryAttackLockReset (TPM_CC)(0x00000139)
+#define TPM_CC_DictionaryAttackParameters (TPM_CC)(0x0000013A)
+#define TPM_CC_NV_ChangeAuth (TPM_CC)(0x0000013B)
+#define TPM_CC_PCR_Event (TPM_CC)(0x0000013C)
+#define TPM_CC_PCR_Reset (TPM_CC)(0x0000013D)
+#define TPM_CC_SequenceComplete (TPM_CC)(0x0000013E)
+#define TPM_CC_SetAlgorithmSet (TPM_CC)(0x0000013F)
+#define TPM_CC_SetCommandCodeAuditStatus (TPM_CC)(0x00000140)
+#define TPM_CC_FieldUpgradeData (TPM_CC)(0x00000141)
+#define TPM_CC_IncrementalSelfTest (TPM_CC)(0x00000142)
+#define TPM_CC_SelfTest (TPM_CC)(0x00000143)
+#define TPM_CC_Startup (TPM_CC)(0x00000144)
+#define TPM_CC_Shutdown (TPM_CC)(0x00000145)
+#define TPM_CC_StirRandom (TPM_CC)(0x00000146)
+#define TPM_CC_ActivateCredential (TPM_CC)(0x00000147)
+#define TPM_CC_Certify (TPM_CC)(0x00000148)
+#define TPM_CC_PolicyNV (TPM_CC)(0x00000149)
+#define TPM_CC_CertifyCreation (TPM_CC)(0x0000014A)
+#define TPM_CC_Duplicate (TPM_CC)(0x0000014B)
+#define TPM_CC_GetTime (TPM_CC)(0x0000014C)
+#define TPM_CC_GetSessionAuditDigest (TPM_CC)(0x0000014D)
+#define TPM_CC_NV_Read (TPM_CC)(0x0000014E)
+#define TPM_CC_NV_ReadLock (TPM_CC)(0x0000014F)
+#define TPM_CC_ObjectChangeAuth (TPM_CC)(0x00000150)
+#define TPM_CC_PolicySecret (TPM_CC)(0x00000151)
+#define TPM_CC_Rewrap (TPM_CC)(0x00000152)
+#define TPM_CC_Create (TPM_CC)(0x00000153)
+#define TPM_CC_ECDH_ZGen (TPM_CC)(0x00000154)
+#define TPM_CC_HMAC (TPM_CC)(0x00000155)
+#define TPM_CC_Import (TPM_CC)(0x00000156)
+#define TPM_CC_Load (TPM_CC)(0x00000157)
+#define TPM_CC_Quote (TPM_CC)(0x00000158)
+#define TPM_CC_RSA_Decrypt (TPM_CC)(0x00000159)
+#define TPM_CC_HMAC_Start (TPM_CC)(0x0000015B)
+#define TPM_CC_SequenceUpdate (TPM_CC)(0x0000015C)
+#define TPM_CC_Sign (TPM_CC)(0x0000015D)
+#define TPM_CC_Unseal (TPM_CC)(0x0000015E)
+#define TPM_CC_PolicySigned (TPM_CC)(0x00000160)
+#define TPM_CC_ContextLoad (TPM_CC)(0x00000161)
+#define TPM_CC_ContextSave (TPM_CC)(0x00000162)
+#define TPM_CC_ECDH_KeyGen (TPM_CC)(0x00000163)
+#define TPM_CC_EncryptDecrypt (TPM_CC)(0x00000164)
+#define TPM_CC_FlushContext (TPM_CC)(0x00000165)
+#define TPM_CC_LoadExternal (TPM_CC)(0x00000167)
+#define TPM_CC_MakeCredential (TPM_CC)(0x00000168)
+#define TPM_CC_NV_ReadPublic (TPM_CC)(0x00000169)
+#define TPM_CC_PolicyAuthorize (TPM_CC)(0x0000016A)
+#define TPM_CC_PolicyAuthValue (TPM_CC)(0x0000016B)
+#define TPM_CC_PolicyCommandCode (TPM_CC)(0x0000016C)
+#define TPM_CC_PolicyCounterTimer (TPM_CC)(0x0000016D)
+#define TPM_CC_PolicyCpHash (TPM_CC)(0x0000016E)
+#define TPM_CC_PolicyLocality (TPM_CC)(0x0000016F)
+#define TPM_CC_PolicyNameHash (TPM_CC)(0x00000170)
+#define TPM_CC_PolicyOR (TPM_CC)(0x00000171)
+#define TPM_CC_PolicyTicket (TPM_CC)(0x00000172)
+#define TPM_CC_ReadPublic (TPM_CC)(0x00000173)
+#define TPM_CC_RSA_Encrypt (TPM_CC)(0x00000174)
+#define TPM_CC_StartAuthSession (TPM_CC)(0x00000176)
+#define TPM_CC_VerifySignature (TPM_CC)(0x00000177)
+#define TPM_CC_ECC_Parameters (TPM_CC)(0x00000178)
+#define TPM_CC_FirmwareRead (TPM_CC)(0x00000179)
+#define TPM_CC_GetCapability (TPM_CC)(0x0000017A)
+#define TPM_CC_GetRandom (TPM_CC)(0x0000017B)
+#define TPM_CC_GetTestResult (TPM_CC)(0x0000017C)
+#define TPM_CC_Hash (TPM_CC)(0x0000017D)
+#define TPM_CC_PCR_Read (TPM_CC)(0x0000017E)
+#define TPM_CC_PolicyPCR (TPM_CC)(0x0000017F)
+#define TPM_CC_PolicyRestart (TPM_CC)(0x00000180)
+#define TPM_CC_ReadClock (TPM_CC)(0x00000181)
+#define TPM_CC_PCR_Extend (TPM_CC)(0x00000182)
+#define TPM_CC_PCR_SetAuthValue (TPM_CC)(0x00000183)
+#define TPM_CC_NV_Certify (TPM_CC)(0x00000184)
+#define TPM_CC_EventSequenceComplete (TPM_CC)(0x00000185)
+#define TPM_CC_HashSequenceStart (TPM_CC)(0x00000186)
+#define TPM_CC_PolicyPhysicalPresence (TPM_CC)(0x00000187)
+#define TPM_CC_PolicyDuplicationSelect (TPM_CC)(0x00000188)
+#define TPM_CC_PolicyGetDigest (TPM_CC)(0x00000189)
+#define TPM_CC_TestParms (TPM_CC)(0x0000018A)
+#define TPM_CC_Commit (TPM_CC)(0x0000018B)
+#define TPM_CC_PolicyPassword (TPM_CC)(0x0000018C)
+#define TPM_CC_ZGen_2Phase (TPM_CC)(0x0000018D)
+#define TPM_CC_EC_Ephemeral (TPM_CC)(0x0000018E)
+#define TPM_CC_LAST (TPM_CC)(0x0000018E)
// Table 15 - TPM_RC Constants (Actions)
typedef UINT32 TPM_RC;
-#define TPM_RC_SUCCESS (TPM_RC)(0x000)
-#define TPM_RC_BAD_TAG (TPM_RC)(0x030)
-#define RC_VER1 (TPM_RC)(0x100)
-#define TPM_RC_INITIALIZE (TPM_RC)(RC_VER1 + 0x000)
-#define TPM_RC_FAILURE (TPM_RC)(RC_VER1 + 0x001)
-#define TPM_RC_SEQUENCE (TPM_RC)(RC_VER1 + 0x003)
-#define TPM_RC_PRIVATE (TPM_RC)(RC_VER1 + 0x00B)
-#define TPM_RC_HMAC (TPM_RC)(RC_VER1 + 0x019)
-#define TPM_RC_DISABLED (TPM_RC)(RC_VER1 + 0x020)
-#define TPM_RC_EXCLUSIVE (TPM_RC)(RC_VER1 + 0x021)
-#define TPM_RC_AUTH_TYPE (TPM_RC)(RC_VER1 + 0x024)
-#define TPM_RC_AUTH_MISSING (TPM_RC)(RC_VER1 + 0x025)
-#define TPM_RC_POLICY (TPM_RC)(RC_VER1 + 0x026)
-#define TPM_RC_PCR (TPM_RC)(RC_VER1 + 0x027)
-#define TPM_RC_PCR_CHANGED (TPM_RC)(RC_VER1 + 0x028)
-#define TPM_RC_UPGRADE (TPM_RC)(RC_VER1 + 0x02D)
-#define TPM_RC_TOO_MANY_CONTEXTS (TPM_RC)(RC_VER1 + 0x02E)
-#define TPM_RC_AUTH_UNAVAILABLE (TPM_RC)(RC_VER1 + 0x02F)
-#define TPM_RC_REBOOT (TPM_RC)(RC_VER1 + 0x030)
-#define TPM_RC_UNBALANCED (TPM_RC)(RC_VER1 + 0x031)
-#define TPM_RC_COMMAND_SIZE (TPM_RC)(RC_VER1 + 0x042)
-#define TPM_RC_COMMAND_CODE (TPM_RC)(RC_VER1 + 0x043)
-#define TPM_RC_AUTHSIZE (TPM_RC)(RC_VER1 + 0x044)
-#define TPM_RC_AUTH_CONTEXT (TPM_RC)(RC_VER1 + 0x045)
-#define TPM_RC_NV_RANGE (TPM_RC)(RC_VER1 + 0x046)
-#define TPM_RC_NV_SIZE (TPM_RC)(RC_VER1 + 0x047)
-#define TPM_RC_NV_LOCKED (TPM_RC)(RC_VER1 + 0x048)
-#define TPM_RC_NV_AUTHORIZATION (TPM_RC)(RC_VER1 + 0x049)
-#define TPM_RC_NV_UNINITIALIZED (TPM_RC)(RC_VER1 + 0x04A)
-#define TPM_RC_NV_SPACE (TPM_RC)(RC_VER1 + 0x04B)
-#define TPM_RC_NV_DEFINED (TPM_RC)(RC_VER1 + 0x04C)
-#define TPM_RC_BAD_CONTEXT (TPM_RC)(RC_VER1 + 0x050)
-#define TPM_RC_CPHASH (TPM_RC)(RC_VER1 + 0x051)
-#define TPM_RC_PARENT (TPM_RC)(RC_VER1 + 0x052)
-#define TPM_RC_NEEDS_TEST (TPM_RC)(RC_VER1 + 0x053)
-#define TPM_RC_NO_RESULT (TPM_RC)(RC_VER1 + 0x054)
-#define TPM_RC_SENSITIVE (TPM_RC)(RC_VER1 + 0x055)
-#define RC_MAX_FM0 (TPM_RC)(RC_VER1 + 0x07F)
-#define RC_FMT1 (TPM_RC)(0x080)
-#define TPM_RC_ASYMMETRIC (TPM_RC)(RC_FMT1 + 0x001)
-#define TPM_RC_ATTRIBUTES (TPM_RC)(RC_FMT1 + 0x002)
-#define TPM_RC_HASH (TPM_RC)(RC_FMT1 + 0x003)
-#define TPM_RC_VALUE (TPM_RC)(RC_FMT1 + 0x004)
-#define TPM_RC_HIERARCHY (TPM_RC)(RC_FMT1 + 0x005)
-#define TPM_RC_KEY_SIZE (TPM_RC)(RC_FMT1 + 0x007)
-#define TPM_RC_MGF (TPM_RC)(RC_FMT1 + 0x008)
-#define TPM_RC_MODE (TPM_RC)(RC_FMT1 + 0x009)
-#define TPM_RC_TYPE (TPM_RC)(RC_FMT1 + 0x00A)
-#define TPM_RC_HANDLE (TPM_RC)(RC_FMT1 + 0x00B)
-#define TPM_RC_KDF (TPM_RC)(RC_FMT1 + 0x00C)
-#define TPM_RC_RANGE (TPM_RC)(RC_FMT1 + 0x00D)
-#define TPM_RC_AUTH_FAIL (TPM_RC)(RC_FMT1 + 0x00E)
-#define TPM_RC_NONCE (TPM_RC)(RC_FMT1 + 0x00F)
-#define TPM_RC_PP (TPM_RC)(RC_FMT1 + 0x010)
-#define TPM_RC_SCHEME (TPM_RC)(RC_FMT1 + 0x012)
-#define TPM_RC_SIZE (TPM_RC)(RC_FMT1 + 0x015)
-#define TPM_RC_SYMMETRIC (TPM_RC)(RC_FMT1 + 0x016)
-#define TPM_RC_TAG (TPM_RC)(RC_FMT1 + 0x017)
-#define TPM_RC_SELECTOR (TPM_RC)(RC_FMT1 + 0x018)
-#define TPM_RC_INSUFFICIENT (TPM_RC)(RC_FMT1 + 0x01A)
-#define TPM_RC_SIGNATURE (TPM_RC)(RC_FMT1 + 0x01B)
-#define TPM_RC_KEY (TPM_RC)(RC_FMT1 + 0x01C)
-#define TPM_RC_POLICY_FAIL (TPM_RC)(RC_FMT1 + 0x01D)
-#define TPM_RC_INTEGRITY (TPM_RC)(RC_FMT1 + 0x01F)
-#define TPM_RC_TICKET (TPM_RC)(RC_FMT1 + 0x020)
-#define TPM_RC_RESERVED_BITS (TPM_RC)(RC_FMT1 + 0x021)
-#define TPM_RC_BAD_AUTH (TPM_RC)(RC_FMT1 + 0x022)
-#define TPM_RC_EXPIRED (TPM_RC)(RC_FMT1 + 0x023)
-#define TPM_RC_POLICY_CC (TPM_RC)(RC_FMT1 + 0x024 )
-#define TPM_RC_BINDING (TPM_RC)(RC_FMT1 + 0x025)
-#define TPM_RC_CURVE (TPM_RC)(RC_FMT1 + 0x026)
-#define TPM_RC_ECC_POINT (TPM_RC)(RC_FMT1 + 0x027)
-#define RC_WARN (TPM_RC)(0x900)
-#define TPM_RC_CONTEXT_GAP (TPM_RC)(RC_WARN + 0x001)
-#define TPM_RC_OBJECT_MEMORY (TPM_RC)(RC_WARN + 0x002)
-#define TPM_RC_SESSION_MEMORY (TPM_RC)(RC_WARN + 0x003)
-#define TPM_RC_MEMORY (TPM_RC)(RC_WARN + 0x004)
-#define TPM_RC_SESSION_HANDLES (TPM_RC)(RC_WARN + 0x005)
-#define TPM_RC_OBJECT_HANDLES (TPM_RC)(RC_WARN + 0x006)
-#define TPM_RC_LOCALITY (TPM_RC)(RC_WARN + 0x007)
-#define TPM_RC_YIELDED (TPM_RC)(RC_WARN + 0x008)
-#define TPM_RC_CANCELED (TPM_RC)(RC_WARN + 0x009)
-#define TPM_RC_TESTING (TPM_RC)(RC_WARN + 0x00A)
-#define TPM_RC_REFERENCE_H0 (TPM_RC)(RC_WARN + 0x010)
-#define TPM_RC_REFERENCE_H1 (TPM_RC)(RC_WARN + 0x011)
-#define TPM_RC_REFERENCE_H2 (TPM_RC)(RC_WARN + 0x012)
-#define TPM_RC_REFERENCE_H3 (TPM_RC)(RC_WARN + 0x013)
-#define TPM_RC_REFERENCE_H4 (TPM_RC)(RC_WARN + 0x014)
-#define TPM_RC_REFERENCE_H5 (TPM_RC)(RC_WARN + 0x015)
-#define TPM_RC_REFERENCE_H6 (TPM_RC)(RC_WARN + 0x016)
-#define TPM_RC_REFERENCE_S0 (TPM_RC)(RC_WARN + 0x018)
-#define TPM_RC_REFERENCE_S1 (TPM_RC)(RC_WARN + 0x019)
-#define TPM_RC_REFERENCE_S2 (TPM_RC)(RC_WARN + 0x01A)
-#define TPM_RC_REFERENCE_S3 (TPM_RC)(RC_WARN + 0x01B)
-#define TPM_RC_REFERENCE_S4 (TPM_RC)(RC_WARN + 0x01C)
-#define TPM_RC_REFERENCE_S5 (TPM_RC)(RC_WARN + 0x01D)
-#define TPM_RC_REFERENCE_S6 (TPM_RC)(RC_WARN + 0x01E)
-#define TPM_RC_NV_RATE (TPM_RC)(RC_WARN + 0x020)
-#define TPM_RC_LOCKOUT (TPM_RC)(RC_WARN + 0x021)
-#define TPM_RC_RETRY (TPM_RC)(RC_WARN + 0x022)
-#define TPM_RC_NV_UNAVAILABLE (TPM_RC)(RC_WARN + 0x023)
-#define TPM_RC_NOT_USED (TPM_RC)(RC_WARN + 0x7F)
-#define TPM_RC_H (TPM_RC)(0x000)
-#define TPM_RC_P (TPM_RC)(0x040)
-#define TPM_RC_S (TPM_RC)(0x800)
-#define TPM_RC_1 (TPM_RC)(0x100)
-#define TPM_RC_2 (TPM_RC)(0x200)
-#define TPM_RC_3 (TPM_RC)(0x300)
-#define TPM_RC_4 (TPM_RC)(0x400)
-#define TPM_RC_5 (TPM_RC)(0x500)
-#define TPM_RC_6 (TPM_RC)(0x600)
-#define TPM_RC_7 (TPM_RC)(0x700)
-#define TPM_RC_8 (TPM_RC)(0x800)
-#define TPM_RC_9 (TPM_RC)(0x900)
-#define TPM_RC_A (TPM_RC)(0xA00)
-#define TPM_RC_B (TPM_RC)(0xB00)
-#define TPM_RC_C (TPM_RC)(0xC00)
-#define TPM_RC_D (TPM_RC)(0xD00)
-#define TPM_RC_E (TPM_RC)(0xE00)
-#define TPM_RC_F (TPM_RC)(0xF00)
-#define TPM_RC_N_MASK (TPM_RC)(0xF00)
+#define TPM_RC_SUCCESS (TPM_RC)(0x000)
+#define TPM_RC_BAD_TAG (TPM_RC)(0x030)
+#define RC_VER1 (TPM_RC)(0x100)
+#define TPM_RC_INITIALIZE (TPM_RC)(RC_VER1 + 0x000)
+#define TPM_RC_FAILURE (TPM_RC)(RC_VER1 + 0x001)
+#define TPM_RC_SEQUENCE (TPM_RC)(RC_VER1 + 0x003)
+#define TPM_RC_PRIVATE (TPM_RC)(RC_VER1 + 0x00B)
+#define TPM_RC_HMAC (TPM_RC)(RC_VER1 + 0x019)
+#define TPM_RC_DISABLED (TPM_RC)(RC_VER1 + 0x020)
+#define TPM_RC_EXCLUSIVE (TPM_RC)(RC_VER1 + 0x021)
+#define TPM_RC_AUTH_TYPE (TPM_RC)(RC_VER1 + 0x024)
+#define TPM_RC_AUTH_MISSING (TPM_RC)(RC_VER1 + 0x025)
+#define TPM_RC_POLICY (TPM_RC)(RC_VER1 + 0x026)
+#define TPM_RC_PCR (TPM_RC)(RC_VER1 + 0x027)
+#define TPM_RC_PCR_CHANGED (TPM_RC)(RC_VER1 + 0x028)
+#define TPM_RC_UPGRADE (TPM_RC)(RC_VER1 + 0x02D)
+#define TPM_RC_TOO_MANY_CONTEXTS (TPM_RC)(RC_VER1 + 0x02E)
+#define TPM_RC_AUTH_UNAVAILABLE (TPM_RC)(RC_VER1 + 0x02F)
+#define TPM_RC_REBOOT (TPM_RC)(RC_VER1 + 0x030)
+#define TPM_RC_UNBALANCED (TPM_RC)(RC_VER1 + 0x031)
+#define TPM_RC_COMMAND_SIZE (TPM_RC)(RC_VER1 + 0x042)
+#define TPM_RC_COMMAND_CODE (TPM_RC)(RC_VER1 + 0x043)
+#define TPM_RC_AUTHSIZE (TPM_RC)(RC_VER1 + 0x044)
+#define TPM_RC_AUTH_CONTEXT (TPM_RC)(RC_VER1 + 0x045)
+#define TPM_RC_NV_RANGE (TPM_RC)(RC_VER1 + 0x046)
+#define TPM_RC_NV_SIZE (TPM_RC)(RC_VER1 + 0x047)
+#define TPM_RC_NV_LOCKED (TPM_RC)(RC_VER1 + 0x048)
+#define TPM_RC_NV_AUTHORIZATION (TPM_RC)(RC_VER1 + 0x049)
+#define TPM_RC_NV_UNINITIALIZED (TPM_RC)(RC_VER1 + 0x04A)
+#define TPM_RC_NV_SPACE (TPM_RC)(RC_VER1 + 0x04B)
+#define TPM_RC_NV_DEFINED (TPM_RC)(RC_VER1 + 0x04C)
+#define TPM_RC_BAD_CONTEXT (TPM_RC)(RC_VER1 + 0x050)
+#define TPM_RC_CPHASH (TPM_RC)(RC_VER1 + 0x051)
+#define TPM_RC_PARENT (TPM_RC)(RC_VER1 + 0x052)
+#define TPM_RC_NEEDS_TEST (TPM_RC)(RC_VER1 + 0x053)
+#define TPM_RC_NO_RESULT (TPM_RC)(RC_VER1 + 0x054)
+#define TPM_RC_SENSITIVE (TPM_RC)(RC_VER1 + 0x055)
+#define RC_MAX_FM0 (TPM_RC)(RC_VER1 + 0x07F)
+#define RC_FMT1 (TPM_RC)(0x080)
+#define TPM_RC_ASYMMETRIC (TPM_RC)(RC_FMT1 + 0x001)
+#define TPM_RC_ATTRIBUTES (TPM_RC)(RC_FMT1 + 0x002)
+#define TPM_RC_HASH (TPM_RC)(RC_FMT1 + 0x003)
+#define TPM_RC_VALUE (TPM_RC)(RC_FMT1 + 0x004)
+#define TPM_RC_HIERARCHY (TPM_RC)(RC_FMT1 + 0x005)
+#define TPM_RC_KEY_SIZE (TPM_RC)(RC_FMT1 + 0x007)
+#define TPM_RC_MGF (TPM_RC)(RC_FMT1 + 0x008)
+#define TPM_RC_MODE (TPM_RC)(RC_FMT1 + 0x009)
+#define TPM_RC_TYPE (TPM_RC)(RC_FMT1 + 0x00A)
+#define TPM_RC_HANDLE (TPM_RC)(RC_FMT1 + 0x00B)
+#define TPM_RC_KDF (TPM_RC)(RC_FMT1 + 0x00C)
+#define TPM_RC_RANGE (TPM_RC)(RC_FMT1 + 0x00D)
+#define TPM_RC_AUTH_FAIL (TPM_RC)(RC_FMT1 + 0x00E)
+#define TPM_RC_NONCE (TPM_RC)(RC_FMT1 + 0x00F)
+#define TPM_RC_PP (TPM_RC)(RC_FMT1 + 0x010)
+#define TPM_RC_SCHEME (TPM_RC)(RC_FMT1 + 0x012)
+#define TPM_RC_SIZE (TPM_RC)(RC_FMT1 + 0x015)
+#define TPM_RC_SYMMETRIC (TPM_RC)(RC_FMT1 + 0x016)
+#define TPM_RC_TAG (TPM_RC)(RC_FMT1 + 0x017)
+#define TPM_RC_SELECTOR (TPM_RC)(RC_FMT1 + 0x018)
+#define TPM_RC_INSUFFICIENT (TPM_RC)(RC_FMT1 + 0x01A)
+#define TPM_RC_SIGNATURE (TPM_RC)(RC_FMT1 + 0x01B)
+#define TPM_RC_KEY (TPM_RC)(RC_FMT1 + 0x01C)
+#define TPM_RC_POLICY_FAIL (TPM_RC)(RC_FMT1 + 0x01D)
+#define TPM_RC_INTEGRITY (TPM_RC)(RC_FMT1 + 0x01F)
+#define TPM_RC_TICKET (TPM_RC)(RC_FMT1 + 0x020)
+#define TPM_RC_RESERVED_BITS (TPM_RC)(RC_FMT1 + 0x021)
+#define TPM_RC_BAD_AUTH (TPM_RC)(RC_FMT1 + 0x022)
+#define TPM_RC_EXPIRED (TPM_RC)(RC_FMT1 + 0x023)
+#define TPM_RC_POLICY_CC (TPM_RC)(RC_FMT1 + 0x024 )
+#define TPM_RC_BINDING (TPM_RC)(RC_FMT1 + 0x025)
+#define TPM_RC_CURVE (TPM_RC)(RC_FMT1 + 0x026)
+#define TPM_RC_ECC_POINT (TPM_RC)(RC_FMT1 + 0x027)
+#define RC_WARN (TPM_RC)(0x900)
+#define TPM_RC_CONTEXT_GAP (TPM_RC)(RC_WARN + 0x001)
+#define TPM_RC_OBJECT_MEMORY (TPM_RC)(RC_WARN + 0x002)
+#define TPM_RC_SESSION_MEMORY (TPM_RC)(RC_WARN + 0x003)
+#define TPM_RC_MEMORY (TPM_RC)(RC_WARN + 0x004)
+#define TPM_RC_SESSION_HANDLES (TPM_RC)(RC_WARN + 0x005)
+#define TPM_RC_OBJECT_HANDLES (TPM_RC)(RC_WARN + 0x006)
+#define TPM_RC_LOCALITY (TPM_RC)(RC_WARN + 0x007)
+#define TPM_RC_YIELDED (TPM_RC)(RC_WARN + 0x008)
+#define TPM_RC_CANCELED (TPM_RC)(RC_WARN + 0x009)
+#define TPM_RC_TESTING (TPM_RC)(RC_WARN + 0x00A)
+#define TPM_RC_REFERENCE_H0 (TPM_RC)(RC_WARN + 0x010)
+#define TPM_RC_REFERENCE_H1 (TPM_RC)(RC_WARN + 0x011)
+#define TPM_RC_REFERENCE_H2 (TPM_RC)(RC_WARN + 0x012)
+#define TPM_RC_REFERENCE_H3 (TPM_RC)(RC_WARN + 0x013)
+#define TPM_RC_REFERENCE_H4 (TPM_RC)(RC_WARN + 0x014)
+#define TPM_RC_REFERENCE_H5 (TPM_RC)(RC_WARN + 0x015)
+#define TPM_RC_REFERENCE_H6 (TPM_RC)(RC_WARN + 0x016)
+#define TPM_RC_REFERENCE_S0 (TPM_RC)(RC_WARN + 0x018)
+#define TPM_RC_REFERENCE_S1 (TPM_RC)(RC_WARN + 0x019)
+#define TPM_RC_REFERENCE_S2 (TPM_RC)(RC_WARN + 0x01A)
+#define TPM_RC_REFERENCE_S3 (TPM_RC)(RC_WARN + 0x01B)
+#define TPM_RC_REFERENCE_S4 (TPM_RC)(RC_WARN + 0x01C)
+#define TPM_RC_REFERENCE_S5 (TPM_RC)(RC_WARN + 0x01D)
+#define TPM_RC_REFERENCE_S6 (TPM_RC)(RC_WARN + 0x01E)
+#define TPM_RC_NV_RATE (TPM_RC)(RC_WARN + 0x020)
+#define TPM_RC_LOCKOUT (TPM_RC)(RC_WARN + 0x021)
+#define TPM_RC_RETRY (TPM_RC)(RC_WARN + 0x022)
+#define TPM_RC_NV_UNAVAILABLE (TPM_RC)(RC_WARN + 0x023)
+#define TPM_RC_NOT_USED (TPM_RC)(RC_WARN + 0x7F)
+#define TPM_RC_H (TPM_RC)(0x000)
+#define TPM_RC_P (TPM_RC)(0x040)
+#define TPM_RC_S (TPM_RC)(0x800)
+#define TPM_RC_1 (TPM_RC)(0x100)
+#define TPM_RC_2 (TPM_RC)(0x200)
+#define TPM_RC_3 (TPM_RC)(0x300)
+#define TPM_RC_4 (TPM_RC)(0x400)
+#define TPM_RC_5 (TPM_RC)(0x500)
+#define TPM_RC_6 (TPM_RC)(0x600)
+#define TPM_RC_7 (TPM_RC)(0x700)
+#define TPM_RC_8 (TPM_RC)(0x800)
+#define TPM_RC_9 (TPM_RC)(0x900)
+#define TPM_RC_A (TPM_RC)(0xA00)
+#define TPM_RC_B (TPM_RC)(0xB00)
+#define TPM_RC_C (TPM_RC)(0xC00)
+#define TPM_RC_D (TPM_RC)(0xD00)
+#define TPM_RC_E (TPM_RC)(0xE00)
+#define TPM_RC_F (TPM_RC)(0xF00)
+#define TPM_RC_N_MASK (TPM_RC)(0xF00)
// Table 16 - TPM_CLOCK_ADJUST Constants
typedef INT8 TPM_CLOCK_ADJUST;
-#define TPM_CLOCK_COARSE_SLOWER (TPM_CLOCK_ADJUST)(-3)
-#define TPM_CLOCK_MEDIUM_SLOWER (TPM_CLOCK_ADJUST)(-2)
-#define TPM_CLOCK_FINE_SLOWER (TPM_CLOCK_ADJUST)(-1)
-#define TPM_CLOCK_NO_CHANGE (TPM_CLOCK_ADJUST)(0)
-#define TPM_CLOCK_FINE_FASTER (TPM_CLOCK_ADJUST)(1)
-#define TPM_CLOCK_MEDIUM_FASTER (TPM_CLOCK_ADJUST)(2)
-#define TPM_CLOCK_COARSE_FASTER (TPM_CLOCK_ADJUST)(3)
+#define TPM_CLOCK_COARSE_SLOWER (TPM_CLOCK_ADJUST)(-3)
+#define TPM_CLOCK_MEDIUM_SLOWER (TPM_CLOCK_ADJUST)(-2)
+#define TPM_CLOCK_FINE_SLOWER (TPM_CLOCK_ADJUST)(-1)
+#define TPM_CLOCK_NO_CHANGE (TPM_CLOCK_ADJUST)(0)
+#define TPM_CLOCK_FINE_FASTER (TPM_CLOCK_ADJUST)(1)
+#define TPM_CLOCK_MEDIUM_FASTER (TPM_CLOCK_ADJUST)(2)
+#define TPM_CLOCK_COARSE_FASTER (TPM_CLOCK_ADJUST)(3)
// Table 17 - TPM_EO Constants
typedef UINT16 TPM_EO;
-#define TPM_EO_EQ (TPM_EO)(0x0000)
-#define TPM_EO_NEQ (TPM_EO)(0x0001)
-#define TPM_EO_SIGNED_GT (TPM_EO)(0x0002)
-#define TPM_EO_UNSIGNED_GT (TPM_EO)(0x0003)
-#define TPM_EO_SIGNED_LT (TPM_EO)(0x0004)
-#define TPM_EO_UNSIGNED_LT (TPM_EO)(0x0005)
-#define TPM_EO_SIGNED_GE (TPM_EO)(0x0006)
-#define TPM_EO_UNSIGNED_GE (TPM_EO)(0x0007)
-#define TPM_EO_SIGNED_LE (TPM_EO)(0x0008)
-#define TPM_EO_UNSIGNED_LE (TPM_EO)(0x0009)
-#define TPM_EO_BITSET (TPM_EO)(0x000A)
-#define TPM_EO_BITCLEAR (TPM_EO)(0x000B)
+#define TPM_EO_EQ (TPM_EO)(0x0000)
+#define TPM_EO_NEQ (TPM_EO)(0x0001)
+#define TPM_EO_SIGNED_GT (TPM_EO)(0x0002)
+#define TPM_EO_UNSIGNED_GT (TPM_EO)(0x0003)
+#define TPM_EO_SIGNED_LT (TPM_EO)(0x0004)
+#define TPM_EO_UNSIGNED_LT (TPM_EO)(0x0005)
+#define TPM_EO_SIGNED_GE (TPM_EO)(0x0006)
+#define TPM_EO_UNSIGNED_GE (TPM_EO)(0x0007)
+#define TPM_EO_SIGNED_LE (TPM_EO)(0x0008)
+#define TPM_EO_UNSIGNED_LE (TPM_EO)(0x0009)
+#define TPM_EO_BITSET (TPM_EO)(0x000A)
+#define TPM_EO_BITCLEAR (TPM_EO)(0x000B)
// Table 18 - TPM_ST Constants
typedef UINT16 TPM_ST;
-#define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4)
-#define TPM_ST_NULL (TPM_ST)(0X8000)
-#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001)
-#define TPM_ST_SESSIONS (TPM_ST)(0x8002)
-#define TPM_ST_ATTEST_NV (TPM_ST)(0x8014)
-#define TPM_ST_ATTEST_COMMAND_AUDIT (TPM_ST)(0x8015)
-#define TPM_ST_ATTEST_SESSION_AUDIT (TPM_ST)(0x8016)
-#define TPM_ST_ATTEST_CERTIFY (TPM_ST)(0x8017)
-#define TPM_ST_ATTEST_QUOTE (TPM_ST)(0x8018)
-#define TPM_ST_ATTEST_TIME (TPM_ST)(0x8019)
-#define TPM_ST_ATTEST_CREATION (TPM_ST)(0x801A)
-#define TPM_ST_CREATION (TPM_ST)(0x8021)
-#define TPM_ST_VERIFIED (TPM_ST)(0x8022)
-#define TPM_ST_AUTH_SECRET (TPM_ST)(0x8023)
-#define TPM_ST_HASHCHECK (TPM_ST)(0x8024)
-#define TPM_ST_AUTH_SIGNED (TPM_ST)(0x8025)
-#define TPM_ST_FU_MANIFEST (TPM_ST)(0x8029)
+#define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4)
+#define TPM_ST_NULL (TPM_ST)(0X8000)
+#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001)
+#define TPM_ST_SESSIONS (TPM_ST)(0x8002)
+#define TPM_ST_ATTEST_NV (TPM_ST)(0x8014)
+#define TPM_ST_ATTEST_COMMAND_AUDIT (TPM_ST)(0x8015)
+#define TPM_ST_ATTEST_SESSION_AUDIT (TPM_ST)(0x8016)
+#define TPM_ST_ATTEST_CERTIFY (TPM_ST)(0x8017)
+#define TPM_ST_ATTEST_QUOTE (TPM_ST)(0x8018)
+#define TPM_ST_ATTEST_TIME (TPM_ST)(0x8019)
+#define TPM_ST_ATTEST_CREATION (TPM_ST)(0x801A)
+#define TPM_ST_CREATION (TPM_ST)(0x8021)
+#define TPM_ST_VERIFIED (TPM_ST)(0x8022)
+#define TPM_ST_AUTH_SECRET (TPM_ST)(0x8023)
+#define TPM_ST_HASHCHECK (TPM_ST)(0x8024)
+#define TPM_ST_AUTH_SIGNED (TPM_ST)(0x8025)
+#define TPM_ST_FU_MANIFEST (TPM_ST)(0x8029)
// Table 19 - TPM_SU Constants
typedef UINT16 TPM_SU;
-#define TPM_SU_CLEAR (TPM_SU)(0x0000)
-#define TPM_SU_STATE (TPM_SU)(0x0001)
+#define TPM_SU_CLEAR (TPM_SU)(0x0000)
+#define TPM_SU_STATE (TPM_SU)(0x0001)
// Table 20 - TPM_SE Constants
typedef UINT8 TPM_SE;
-#define TPM_SE_HMAC (TPM_SE)(0x00)
-#define TPM_SE_POLICY (TPM_SE)(0x01)
-#define TPM_SE_TRIAL (TPM_SE)(0x03)
+#define TPM_SE_HMAC (TPM_SE)(0x00)
+#define TPM_SE_POLICY (TPM_SE)(0x01)
+#define TPM_SE_TRIAL (TPM_SE)(0x03)
// Table 21 - TPM_CAP Constants
typedef UINT32 TPM_CAP;
-#define TPM_CAP_FIRST (TPM_CAP)(0x00000000)
-#define TPM_CAP_ALGS (TPM_CAP)(0x00000000)
-#define TPM_CAP_HANDLES (TPM_CAP)(0x00000001)
-#define TPM_CAP_COMMANDS (TPM_CAP)(0x00000002)
-#define TPM_CAP_PP_COMMANDS (TPM_CAP)(0x00000003)
-#define TPM_CAP_AUDIT_COMMANDS (TPM_CAP)(0x00000004)
-#define TPM_CAP_PCRS (TPM_CAP)(0x00000005)
-#define TPM_CAP_TPM_PROPERTIES (TPM_CAP)(0x00000006)
-#define TPM_CAP_PCR_PROPERTIES (TPM_CAP)(0x00000007)
-#define TPM_CAP_ECC_CURVES (TPM_CAP)(0x00000008)
-#define TPM_CAP_LAST (TPM_CAP)(0x00000008)
-#define TPM_CAP_VENDOR_PROPERTY (TPM_CAP)(0x00000100)
+#define TPM_CAP_FIRST (TPM_CAP)(0x00000000)
+#define TPM_CAP_ALGS (TPM_CAP)(0x00000000)
+#define TPM_CAP_HANDLES (TPM_CAP)(0x00000001)
+#define TPM_CAP_COMMANDS (TPM_CAP)(0x00000002)
+#define TPM_CAP_PP_COMMANDS (TPM_CAP)(0x00000003)
+#define TPM_CAP_AUDIT_COMMANDS (TPM_CAP)(0x00000004)
+#define TPM_CAP_PCRS (TPM_CAP)(0x00000005)
+#define TPM_CAP_TPM_PROPERTIES (TPM_CAP)(0x00000006)
+#define TPM_CAP_PCR_PROPERTIES (TPM_CAP)(0x00000007)
+#define TPM_CAP_ECC_CURVES (TPM_CAP)(0x00000008)
+#define TPM_CAP_LAST (TPM_CAP)(0x00000008)
+#define TPM_CAP_VENDOR_PROPERTY (TPM_CAP)(0x00000100)
// Table 22 - TPM_PT Constants
typedef UINT32 TPM_PT;
-#define TPM_PT_NONE (TPM_PT)(0x00000000)
-#define PT_GROUP (TPM_PT)(0x00000100)
-#define PT_FIXED (TPM_PT)(PT_GROUP * 1)
-#define TPM_PT_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 0)
-#define TPM_PT_LEVEL (TPM_PT)(PT_FIXED + 1)
-#define TPM_PT_REVISION (TPM_PT)(PT_FIXED + 2)
-#define TPM_PT_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 3)
-#define TPM_PT_YEAR (TPM_PT)(PT_FIXED + 4)
-#define TPM_PT_MANUFACTURER (TPM_PT)(PT_FIXED + 5)
-#define TPM_PT_VENDOR_STRING_1 (TPM_PT)(PT_FIXED + 6)
-#define TPM_PT_VENDOR_STRING_2 (TPM_PT)(PT_FIXED + 7)
-#define TPM_PT_VENDOR_STRING_3 (TPM_PT)(PT_FIXED + 8)
-#define TPM_PT_VENDOR_STRING_4 (TPM_PT)(PT_FIXED + 9)
-#define TPM_PT_VENDOR_TPM_TYPE (TPM_PT)(PT_FIXED + 10)
-#define TPM_PT_FIRMWARE_VERSION_1 (TPM_PT)(PT_FIXED + 11)
-#define TPM_PT_FIRMWARE_VERSION_2 (TPM_PT)(PT_FIXED + 12)
-#define TPM_PT_INPUT_BUFFER (TPM_PT)(PT_FIXED + 13)
-#define TPM_PT_HR_TRANSIENT_MIN (TPM_PT)(PT_FIXED + 14)
-#define TPM_PT_HR_PERSISTENT_MIN (TPM_PT)(PT_FIXED + 15)
-#define TPM_PT_HR_LOADED_MIN (TPM_PT)(PT_FIXED + 16)
-#define TPM_PT_ACTIVE_SESSIONS_MAX (TPM_PT)(PT_FIXED + 17)
-#define TPM_PT_PCR_COUNT (TPM_PT)(PT_FIXED + 18)
-#define TPM_PT_PCR_SELECT_MIN (TPM_PT)(PT_FIXED + 19)
-#define TPM_PT_CONTEXT_GAP_MAX (TPM_PT)(PT_FIXED + 20)
-#define TPM_PT_NV_COUNTERS_MAX (TPM_PT)(PT_FIXED + 22)
-#define TPM_PT_NV_INDEX_MAX (TPM_PT)(PT_FIXED + 23)
-#define TPM_PT_MEMORY (TPM_PT)(PT_FIXED + 24)
-#define TPM_PT_CLOCK_UPDATE (TPM_PT)(PT_FIXED + 25)
-#define TPM_PT_CONTEXT_HASH (TPM_PT)(PT_FIXED + 26)
-#define TPM_PT_CONTEXT_SYM (TPM_PT)(PT_FIXED + 27)
-#define TPM_PT_CONTEXT_SYM_SIZE (TPM_PT)(PT_FIXED + 28)
-#define TPM_PT_ORDERLY_COUNT (TPM_PT)(PT_FIXED + 29)
-#define TPM_PT_MAX_COMMAND_SIZE (TPM_PT)(PT_FIXED + 30)
-#define TPM_PT_MAX_RESPONSE_SIZE (TPM_PT)(PT_FIXED + 31)
-#define TPM_PT_MAX_DIGEST (TPM_PT)(PT_FIXED + 32)
-#define TPM_PT_MAX_OBJECT_CONTEXT (TPM_PT)(PT_FIXED + 33)
-#define TPM_PT_MAX_SESSION_CONTEXT (TPM_PT)(PT_FIXED + 34)
-#define TPM_PT_PS_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 35)
-#define TPM_PT_PS_LEVEL (TPM_PT)(PT_FIXED + 36)
-#define TPM_PT_PS_REVISION (TPM_PT)(PT_FIXED + 37)
-#define TPM_PT_PS_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 38)
-#define TPM_PT_PS_YEAR (TPM_PT)(PT_FIXED + 39)
-#define TPM_PT_SPLIT_MAX (TPM_PT)(PT_FIXED + 40)
-#define TPM_PT_TOTAL_COMMANDS (TPM_PT)(PT_FIXED + 41)
-#define TPM_PT_LIBRARY_COMMANDS (TPM_PT)(PT_FIXED + 42)
-#define TPM_PT_VENDOR_COMMANDS (TPM_PT)(PT_FIXED + 43)
-#define PT_VAR (TPM_PT)(PT_GROUP * 2)
-#define TPM_PT_PERMANENT (TPM_PT)(PT_VAR + 0)
-#define TPM_PT_STARTUP_CLEAR (TPM_PT)(PT_VAR + 1)
-#define TPM_PT_HR_NV_INDEX (TPM_PT)(PT_VAR + 2)
-#define TPM_PT_HR_LOADED (TPM_PT)(PT_VAR + 3)
-#define TPM_PT_HR_LOADED_AVAIL (TPM_PT)(PT_VAR + 4)
-#define TPM_PT_HR_ACTIVE (TPM_PT)(PT_VAR + 5)
-#define TPM_PT_HR_ACTIVE_AVAIL (TPM_PT)(PT_VAR + 6)
-#define TPM_PT_HR_TRANSIENT_AVAIL (TPM_PT)(PT_VAR + 7)
-#define TPM_PT_HR_PERSISTENT (TPM_PT)(PT_VAR + 8)
-#define TPM_PT_HR_PERSISTENT_AVAIL (TPM_PT)(PT_VAR + 9)
-#define TPM_PT_NV_COUNTERS (TPM_PT)(PT_VAR + 10)
-#define TPM_PT_NV_COUNTERS_AVAIL (TPM_PT)(PT_VAR + 11)
-#define TPM_PT_ALGORITHM_SET (TPM_PT)(PT_VAR + 12)
-#define TPM_PT_LOADED_CURVES (TPM_PT)(PT_VAR + 13)
-#define TPM_PT_LOCKOUT_COUNTER (TPM_PT)(PT_VAR + 14)
-#define TPM_PT_MAX_AUTH_FAIL (TPM_PT)(PT_VAR + 15)
-#define TPM_PT_LOCKOUT_INTERVAL (TPM_PT)(PT_VAR + 16)
-#define TPM_PT_LOCKOUT_RECOVERY (TPM_PT)(PT_VAR + 17)
-#define TPM_PT_NV_WRITE_RECOVERY (TPM_PT)(PT_VAR + 18)
-#define TPM_PT_AUDIT_COUNTER_0 (TPM_PT)(PT_VAR + 19)
-#define TPM_PT_AUDIT_COUNTER_1 (TPM_PT)(PT_VAR + 20)
+#define TPM_PT_NONE (TPM_PT)(0x00000000)
+#define PT_GROUP (TPM_PT)(0x00000100)
+#define PT_FIXED (TPM_PT)(PT_GROUP * 1)
+#define TPM_PT_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 0)
+#define TPM_PT_LEVEL (TPM_PT)(PT_FIXED + 1)
+#define TPM_PT_REVISION (TPM_PT)(PT_FIXED + 2)
+#define TPM_PT_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 3)
+#define TPM_PT_YEAR (TPM_PT)(PT_FIXED + 4)
+#define TPM_PT_MANUFACTURER (TPM_PT)(PT_FIXED + 5)
+#define TPM_PT_VENDOR_STRING_1 (TPM_PT)(PT_FIXED + 6)
+#define TPM_PT_VENDOR_STRING_2 (TPM_PT)(PT_FIXED + 7)
+#define TPM_PT_VENDOR_STRING_3 (TPM_PT)(PT_FIXED + 8)
+#define TPM_PT_VENDOR_STRING_4 (TPM_PT)(PT_FIXED + 9)
+#define TPM_PT_VENDOR_TPM_TYPE (TPM_PT)(PT_FIXED + 10)
+#define TPM_PT_FIRMWARE_VERSION_1 (TPM_PT)(PT_FIXED + 11)
+#define TPM_PT_FIRMWARE_VERSION_2 (TPM_PT)(PT_FIXED + 12)
+#define TPM_PT_INPUT_BUFFER (TPM_PT)(PT_FIXED + 13)
+#define TPM_PT_HR_TRANSIENT_MIN (TPM_PT)(PT_FIXED + 14)
+#define TPM_PT_HR_PERSISTENT_MIN (TPM_PT)(PT_FIXED + 15)
+#define TPM_PT_HR_LOADED_MIN (TPM_PT)(PT_FIXED + 16)
+#define TPM_PT_ACTIVE_SESSIONS_MAX (TPM_PT)(PT_FIXED + 17)
+#define TPM_PT_PCR_COUNT (TPM_PT)(PT_FIXED + 18)
+#define TPM_PT_PCR_SELECT_MIN (TPM_PT)(PT_FIXED + 19)
+#define TPM_PT_CONTEXT_GAP_MAX (TPM_PT)(PT_FIXED + 20)
+#define TPM_PT_NV_COUNTERS_MAX (TPM_PT)(PT_FIXED + 22)
+#define TPM_PT_NV_INDEX_MAX (TPM_PT)(PT_FIXED + 23)
+#define TPM_PT_MEMORY (TPM_PT)(PT_FIXED + 24)
+#define TPM_PT_CLOCK_UPDATE (TPM_PT)(PT_FIXED + 25)
+#define TPM_PT_CONTEXT_HASH (TPM_PT)(PT_FIXED + 26)
+#define TPM_PT_CONTEXT_SYM (TPM_PT)(PT_FIXED + 27)
+#define TPM_PT_CONTEXT_SYM_SIZE (TPM_PT)(PT_FIXED + 28)
+#define TPM_PT_ORDERLY_COUNT (TPM_PT)(PT_FIXED + 29)
+#define TPM_PT_MAX_COMMAND_SIZE (TPM_PT)(PT_FIXED + 30)
+#define TPM_PT_MAX_RESPONSE_SIZE (TPM_PT)(PT_FIXED + 31)
+#define TPM_PT_MAX_DIGEST (TPM_PT)(PT_FIXED + 32)
+#define TPM_PT_MAX_OBJECT_CONTEXT (TPM_PT)(PT_FIXED + 33)
+#define TPM_PT_MAX_SESSION_CONTEXT (TPM_PT)(PT_FIXED + 34)
+#define TPM_PT_PS_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 35)
+#define TPM_PT_PS_LEVEL (TPM_PT)(PT_FIXED + 36)
+#define TPM_PT_PS_REVISION (TPM_PT)(PT_FIXED + 37)
+#define TPM_PT_PS_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 38)
+#define TPM_PT_PS_YEAR (TPM_PT)(PT_FIXED + 39)
+#define TPM_PT_SPLIT_MAX (TPM_PT)(PT_FIXED + 40)
+#define TPM_PT_TOTAL_COMMANDS (TPM_PT)(PT_FIXED + 41)
+#define TPM_PT_LIBRARY_COMMANDS (TPM_PT)(PT_FIXED + 42)
+#define TPM_PT_VENDOR_COMMANDS (TPM_PT)(PT_FIXED + 43)
+#define PT_VAR (TPM_PT)(PT_GROUP * 2)
+#define TPM_PT_PERMANENT (TPM_PT)(PT_VAR + 0)
+#define TPM_PT_STARTUP_CLEAR (TPM_PT)(PT_VAR + 1)
+#define TPM_PT_HR_NV_INDEX (TPM_PT)(PT_VAR + 2)
+#define TPM_PT_HR_LOADED (TPM_PT)(PT_VAR + 3)
+#define TPM_PT_HR_LOADED_AVAIL (TPM_PT)(PT_VAR + 4)
+#define TPM_PT_HR_ACTIVE (TPM_PT)(PT_VAR + 5)
+#define TPM_PT_HR_ACTIVE_AVAIL (TPM_PT)(PT_VAR + 6)
+#define TPM_PT_HR_TRANSIENT_AVAIL (TPM_PT)(PT_VAR + 7)
+#define TPM_PT_HR_PERSISTENT (TPM_PT)(PT_VAR + 8)
+#define TPM_PT_HR_PERSISTENT_AVAIL (TPM_PT)(PT_VAR + 9)
+#define TPM_PT_NV_COUNTERS (TPM_PT)(PT_VAR + 10)
+#define TPM_PT_NV_COUNTERS_AVAIL (TPM_PT)(PT_VAR + 11)
+#define TPM_PT_ALGORITHM_SET (TPM_PT)(PT_VAR + 12)
+#define TPM_PT_LOADED_CURVES (TPM_PT)(PT_VAR + 13)
+#define TPM_PT_LOCKOUT_COUNTER (TPM_PT)(PT_VAR + 14)
+#define TPM_PT_MAX_AUTH_FAIL (TPM_PT)(PT_VAR + 15)
+#define TPM_PT_LOCKOUT_INTERVAL (TPM_PT)(PT_VAR + 16)
+#define TPM_PT_LOCKOUT_RECOVERY (TPM_PT)(PT_VAR + 17)
+#define TPM_PT_NV_WRITE_RECOVERY (TPM_PT)(PT_VAR + 18)
+#define TPM_PT_AUDIT_COUNTER_0 (TPM_PT)(PT_VAR + 19)
+#define TPM_PT_AUDIT_COUNTER_1 (TPM_PT)(PT_VAR + 20)
// Table 23 - TPM_PT_PCR Constants
typedef UINT32 TPM_PT_PCR;
-#define TPM_PT_PCR_FIRST (TPM_PT_PCR)(0x00000000)
-#define TPM_PT_PCR_SAVE (TPM_PT_PCR)(0x00000000)
-#define TPM_PT_PCR_EXTEND_L0 (TPM_PT_PCR)(0x00000001)
-#define TPM_PT_PCR_RESET_L0 (TPM_PT_PCR)(0x00000002)
-#define TPM_PT_PCR_EXTEND_L1 (TPM_PT_PCR)(0x00000003)
-#define TPM_PT_PCR_RESET_L1 (TPM_PT_PCR)(0x00000004)
-#define TPM_PT_PCR_EXTEND_L2 (TPM_PT_PCR)(0x00000005)
-#define TPM_PT_PCR_RESET_L2 (TPM_PT_PCR)(0x00000006)
-#define TPM_PT_PCR_EXTEND_L3 (TPM_PT_PCR)(0x00000007)
-#define TPM_PT_PCR_RESET_L3 (TPM_PT_PCR)(0x00000008)
-#define TPM_PT_PCR_EXTEND_L4 (TPM_PT_PCR)(0x00000009)
-#define TPM_PT_PCR_RESET_L4 (TPM_PT_PCR)(0x0000000A)
-#define TPM_PT_PCR_NO_INCREMENT (TPM_PT_PCR)(0x00000011)
-#define TPM_PT_PCR_DRTM_RESET (TPM_PT_PCR)(0x00000012)
-#define TPM_PT_PCR_POLICY (TPM_PT_PCR)(0x00000013)
-#define TPM_PT_PCR_AUTH (TPM_PT_PCR)(0x00000014)
-#define TPM_PT_PCR_LAST (TPM_PT_PCR)(0x00000014)
+#define TPM_PT_PCR_FIRST (TPM_PT_PCR)(0x00000000)
+#define TPM_PT_PCR_SAVE (TPM_PT_PCR)(0x00000000)
+#define TPM_PT_PCR_EXTEND_L0 (TPM_PT_PCR)(0x00000001)
+#define TPM_PT_PCR_RESET_L0 (TPM_PT_PCR)(0x00000002)
+#define TPM_PT_PCR_EXTEND_L1 (TPM_PT_PCR)(0x00000003)
+#define TPM_PT_PCR_RESET_L1 (TPM_PT_PCR)(0x00000004)
+#define TPM_PT_PCR_EXTEND_L2 (TPM_PT_PCR)(0x00000005)
+#define TPM_PT_PCR_RESET_L2 (TPM_PT_PCR)(0x00000006)
+#define TPM_PT_PCR_EXTEND_L3 (TPM_PT_PCR)(0x00000007)
+#define TPM_PT_PCR_RESET_L3 (TPM_PT_PCR)(0x00000008)
+#define TPM_PT_PCR_EXTEND_L4 (TPM_PT_PCR)(0x00000009)
+#define TPM_PT_PCR_RESET_L4 (TPM_PT_PCR)(0x0000000A)
+#define TPM_PT_PCR_NO_INCREMENT (TPM_PT_PCR)(0x00000011)
+#define TPM_PT_PCR_DRTM_RESET (TPM_PT_PCR)(0x00000012)
+#define TPM_PT_PCR_POLICY (TPM_PT_PCR)(0x00000013)
+#define TPM_PT_PCR_AUTH (TPM_PT_PCR)(0x00000014)
+#define TPM_PT_PCR_LAST (TPM_PT_PCR)(0x00000014)
// Table 24 - TPM_PS Constants
typedef UINT32 TPM_PS;
-#define TPM_PS_MAIN (TPM_PS)(0x00000000)
-#define TPM_PS_PC (TPM_PS)(0x00000001)
-#define TPM_PS_PDA (TPM_PS)(0x00000002)
-#define TPM_PS_CELL_PHONE (TPM_PS)(0x00000003)
-#define TPM_PS_SERVER (TPM_PS)(0x00000004)
-#define TPM_PS_PERIPHERAL (TPM_PS)(0x00000005)
-#define TPM_PS_TSS (TPM_PS)(0x00000006)
-#define TPM_PS_STORAGE (TPM_PS)(0x00000007)
-#define TPM_PS_AUTHENTICATION (TPM_PS)(0x00000008)
-#define TPM_PS_EMBEDDED (TPM_PS)(0x00000009)
-#define TPM_PS_HARDCOPY (TPM_PS)(0x0000000A)
-#define TPM_PS_INFRASTRUCTURE (TPM_PS)(0x0000000B)
-#define TPM_PS_VIRTUALIZATION (TPM_PS)(0x0000000C)
-#define TPM_PS_TNC (TPM_PS)(0x0000000D)
-#define TPM_PS_MULTI_TENANT (TPM_PS)(0x0000000E)
-#define TPM_PS_TC (TPM_PS)(0x0000000F)
+#define TPM_PS_MAIN (TPM_PS)(0x00000000)
+#define TPM_PS_PC (TPM_PS)(0x00000001)
+#define TPM_PS_PDA (TPM_PS)(0x00000002)
+#define TPM_PS_CELL_PHONE (TPM_PS)(0x00000003)
+#define TPM_PS_SERVER (TPM_PS)(0x00000004)
+#define TPM_PS_PERIPHERAL (TPM_PS)(0x00000005)
+#define TPM_PS_TSS (TPM_PS)(0x00000006)
+#define TPM_PS_STORAGE (TPM_PS)(0x00000007)
+#define TPM_PS_AUTHENTICATION (TPM_PS)(0x00000008)
+#define TPM_PS_EMBEDDED (TPM_PS)(0x00000009)
+#define TPM_PS_HARDCOPY (TPM_PS)(0x0000000A)
+#define TPM_PS_INFRASTRUCTURE (TPM_PS)(0x0000000B)
+#define TPM_PS_VIRTUALIZATION (TPM_PS)(0x0000000C)
+#define TPM_PS_TNC (TPM_PS)(0x0000000D)
+#define TPM_PS_MULTI_TENANT (TPM_PS)(0x0000000E)
+#define TPM_PS_TC (TPM_PS)(0x0000000F)
// 7 Handles
@@ -647,117 +640,117 @@ typedef UINT32 TPM_PS;
//
// NOTE: Comment because it has same name as TPM1.2 (value is same, so not runtime issue)
//
-//typedef UINT32 TPM_HANDLE;
+// typedef UINT32 TPM_HANDLE;
// Table 26 - TPM_HT Constants
typedef UINT8 TPM_HT;
-#define TPM_HT_PCR (TPM_HT)(0x00)
-#define TPM_HT_NV_INDEX (TPM_HT)(0x01)
-#define TPM_HT_HMAC_SESSION (TPM_HT)(0x02)
-#define TPM_HT_LOADED_SESSION (TPM_HT)(0x02)
-#define TPM_HT_POLICY_SESSION (TPM_HT)(0x03)
-#define TPM_HT_ACTIVE_SESSION (TPM_HT)(0x03)
-#define TPM_HT_PERMANENT (TPM_HT)(0x40)
-#define TPM_HT_TRANSIENT (TPM_HT)(0x80)
-#define TPM_HT_PERSISTENT (TPM_HT)(0x81)
+#define TPM_HT_PCR (TPM_HT)(0x00)
+#define TPM_HT_NV_INDEX (TPM_HT)(0x01)
+#define TPM_HT_HMAC_SESSION (TPM_HT)(0x02)
+#define TPM_HT_LOADED_SESSION (TPM_HT)(0x02)
+#define TPM_HT_POLICY_SESSION (TPM_HT)(0x03)
+#define TPM_HT_ACTIVE_SESSION (TPM_HT)(0x03)
+#define TPM_HT_PERMANENT (TPM_HT)(0x40)
+#define TPM_HT_TRANSIENT (TPM_HT)(0x80)
+#define TPM_HT_PERSISTENT (TPM_HT)(0x81)
// Table 27 - TPM_RH Constants
typedef UINT32 TPM_RH;
-#define TPM_RH_FIRST (TPM_RH)(0x40000000)
-#define TPM_RH_SRK (TPM_RH)(0x40000000)
-#define TPM_RH_OWNER (TPM_RH)(0x40000001)
-#define TPM_RH_REVOKE (TPM_RH)(0x40000002)
-#define TPM_RH_TRANSPORT (TPM_RH)(0x40000003)
-#define TPM_RH_OPERATOR (TPM_RH)(0x40000004)
-#define TPM_RH_ADMIN (TPM_RH)(0x40000005)
-#define TPM_RH_EK (TPM_RH)(0x40000006)
-#define TPM_RH_NULL (TPM_RH)(0x40000007)
-#define TPM_RH_UNASSIGNED (TPM_RH)(0x40000008)
-#define TPM_RS_PW (TPM_RH)(0x40000009)
-#define TPM_RH_LOCKOUT (TPM_RH)(0x4000000A)
-#define TPM_RH_ENDORSEMENT (TPM_RH)(0x4000000B)
-#define TPM_RH_PLATFORM (TPM_RH)(0x4000000C)
-#define TPM_RH_PLATFORM_NV (TPM_RH)(0x4000000D)
-#define TPM_RH_AUTH_00 (TPM_RH)(0x40000010)
-#define TPM_RH_AUTH_FF (TPM_RH)(0x4000010F)
-#define TPM_RH_LAST (TPM_RH)(0x4000010F)
+#define TPM_RH_FIRST (TPM_RH)(0x40000000)
+#define TPM_RH_SRK (TPM_RH)(0x40000000)
+#define TPM_RH_OWNER (TPM_RH)(0x40000001)
+#define TPM_RH_REVOKE (TPM_RH)(0x40000002)
+#define TPM_RH_TRANSPORT (TPM_RH)(0x40000003)
+#define TPM_RH_OPERATOR (TPM_RH)(0x40000004)
+#define TPM_RH_ADMIN (TPM_RH)(0x40000005)
+#define TPM_RH_EK (TPM_RH)(0x40000006)
+#define TPM_RH_NULL (TPM_RH)(0x40000007)
+#define TPM_RH_UNASSIGNED (TPM_RH)(0x40000008)
+#define TPM_RS_PW (TPM_RH)(0x40000009)
+#define TPM_RH_LOCKOUT (TPM_RH)(0x4000000A)
+#define TPM_RH_ENDORSEMENT (TPM_RH)(0x4000000B)
+#define TPM_RH_PLATFORM (TPM_RH)(0x4000000C)
+#define TPM_RH_PLATFORM_NV (TPM_RH)(0x4000000D)
+#define TPM_RH_AUTH_00 (TPM_RH)(0x40000010)
+#define TPM_RH_AUTH_FF (TPM_RH)(0x4000010F)
+#define TPM_RH_LAST (TPM_RH)(0x4000010F)
// Table 28 - TPM_HC Constants
typedef TPM_HANDLE TPM_HC;
-#define HR_HANDLE_MASK (TPM_HC)(0x00FFFFFF)
-#define HR_RANGE_MASK (TPM_HC)(0xFF000000)
-#define HR_SHIFT (TPM_HC)(24)
-#define HR_PCR (TPM_HC)((TPM_HC)TPM_HT_PCR << HR_SHIFT)
-#define HR_HMAC_SESSION (TPM_HC)((TPM_HC)TPM_HT_HMAC_SESSION << HR_SHIFT)
-#define HR_POLICY_SESSION (TPM_HC)((TPM_HC)TPM_HT_POLICY_SESSION << HR_SHIFT)
-#define HR_TRANSIENT (TPM_HC)((TPM_HC)TPM_HT_TRANSIENT << HR_SHIFT)
-#define HR_PERSISTENT (TPM_HC)((TPM_HC)TPM_HT_PERSISTENT << HR_SHIFT)
-#define HR_NV_INDEX (TPM_HC)((TPM_HC)TPM_HT_NV_INDEX << HR_SHIFT)
-#define HR_PERMANENT (TPM_HC)((TPM_HC)TPM_HT_PERMANENT << HR_SHIFT)
-#define PCR_FIRST (TPM_HC)(HR_PCR + 0)
-#define PCR_LAST (TPM_HC)(PCR_FIRST + IMPLEMENTATION_PCR - 1)
-#define HMAC_SESSION_FIRST (TPM_HC)(HR_HMAC_SESSION + 0)
-#define HMAC_SESSION_LAST (TPM_HC)(HMAC_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)
-#define LOADED_SESSION_FIRST (TPM_HC)(HMAC_SESSION_FIRST)
-#define LOADED_SESSION_LAST (TPM_HC)(HMAC_SESSION_LAST)
-#define POLICY_SESSION_FIRST (TPM_HC)(HR_POLICY_SESSION + 0)
-#define POLICY_SESSION_LAST (TPM_HC)(POLICY_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)
-#define TRANSIENT_FIRST (TPM_HC)(HR_TRANSIENT + 0)
-#define ACTIVE_SESSION_FIRST (TPM_HC)(POLICY_SESSION_FIRST)
-#define ACTIVE_SESSION_LAST (TPM_HC)(POLICY_SESSION_LAST)
-#define TRANSIENT_LAST (TPM_HC)(TRANSIENT_FIRST+MAX_LOADED_OBJECTS - 1)
-#define PERSISTENT_FIRST (TPM_HC)(HR_PERSISTENT + 0)
-#define PERSISTENT_LAST (TPM_HC)(PERSISTENT_FIRST + 0x00FFFFFF)
-#define PLATFORM_PERSISTENT (TPM_HC)(PERSISTENT_FIRST + 0x00800000)
-#define NV_INDEX_FIRST (TPM_HC)(HR_NV_INDEX + 0)
-#define NV_INDEX_LAST (TPM_HC)(NV_INDEX_FIRST + 0x00FFFFFF)
-#define PERMANENT_FIRST (TPM_HC)(TPM_RH_FIRST)
-#define PERMANENT_LAST (TPM_HC)(TPM_RH_LAST)
+#define HR_HANDLE_MASK (TPM_HC)(0x00FFFFFF)
+#define HR_RANGE_MASK (TPM_HC)(0xFF000000)
+#define HR_SHIFT (TPM_HC)(24)
+#define HR_PCR (TPM_HC)((TPM_HC)TPM_HT_PCR << HR_SHIFT)
+#define HR_HMAC_SESSION (TPM_HC)((TPM_HC)TPM_HT_HMAC_SESSION << HR_SHIFT)
+#define HR_POLICY_SESSION (TPM_HC)((TPM_HC)TPM_HT_POLICY_SESSION << HR_SHIFT)
+#define HR_TRANSIENT (TPM_HC)((TPM_HC)TPM_HT_TRANSIENT << HR_SHIFT)
+#define HR_PERSISTENT (TPM_HC)((TPM_HC)TPM_HT_PERSISTENT << HR_SHIFT)
+#define HR_NV_INDEX (TPM_HC)((TPM_HC)TPM_HT_NV_INDEX << HR_SHIFT)
+#define HR_PERMANENT (TPM_HC)((TPM_HC)TPM_HT_PERMANENT << HR_SHIFT)
+#define PCR_FIRST (TPM_HC)(HR_PCR + 0)
+#define PCR_LAST (TPM_HC)(PCR_FIRST + IMPLEMENTATION_PCR - 1)
+#define HMAC_SESSION_FIRST (TPM_HC)(HR_HMAC_SESSION + 0)
+#define HMAC_SESSION_LAST (TPM_HC)(HMAC_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)
+#define LOADED_SESSION_FIRST (TPM_HC)(HMAC_SESSION_FIRST)
+#define LOADED_SESSION_LAST (TPM_HC)(HMAC_SESSION_LAST)
+#define POLICY_SESSION_FIRST (TPM_HC)(HR_POLICY_SESSION + 0)
+#define POLICY_SESSION_LAST (TPM_HC)(POLICY_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)
+#define TRANSIENT_FIRST (TPM_HC)(HR_TRANSIENT + 0)
+#define ACTIVE_SESSION_FIRST (TPM_HC)(POLICY_SESSION_FIRST)
+#define ACTIVE_SESSION_LAST (TPM_HC)(POLICY_SESSION_LAST)
+#define TRANSIENT_LAST (TPM_HC)(TRANSIENT_FIRST+MAX_LOADED_OBJECTS - 1)
+#define PERSISTENT_FIRST (TPM_HC)(HR_PERSISTENT + 0)
+#define PERSISTENT_LAST (TPM_HC)(PERSISTENT_FIRST + 0x00FFFFFF)
+#define PLATFORM_PERSISTENT (TPM_HC)(PERSISTENT_FIRST + 0x00800000)
+#define NV_INDEX_FIRST (TPM_HC)(HR_NV_INDEX + 0)
+#define NV_INDEX_LAST (TPM_HC)(NV_INDEX_FIRST + 0x00FFFFFF)
+#define PERMANENT_FIRST (TPM_HC)(TPM_RH_FIRST)
+#define PERMANENT_LAST (TPM_HC)(TPM_RH_LAST)
// 8 Attribute Structures
// Table 29 - TPMA_ALGORITHM Bits
typedef struct {
- UINT32 asymmetric : 1;
- UINT32 symmetric : 1;
- UINT32 hash : 1;
- UINT32 object : 1;
- UINT32 reserved4_7 : 4;
- UINT32 signing : 1;
- UINT32 encrypting : 1;
- UINT32 method : 1;
- UINT32 reserved11_31 : 21;
+ UINT32 asymmetric : 1;
+ UINT32 symmetric : 1;
+ UINT32 hash : 1;
+ UINT32 object : 1;
+ UINT32 reserved4_7 : 4;
+ UINT32 signing : 1;
+ UINT32 encrypting : 1;
+ UINT32 method : 1;
+ UINT32 reserved11_31 : 21;
} TPMA_ALGORITHM;
// Table 30 - TPMA_OBJECT Bits
typedef struct {
- UINT32 reserved1 : 1;
- UINT32 fixedTPM : 1;
- UINT32 stClear : 1;
- UINT32 reserved4 : 1;
- UINT32 fixedParent : 1;
- UINT32 sensitiveDataOrigin : 1;
- UINT32 userWithAuth : 1;
- UINT32 adminWithPolicy : 1;
- UINT32 reserved8_9 : 2;
- UINT32 noDA : 1;
- UINT32 encryptedDuplication : 1;
- UINT32 reserved12_15 : 4;
- UINT32 restricted : 1;
- UINT32 decrypt : 1;
- UINT32 sign : 1;
- UINT32 reserved19_31 : 13;
+ UINT32 reserved1 : 1;
+ UINT32 fixedTPM : 1;
+ UINT32 stClear : 1;
+ UINT32 reserved4 : 1;
+ UINT32 fixedParent : 1;
+ UINT32 sensitiveDataOrigin : 1;
+ UINT32 userWithAuth : 1;
+ UINT32 adminWithPolicy : 1;
+ UINT32 reserved8_9 : 2;
+ UINT32 noDA : 1;
+ UINT32 encryptedDuplication : 1;
+ UINT32 reserved12_15 : 4;
+ UINT32 restricted : 1;
+ UINT32 decrypt : 1;
+ UINT32 sign : 1;
+ UINT32 reserved19_31 : 13;
} TPMA_OBJECT;
// Table 31 - TPMA_SESSION Bits
typedef struct {
- UINT8 continueSession : 1;
- UINT8 auditExclusive : 1;
- UINT8 auditReset : 1;
- UINT8 reserved3_4 : 2;
- UINT8 decrypt : 1;
- UINT8 encrypt : 1;
- UINT8 audit : 1;
+ UINT8 continueSession : 1;
+ UINT8 auditExclusive : 1;
+ UINT8 auditReset : 1;
+ UINT8 reserved3_4 : 2;
+ UINT8 decrypt : 1;
+ UINT8 encrypt : 1;
+ UINT8 audit : 1;
} TPMA_SESSION;
// Table 32 - TPMA_LOCALITY Bits
@@ -765,54 +758,54 @@ typedef struct {
// NOTE: Use low case here to resolve conflict
//
typedef struct {
- UINT8 locZero : 1;
- UINT8 locOne : 1;
- UINT8 locTwo : 1;
- UINT8 locThree : 1;
- UINT8 locFour : 1;
- UINT8 Extended : 3;
+ UINT8 locZero : 1;
+ UINT8 locOne : 1;
+ UINT8 locTwo : 1;
+ UINT8 locThree : 1;
+ UINT8 locFour : 1;
+ UINT8 Extended : 3;
} TPMA_LOCALITY;
// Table 33 - TPMA_PERMANENT Bits
typedef struct {
- UINT32 ownerAuthSet : 1;
- UINT32 endorsementAuthSet : 1;
- UINT32 lockoutAuthSet : 1;
- UINT32 reserved3_7 : 5;
- UINT32 disableClear : 1;
- UINT32 inLockout : 1;
- UINT32 tpmGeneratedEPS : 1;
- UINT32 reserved11_31 : 21;
+ UINT32 ownerAuthSet : 1;
+ UINT32 endorsementAuthSet : 1;
+ UINT32 lockoutAuthSet : 1;
+ UINT32 reserved3_7 : 5;
+ UINT32 disableClear : 1;
+ UINT32 inLockout : 1;
+ UINT32 tpmGeneratedEPS : 1;
+ UINT32 reserved11_31 : 21;
} TPMA_PERMANENT;
// Table 34 - TPMA_STARTUP_CLEAR Bits
typedef struct {
- UINT32 phEnable : 1;
- UINT32 shEnable : 1;
- UINT32 ehEnable : 1;
- UINT32 reserved3_30 : 28;
- UINT32 orderly : 1;
+ UINT32 phEnable : 1;
+ UINT32 shEnable : 1;
+ UINT32 ehEnable : 1;
+ UINT32 reserved3_30 : 28;
+ UINT32 orderly : 1;
} TPMA_STARTUP_CLEAR;
// Table 35 - TPMA_MEMORY Bits
typedef struct {
- UINT32 sharedRAM : 1;
- UINT32 sharedNV : 1;
- UINT32 objectCopiedToRam : 1;
- UINT32 reserved3_31 : 29;
+ UINT32 sharedRAM : 1;
+ UINT32 sharedNV : 1;
+ UINT32 objectCopiedToRam : 1;
+ UINT32 reserved3_31 : 29;
} TPMA_MEMORY;
// Table 36 - TPMA_CC Bits
typedef struct {
- UINT32 commandIndex : 16;
- UINT32 reserved16_21 : 6;
- UINT32 nv : 1;
- UINT32 extensive : 1;
- UINT32 flushed : 1;
- UINT32 cHandles : 3;
- UINT32 rHandle : 1;
- UINT32 V : 1;
- UINT32 Res : 2;
+ UINT32 commandIndex : 16;
+ UINT32 reserved16_21 : 6;
+ UINT32 nv : 1;
+ UINT32 extensive : 1;
+ UINT32 flushed : 1;
+ UINT32 cHandles : 3;
+ UINT32 rHandle : 1;
+ UINT32 V : 1;
+ UINT32 Res : 2;
} TPMA_CC;
// 9 Interface Types
@@ -905,35 +898,35 @@ typedef TPM_ST TPMI_ST_COMMAND_TAG;
// Table 65 - TPMS_ALGORITHM_DESCRIPTION Structure
typedef struct {
- TPM_ALG_ID alg;
- TPMA_ALGORITHM attributes;
+ TPM_ALG_ID alg;
+ TPMA_ALGORITHM attributes;
} TPMS_ALGORITHM_DESCRIPTION;
// Table 66 - TPMU_HA Union
typedef union {
- BYTE sha1[SHA1_DIGEST_SIZE];
- BYTE sha256[SHA256_DIGEST_SIZE];
- BYTE sm3_256[SM3_256_DIGEST_SIZE];
- BYTE sha384[SHA384_DIGEST_SIZE];
- BYTE sha512[SHA512_DIGEST_SIZE];
+ BYTE sha1[SHA1_DIGEST_SIZE];
+ BYTE sha256[SHA256_DIGEST_SIZE];
+ BYTE sm3_256[SM3_256_DIGEST_SIZE];
+ BYTE sha384[SHA384_DIGEST_SIZE];
+ BYTE sha512[SHA512_DIGEST_SIZE];
} TPMU_HA;
// Table 67 - TPMT_HA Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
- TPMU_HA digest;
+ TPMI_ALG_HASH hashAlg;
+ TPMU_HA digest;
} TPMT_HA;
// Table 68 - TPM2B_DIGEST Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(TPMU_HA)];
+ UINT16 size;
+ BYTE buffer[sizeof (TPMU_HA)];
} TPM2B_DIGEST;
// Table 69 - TPM2B_DATA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(TPMT_HA)];
+ UINT16 size;
+ BYTE buffer[sizeof (TPMT_HA)];
} TPM2B_DATA;
// Table 70 - TPM2B_NONCE Types
@@ -947,254 +940,254 @@ typedef TPM2B_DIGEST TPM2B_OPERAND;
// Table 73 - TPM2B_EVENT Structure
typedef struct {
- UINT16 size;
- BYTE buffer[1024];
+ UINT16 size;
+ BYTE buffer[1024];
} TPM2B_EVENT;
// Table 74 - TPM2B_MAX_BUFFER Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_DIGEST_BUFFER];
+ UINT16 size;
+ BYTE buffer[MAX_DIGEST_BUFFER];
} TPM2B_MAX_BUFFER;
// Table 75 - TPM2B_MAX_NV_BUFFER Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_NV_INDEX_SIZE];
+ UINT16 size;
+ BYTE buffer[MAX_NV_INDEX_SIZE];
} TPM2B_MAX_NV_BUFFER;
// Table 76 - TPM2B_TIMEOUT Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(UINT64)];
+ UINT16 size;
+ BYTE buffer[sizeof (UINT64)];
} TPM2B_TIMEOUT;
// Table 77 -- TPM2B_IV Structure <I/O>
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_SYM_BLOCK_SIZE];
+ UINT16 size;
+ BYTE buffer[MAX_SYM_BLOCK_SIZE];
} TPM2B_IV;
// Table 78 - TPMU_NAME Union
typedef union {
- TPMT_HA digest;
- TPM_HANDLE handle;
+ TPMT_HA digest;
+ TPM_HANDLE handle;
} TPMU_NAME;
// Table 79 - TPM2B_NAME Structure
typedef struct {
- UINT16 size;
- BYTE name[sizeof(TPMU_NAME)];
+ UINT16 size;
+ BYTE name[sizeof (TPMU_NAME)];
} TPM2B_NAME;
// Table 80 - TPMS_PCR_SELECT Structure
typedef struct {
- UINT8 sizeofSelect;
- BYTE pcrSelect[PCR_SELECT_MAX];
+ UINT8 sizeofSelect;
+ BYTE pcrSelect[PCR_SELECT_MAX];
} TPMS_PCR_SELECT;
// Table 81 - TPMS_PCR_SELECTION Structure
typedef struct {
- TPMI_ALG_HASH hash;
- UINT8 sizeofSelect;
- BYTE pcrSelect[PCR_SELECT_MAX];
+ TPMI_ALG_HASH hash;
+ UINT8 sizeofSelect;
+ BYTE pcrSelect[PCR_SELECT_MAX];
} TPMS_PCR_SELECTION;
// Table 84 - TPMT_TK_CREATION Structure
typedef struct {
- TPM_ST tag;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_DIGEST digest;
+ TPM_ST tag;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_DIGEST digest;
} TPMT_TK_CREATION;
// Table 85 - TPMT_TK_VERIFIED Structure
typedef struct {
- TPM_ST tag;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_DIGEST digest;
+ TPM_ST tag;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_DIGEST digest;
} TPMT_TK_VERIFIED;
// Table 86 - TPMT_TK_AUTH Structure
typedef struct {
- TPM_ST tag;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_DIGEST digest;
+ TPM_ST tag;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_DIGEST digest;
} TPMT_TK_AUTH;
// Table 87 - TPMT_TK_HASHCHECK Structure
typedef struct {
- TPM_ST tag;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_DIGEST digest;
+ TPM_ST tag;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_DIGEST digest;
} TPMT_TK_HASHCHECK;
// Table 88 - TPMS_ALG_PROPERTY Structure
typedef struct {
- TPM_ALG_ID alg;
- TPMA_ALGORITHM algProperties;
+ TPM_ALG_ID alg;
+ TPMA_ALGORITHM algProperties;
} TPMS_ALG_PROPERTY;
// Table 89 - TPMS_TAGGED_PROPERTY Structure
typedef struct {
- TPM_PT property;
- UINT32 value;
+ TPM_PT property;
+ UINT32 value;
} TPMS_TAGGED_PROPERTY;
// Table 90 - TPMS_TAGGED_PCR_SELECT Structure
typedef struct {
- TPM_PT tag;
- UINT8 sizeofSelect;
- BYTE pcrSelect[PCR_SELECT_MAX];
+ TPM_PT tag;
+ UINT8 sizeofSelect;
+ BYTE pcrSelect[PCR_SELECT_MAX];
} TPMS_TAGGED_PCR_SELECT;
// Table 91 - TPML_CC Structure
typedef struct {
- UINT32 count;
- TPM_CC commandCodes[MAX_CAP_CC];
+ UINT32 count;
+ TPM_CC commandCodes[MAX_CAP_CC];
} TPML_CC;
// Table 92 - TPML_CCA Structure
typedef struct {
- UINT32 count;
- TPMA_CC commandAttributes[MAX_CAP_CC];
+ UINT32 count;
+ TPMA_CC commandAttributes[MAX_CAP_CC];
} TPML_CCA;
// Table 93 - TPML_ALG Structure
typedef struct {
- UINT32 count;
- TPM_ALG_ID algorithms[MAX_ALG_LIST_SIZE];
+ UINT32 count;
+ TPM_ALG_ID algorithms[MAX_ALG_LIST_SIZE];
} TPML_ALG;
// Table 94 - TPML_HANDLE Structure
typedef struct {
- UINT32 count;
- TPM_HANDLE handle[MAX_CAP_HANDLES];
+ UINT32 count;
+ TPM_HANDLE handle[MAX_CAP_HANDLES];
} TPML_HANDLE;
// Table 95 - TPML_DIGEST Structure
typedef struct {
- UINT32 count;
- TPM2B_DIGEST digests[8];
+ UINT32 count;
+ TPM2B_DIGEST digests[8];
} TPML_DIGEST;
// Table 96 -- TPML_DIGEST_VALUES Structure <I/O>
typedef struct {
- UINT32 count;
- TPMT_HA digests[HASH_COUNT];
+ UINT32 count;
+ TPMT_HA digests[HASH_COUNT];
} TPML_DIGEST_VALUES;
// Table 97 - TPM2B_DIGEST_VALUES Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(TPML_DIGEST_VALUES)];
+ UINT16 size;
+ BYTE buffer[sizeof (TPML_DIGEST_VALUES)];
} TPM2B_DIGEST_VALUES;
// Table 98 - TPML_PCR_SELECTION Structure
typedef struct {
- UINT32 count;
- TPMS_PCR_SELECTION pcrSelections[HASH_COUNT];
+ UINT32 count;
+ TPMS_PCR_SELECTION pcrSelections[HASH_COUNT];
} TPML_PCR_SELECTION;
// Table 99 - TPML_ALG_PROPERTY Structure
typedef struct {
- UINT32 count;
- TPMS_ALG_PROPERTY algProperties[MAX_CAP_ALGS];
+ UINT32 count;
+ TPMS_ALG_PROPERTY algProperties[MAX_CAP_ALGS];
} TPML_ALG_PROPERTY;
// Table 100 - TPML_TAGGED_TPM_PROPERTY Structure
typedef struct {
- UINT32 count;
- TPMS_TAGGED_PROPERTY tpmProperty[MAX_TPM_PROPERTIES];
+ UINT32 count;
+ TPMS_TAGGED_PROPERTY tpmProperty[MAX_TPM_PROPERTIES];
} TPML_TAGGED_TPM_PROPERTY;
// Table 101 - TPML_TAGGED_PCR_PROPERTY Structure
typedef struct {
- UINT32 count;
- TPMS_TAGGED_PCR_SELECT pcrProperty[MAX_PCR_PROPERTIES];
+ UINT32 count;
+ TPMS_TAGGED_PCR_SELECT pcrProperty[MAX_PCR_PROPERTIES];
} TPML_TAGGED_PCR_PROPERTY;
// Table 102 - TPML_ECC_CURVE Structure
typedef struct {
- UINT32 count;
- TPM_ECC_CURVE eccCurves[MAX_ECC_CURVES];
+ UINT32 count;
+ TPM_ECC_CURVE eccCurves[MAX_ECC_CURVES];
} TPML_ECC_CURVE;
// Table 103 - TPMU_CAPABILITIES Union
typedef union {
- TPML_ALG_PROPERTY algorithms;
- TPML_HANDLE handles;
- TPML_CCA command;
- TPML_CC ppCommands;
- TPML_CC auditCommands;
- TPML_PCR_SELECTION assignedPCR;
- TPML_TAGGED_TPM_PROPERTY tpmProperties;
- TPML_TAGGED_PCR_PROPERTY pcrProperties;
- TPML_ECC_CURVE eccCurves;
+ TPML_ALG_PROPERTY algorithms;
+ TPML_HANDLE handles;
+ TPML_CCA command;
+ TPML_CC ppCommands;
+ TPML_CC auditCommands;
+ TPML_PCR_SELECTION assignedPCR;
+ TPML_TAGGED_TPM_PROPERTY tpmProperties;
+ TPML_TAGGED_PCR_PROPERTY pcrProperties;
+ TPML_ECC_CURVE eccCurves;
} TPMU_CAPABILITIES;
// Table 104 - TPMS_CAPABILITY_DATA Structure
typedef struct {
- TPM_CAP capability;
- TPMU_CAPABILITIES data;
+ TPM_CAP capability;
+ TPMU_CAPABILITIES data;
} TPMS_CAPABILITY_DATA;
// Table 105 - TPMS_CLOCK_INFO Structure
typedef struct {
- UINT64 clock;
- UINT32 resetCount;
- UINT32 restartCount;
- TPMI_YES_NO safe;
+ UINT64 clock;
+ UINT32 resetCount;
+ UINT32 restartCount;
+ TPMI_YES_NO safe;
} TPMS_CLOCK_INFO;
// Table 106 - TPMS_TIME_INFO Structure
typedef struct {
- UINT64 time;
- TPMS_CLOCK_INFO clockInfo;
+ UINT64 time;
+ TPMS_CLOCK_INFO clockInfo;
} TPMS_TIME_INFO;
// Table 107 - TPMS_TIME_ATTEST_INFO Structure
typedef struct {
- TPMS_TIME_INFO time;
- UINT64 firmwareVersion;
+ TPMS_TIME_INFO time;
+ UINT64 firmwareVersion;
} TPMS_TIME_ATTEST_INFO;
// Table 108 - TPMS_CERTIFY_INFO Structure
typedef struct {
- TPM2B_NAME name;
- TPM2B_NAME qualifiedName;
+ TPM2B_NAME name;
+ TPM2B_NAME qualifiedName;
} TPMS_CERTIFY_INFO;
// Table 109 - TPMS_QUOTE_INFO Structure
typedef struct {
- TPML_PCR_SELECTION pcrSelect;
- TPM2B_DIGEST pcrDigest;
+ TPML_PCR_SELECTION pcrSelect;
+ TPM2B_DIGEST pcrDigest;
} TPMS_QUOTE_INFO;
// Table 110 - TPMS_COMMAND_AUDIT_INFO Structure
typedef struct {
- UINT64 auditCounter;
- TPM_ALG_ID digestAlg;
- TPM2B_DIGEST auditDigest;
- TPM2B_DIGEST commandDigest;
+ UINT64 auditCounter;
+ TPM_ALG_ID digestAlg;
+ TPM2B_DIGEST auditDigest;
+ TPM2B_DIGEST commandDigest;
} TPMS_COMMAND_AUDIT_INFO;
// Table 111 - TPMS_SESSION_AUDIT_INFO Structure
typedef struct {
- TPMI_YES_NO exclusiveSession;
- TPM2B_DIGEST sessionDigest;
+ TPMI_YES_NO exclusiveSession;
+ TPM2B_DIGEST sessionDigest;
} TPMS_SESSION_AUDIT_INFO;
// Table 112 - TPMS_CREATION_INFO Structure
typedef struct {
- TPM2B_NAME objectName;
- TPM2B_DIGEST creationHash;
+ TPM2B_NAME objectName;
+ TPM2B_DIGEST creationHash;
} TPMS_CREATION_INFO;
// Table 113 - TPMS_NV_CERTIFY_INFO Structure
typedef struct {
- TPM2B_NAME indexName;
- UINT16 offset;
- TPM2B_MAX_NV_BUFFER nvContents;
+ TPM2B_NAME indexName;
+ UINT16 offset;
+ TPM2B_MAX_NV_BUFFER nvContents;
} TPMS_NV_CERTIFY_INFO;
// Table 114 - TPMI_ST_ATTEST Type
@@ -1202,45 +1195,45 @@ typedef TPM_ST TPMI_ST_ATTEST;
// Table 115 - TPMU_ATTEST Union
typedef union {
- TPMS_CERTIFY_INFO certify;
- TPMS_CREATION_INFO creation;
- TPMS_QUOTE_INFO quote;
- TPMS_COMMAND_AUDIT_INFO commandAudit;
- TPMS_SESSION_AUDIT_INFO sessionAudit;
- TPMS_TIME_ATTEST_INFO time;
- TPMS_NV_CERTIFY_INFO nv;
+ TPMS_CERTIFY_INFO certify;
+ TPMS_CREATION_INFO creation;
+ TPMS_QUOTE_INFO quote;
+ TPMS_COMMAND_AUDIT_INFO commandAudit;
+ TPMS_SESSION_AUDIT_INFO sessionAudit;
+ TPMS_TIME_ATTEST_INFO time;
+ TPMS_NV_CERTIFY_INFO nv;
} TPMU_ATTEST;
// Table 116 - TPMS_ATTEST Structure
typedef struct {
- TPM_GENERATED magic;
- TPMI_ST_ATTEST type;
- TPM2B_NAME qualifiedSigner;
- TPM2B_DATA extraData;
- TPMS_CLOCK_INFO clockInfo;
- UINT64 firmwareVersion;
- TPMU_ATTEST attested;
+ TPM_GENERATED magic;
+ TPMI_ST_ATTEST type;
+ TPM2B_NAME qualifiedSigner;
+ TPM2B_DATA extraData;
+ TPMS_CLOCK_INFO clockInfo;
+ UINT64 firmwareVersion;
+ TPMU_ATTEST attested;
} TPMS_ATTEST;
// Table 117 - TPM2B_ATTEST Structure
typedef struct {
- UINT16 size;
- BYTE attestationData[sizeof(TPMS_ATTEST)];
+ UINT16 size;
+ BYTE attestationData[sizeof (TPMS_ATTEST)];
} TPM2B_ATTEST;
// Table 118 - TPMS_AUTH_COMMAND Structure
typedef struct {
- TPMI_SH_AUTH_SESSION sessionHandle;
- TPM2B_NONCE nonce;
- TPMA_SESSION sessionAttributes;
- TPM2B_AUTH hmac;
+ TPMI_SH_AUTH_SESSION sessionHandle;
+ TPM2B_NONCE nonce;
+ TPMA_SESSION sessionAttributes;
+ TPM2B_AUTH hmac;
} TPMS_AUTH_COMMAND;
// Table 119 - TPMS_AUTH_RESPONSE Structure
typedef struct {
- TPM2B_NONCE nonce;
- TPMA_SESSION sessionAttributes;
- TPM2B_AUTH hmac;
+ TPM2B_NONCE nonce;
+ TPMA_SESSION sessionAttributes;
+ TPM2B_AUTH hmac;
} TPMS_AUTH_RESPONSE;
// 11 Algorithm Parameters and Structures
@@ -1253,65 +1246,65 @@ typedef TPM_KEY_BITS TPMI_SM4_KEY_BITS;
// Table 122 - TPMU_SYM_KEY_BITS Union
typedef union {
- TPMI_AES_KEY_BITS aes;
- TPMI_SM4_KEY_BITS SM4;
- TPM_KEY_BITS sym;
+ TPMI_AES_KEY_BITS aes;
+ TPMI_SM4_KEY_BITS SM4;
+ TPM_KEY_BITS sym;
TPMI_ALG_HASH xor;
} TPMU_SYM_KEY_BITS;
// Table 123 - TPMU_SYM_MODE Union
typedef union {
- TPMI_ALG_SYM_MODE aes;
- TPMI_ALG_SYM_MODE SM4;
- TPMI_ALG_SYM_MODE sym;
+ TPMI_ALG_SYM_MODE aes;
+ TPMI_ALG_SYM_MODE SM4;
+ TPMI_ALG_SYM_MODE sym;
} TPMU_SYM_MODE;
// Table 125 - TPMT_SYM_DEF Structure
typedef struct {
- TPMI_ALG_SYM algorithm;
- TPMU_SYM_KEY_BITS keyBits;
- TPMU_SYM_MODE mode;
+ TPMI_ALG_SYM algorithm;
+ TPMU_SYM_KEY_BITS keyBits;
+ TPMU_SYM_MODE mode;
} TPMT_SYM_DEF;
// Table 126 - TPMT_SYM_DEF_OBJECT Structure
typedef struct {
- TPMI_ALG_SYM_OBJECT algorithm;
- TPMU_SYM_KEY_BITS keyBits;
- TPMU_SYM_MODE mode;
+ TPMI_ALG_SYM_OBJECT algorithm;
+ TPMU_SYM_KEY_BITS keyBits;
+ TPMU_SYM_MODE mode;
} TPMT_SYM_DEF_OBJECT;
// Table 127 - TPM2B_SYM_KEY Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_SYM_KEY_BYTES];
+ UINT16 size;
+ BYTE buffer[MAX_SYM_KEY_BYTES];
} TPM2B_SYM_KEY;
// Table 128 - TPMS_SYMCIPHER_PARMS Structure
typedef struct {
- TPMT_SYM_DEF_OBJECT sym;
+ TPMT_SYM_DEF_OBJECT sym;
} TPMS_SYMCIPHER_PARMS;
// Table 129 - TPM2B_SENSITIVE_DATA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_SYM_DATA];
+ UINT16 size;
+ BYTE buffer[MAX_SYM_DATA];
} TPM2B_SENSITIVE_DATA;
// Table 130 - TPMS_SENSITIVE_CREATE Structure
typedef struct {
- TPM2B_AUTH userAuth;
- TPM2B_SENSITIVE_DATA data;
+ TPM2B_AUTH userAuth;
+ TPM2B_SENSITIVE_DATA data;
} TPMS_SENSITIVE_CREATE;
// Table 131 - TPM2B_SENSITIVE_CREATE Structure
typedef struct {
- UINT16 size;
- TPMS_SENSITIVE_CREATE sensitive;
+ UINT16 size;
+ TPMS_SENSITIVE_CREATE sensitive;
} TPM2B_SENSITIVE_CREATE;
// Table 132 - TPMS_SCHEME_SIGHASH Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_SIGHASH;
// Table 133 - TPMI_ALG_KEYEDHASH_SCHEME Type
@@ -1322,20 +1315,20 @@ typedef TPMS_SCHEME_SIGHASH TPMS_SCHEME_HMAC;
// Table 135 - TPMS_SCHEME_XOR Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
- TPMI_ALG_KDF kdf;
+ TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_KDF kdf;
} TPMS_SCHEME_XOR;
// Table 136 - TPMU_SCHEME_KEYEDHASH Union
typedef union {
- TPMS_SCHEME_HMAC hmac;
+ TPMS_SCHEME_HMAC hmac;
TPMS_SCHEME_XOR xor;
} TPMU_SCHEME_KEYEDHASH;
// Table 137 - TPMT_KEYEDHASH_SCHEME Structure
typedef struct {
- TPMI_ALG_KEYEDHASH_SCHEME scheme;
- TPMU_SCHEME_KEYEDHASH details;
+ TPMI_ALG_KEYEDHASH_SCHEME scheme;
+ TPMU_SCHEME_KEYEDHASH details;
} TPMT_KEYEDHASH_SCHEME;
// Table 138 - RSA_SIG_SCHEMES Types
@@ -1349,69 +1342,69 @@ typedef TPMS_SCHEME_SIGHASH TPMS_SCHEME_ECSCHNORR;
// Table 140 - TPMS_SCHEME_ECDAA Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
- UINT16 count;
+ TPMI_ALG_HASH hashAlg;
+ UINT16 count;
} TPMS_SCHEME_ECDAA;
// Table 141 - TPMU_SIG_SCHEME Union
typedef union {
- TPMS_SCHEME_RSASSA rsassa;
- TPMS_SCHEME_RSAPSS rsapss;
- TPMS_SCHEME_ECDSA ecdsa;
- TPMS_SCHEME_ECDAA ecdaa;
- TPMS_SCHEME_ECSCHNORR ecSchnorr;
- TPMS_SCHEME_HMAC hmac;
- TPMS_SCHEME_SIGHASH any;
+ TPMS_SCHEME_RSASSA rsassa;
+ TPMS_SCHEME_RSAPSS rsapss;
+ TPMS_SCHEME_ECDSA ecdsa;
+ TPMS_SCHEME_ECDAA ecdaa;
+ TPMS_SCHEME_ECSCHNORR ecSchnorr;
+ TPMS_SCHEME_HMAC hmac;
+ TPMS_SCHEME_SIGHASH any;
} TPMU_SIG_SCHEME;
// Table 142 - TPMT_SIG_SCHEME Structure
typedef struct {
- TPMI_ALG_SIG_SCHEME scheme;
- TPMU_SIG_SCHEME details;
+ TPMI_ALG_SIG_SCHEME scheme;
+ TPMU_SIG_SCHEME details;
} TPMT_SIG_SCHEME;
// Table 143 - TPMS_SCHEME_OAEP Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_OAEP;
// Table 144 - TPMS_SCHEME_ECDH Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_ECDH;
// Table 145 - TPMS_SCHEME_MGF1 Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_MGF1;
// Table 146 - TPMS_SCHEME_KDF1_SP800_56a Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_KDF1_SP800_56a;
// Table 147 - TPMS_SCHEME_KDF2 Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_KDF2;
// Table 148 - TPMS_SCHEME_KDF1_SP800_108 Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_KDF1_SP800_108;
// Table 149 - TPMU_KDF_SCHEME Union
typedef union {
- TPMS_SCHEME_MGF1 mgf1;
- TPMS_SCHEME_KDF1_SP800_56a kdf1_SP800_56a;
- TPMS_SCHEME_KDF2 kdf2;
- TPMS_SCHEME_KDF1_SP800_108 kdf1_sp800_108;
+ TPMS_SCHEME_MGF1 mgf1;
+ TPMS_SCHEME_KDF1_SP800_56a kdf1_SP800_56a;
+ TPMS_SCHEME_KDF2 kdf2;
+ TPMS_SCHEME_KDF1_SP800_108 kdf1_sp800_108;
} TPMU_KDF_SCHEME;
// Table 150 - TPMT_KDF_SCHEME Structure
typedef struct {
- TPMI_ALG_KDF scheme;
- TPMU_KDF_SCHEME details;
+ TPMI_ALG_KDF scheme;
+ TPMU_KDF_SCHEME details;
} TPMT_KDF_SCHEME;
// Table 151 - TPMI_ALG_ASYM_SCHEME Type
@@ -1419,19 +1412,19 @@ typedef TPM_ALG_ID TPMI_ALG_ASYM_SCHEME;
// Table 152 - TPMU_ASYM_SCHEME Union
typedef union {
- TPMS_SCHEME_RSASSA rsassa;
- TPMS_SCHEME_RSAPSS rsapss;
- TPMS_SCHEME_OAEP oaep;
- TPMS_SCHEME_ECDSA ecdsa;
- TPMS_SCHEME_ECDAA ecdaa;
- TPMS_SCHEME_ECSCHNORR ecSchnorr;
- TPMS_SCHEME_SIGHASH anySig;
+ TPMS_SCHEME_RSASSA rsassa;
+ TPMS_SCHEME_RSAPSS rsapss;
+ TPMS_SCHEME_OAEP oaep;
+ TPMS_SCHEME_ECDSA ecdsa;
+ TPMS_SCHEME_ECDAA ecdaa;
+ TPMS_SCHEME_ECSCHNORR ecSchnorr;
+ TPMS_SCHEME_SIGHASH anySig;
} TPMU_ASYM_SCHEME;
// Table 153 - TPMT_ASYM_SCHEME Structure
typedef struct {
- TPMI_ALG_ASYM_SCHEME scheme;
- TPMU_ASYM_SCHEME details;
+ TPMI_ALG_ASYM_SCHEME scheme;
+ TPMU_ASYM_SCHEME details;
} TPMT_ASYM_SCHEME;
// Table 154 - TPMI_ALG_RSA_SCHEME Type
@@ -1439,8 +1432,8 @@ typedef TPM_ALG_ID TPMI_ALG_RSA_SCHEME;
// Table 155 - TPMT_RSA_SCHEME Structure
typedef struct {
- TPMI_ALG_RSA_SCHEME scheme;
- TPMU_ASYM_SCHEME details;
+ TPMI_ALG_RSA_SCHEME scheme;
+ TPMU_ASYM_SCHEME details;
} TPMT_RSA_SCHEME;
// Table 156 - TPMI_ALG_RSA_DECRYPT Type
@@ -1448,14 +1441,14 @@ typedef TPM_ALG_ID TPMI_ALG_RSA_DECRYPT;
// Table 157 - TPMT_RSA_DECRYPT Structure
typedef struct {
- TPMI_ALG_RSA_DECRYPT scheme;
- TPMU_ASYM_SCHEME details;
+ TPMI_ALG_RSA_DECRYPT scheme;
+ TPMU_ASYM_SCHEME details;
} TPMT_RSA_DECRYPT;
// Table 158 - TPM2B_PUBLIC_KEY_RSA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_RSA_KEY_BYTES];
+ UINT16 size;
+ BYTE buffer[MAX_RSA_KEY_BYTES];
} TPM2B_PUBLIC_KEY_RSA;
// Table 159 - TPMI_RSA_KEY_BITS Type
@@ -1463,26 +1456,26 @@ typedef TPM_KEY_BITS TPMI_RSA_KEY_BITS;
// Table 160 - TPM2B_PRIVATE_KEY_RSA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_RSA_KEY_BYTES/2];
+ UINT16 size;
+ BYTE buffer[MAX_RSA_KEY_BYTES/2];
} TPM2B_PRIVATE_KEY_RSA;
// Table 161 - TPM2B_ECC_PARAMETER Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_ECC_KEY_BYTES];
+ UINT16 size;
+ BYTE buffer[MAX_ECC_KEY_BYTES];
} TPM2B_ECC_PARAMETER;
// Table 162 - TPMS_ECC_POINT Structure
typedef struct {
- TPM2B_ECC_PARAMETER x;
- TPM2B_ECC_PARAMETER y;
+ TPM2B_ECC_PARAMETER x;
+ TPM2B_ECC_PARAMETER y;
} TPMS_ECC_POINT;
// Table 163 -- TPM2B_ECC_POINT Structure <I/O>
typedef struct {
- UINT16 size;
- TPMS_ECC_POINT point;
+ UINT16 size;
+ TPMS_ECC_POINT point;
} TPM2B_ECC_POINT;
// Table 164 - TPMI_ALG_ECC_SCHEME Type
@@ -1493,74 +1486,74 @@ typedef TPM_ECC_CURVE TPMI_ECC_CURVE;
// Table 166 - TPMT_ECC_SCHEME Structure
typedef struct {
- TPMI_ALG_ECC_SCHEME scheme;
- TPMU_SIG_SCHEME details;
+ TPMI_ALG_ECC_SCHEME scheme;
+ TPMU_SIG_SCHEME details;
} TPMT_ECC_SCHEME;
// Table 167 - TPMS_ALGORITHM_DETAIL_ECC Structure
typedef struct {
- TPM_ECC_CURVE curveID;
- UINT16 keySize;
- TPMT_KDF_SCHEME kdf;
- TPMT_ECC_SCHEME sign;
- TPM2B_ECC_PARAMETER p;
- TPM2B_ECC_PARAMETER a;
- TPM2B_ECC_PARAMETER b;
- TPM2B_ECC_PARAMETER gX;
- TPM2B_ECC_PARAMETER gY;
- TPM2B_ECC_PARAMETER n;
- TPM2B_ECC_PARAMETER h;
+ TPM_ECC_CURVE curveID;
+ UINT16 keySize;
+ TPMT_KDF_SCHEME kdf;
+ TPMT_ECC_SCHEME sign;
+ TPM2B_ECC_PARAMETER p;
+ TPM2B_ECC_PARAMETER a;
+ TPM2B_ECC_PARAMETER b;
+ TPM2B_ECC_PARAMETER gX;
+ TPM2B_ECC_PARAMETER gY;
+ TPM2B_ECC_PARAMETER n;
+ TPM2B_ECC_PARAMETER h;
} TPMS_ALGORITHM_DETAIL_ECC;
// Table 168 - TPMS_SIGNATURE_RSASSA Structure
typedef struct {
- TPMI_ALG_HASH hash;
- TPM2B_PUBLIC_KEY_RSA sig;
+ TPMI_ALG_HASH hash;
+ TPM2B_PUBLIC_KEY_RSA sig;
} TPMS_SIGNATURE_RSASSA;
// Table 169 - TPMS_SIGNATURE_RSAPSS Structure
typedef struct {
- TPMI_ALG_HASH hash;
- TPM2B_PUBLIC_KEY_RSA sig;
+ TPMI_ALG_HASH hash;
+ TPM2B_PUBLIC_KEY_RSA sig;
} TPMS_SIGNATURE_RSAPSS;
// Table 170 - TPMS_SIGNATURE_ECDSA Structure
typedef struct {
- TPMI_ALG_HASH hash;
- TPM2B_ECC_PARAMETER signatureR;
- TPM2B_ECC_PARAMETER signatureS;
+ TPMI_ALG_HASH hash;
+ TPM2B_ECC_PARAMETER signatureR;
+ TPM2B_ECC_PARAMETER signatureS;
} TPMS_SIGNATURE_ECDSA;
// Table 171 - TPMU_SIGNATURE Union
typedef union {
- TPMS_SIGNATURE_RSASSA rsassa;
- TPMS_SIGNATURE_RSAPSS rsapss;
- TPMS_SIGNATURE_ECDSA ecdsa;
- TPMS_SIGNATURE_ECDSA sm2;
- TPMS_SIGNATURE_ECDSA ecdaa;
- TPMS_SIGNATURE_ECDSA ecschnorr;
- TPMT_HA hmac;
- TPMS_SCHEME_SIGHASH any;
+ TPMS_SIGNATURE_RSASSA rsassa;
+ TPMS_SIGNATURE_RSAPSS rsapss;
+ TPMS_SIGNATURE_ECDSA ecdsa;
+ TPMS_SIGNATURE_ECDSA sm2;
+ TPMS_SIGNATURE_ECDSA ecdaa;
+ TPMS_SIGNATURE_ECDSA ecschnorr;
+ TPMT_HA hmac;
+ TPMS_SCHEME_SIGHASH any;
} TPMU_SIGNATURE;
// Table 172 - TPMT_SIGNATURE Structure
typedef struct {
- TPMI_ALG_SIG_SCHEME sigAlg;
- TPMU_SIGNATURE signature;
+ TPMI_ALG_SIG_SCHEME sigAlg;
+ TPMU_SIGNATURE signature;
} TPMT_SIGNATURE;
// Table 173 - TPMU_ENCRYPTED_SECRET Union
typedef union {
- BYTE ecc[sizeof(TPMS_ECC_POINT)];
- BYTE rsa[MAX_RSA_KEY_BYTES];
- BYTE symmetric[sizeof(TPM2B_DIGEST)];
- BYTE keyedHash[sizeof(TPM2B_DIGEST)];
+ BYTE ecc[sizeof (TPMS_ECC_POINT)];
+ BYTE rsa[MAX_RSA_KEY_BYTES];
+ BYTE symmetric[sizeof (TPM2B_DIGEST)];
+ BYTE keyedHash[sizeof (TPM2B_DIGEST)];
} TPMU_ENCRYPTED_SECRET;
// Table 174 - TPM2B_ENCRYPTED_SECRET Structure
typedef struct {
- UINT16 size;
- BYTE secret[sizeof(TPMU_ENCRYPTED_SECRET)];
+ UINT16 size;
+ BYTE secret[sizeof (TPMU_ENCRYPTED_SECRET)];
} TPM2B_ENCRYPTED_SECRET;
// 12 Key/Object Complex
@@ -1570,122 +1563,122 @@ typedef TPM_ALG_ID TPMI_ALG_PUBLIC;
// Table 176 - TPMU_PUBLIC_ID Union
typedef union {
- TPM2B_DIGEST keyedHash;
- TPM2B_DIGEST sym;
- TPM2B_PUBLIC_KEY_RSA rsa;
- TPMS_ECC_POINT ecc;
+ TPM2B_DIGEST keyedHash;
+ TPM2B_DIGEST sym;
+ TPM2B_PUBLIC_KEY_RSA rsa;
+ TPMS_ECC_POINT ecc;
} TPMU_PUBLIC_ID;
// Table 177 - TPMS_KEYEDHASH_PARMS Structure
typedef struct {
- TPMT_KEYEDHASH_SCHEME scheme;
+ TPMT_KEYEDHASH_SCHEME scheme;
} TPMS_KEYEDHASH_PARMS;
// Table 178 - TPMS_ASYM_PARMS Structure
typedef struct {
- TPMT_SYM_DEF_OBJECT symmetric;
- TPMT_ASYM_SCHEME scheme;
+ TPMT_SYM_DEF_OBJECT symmetric;
+ TPMT_ASYM_SCHEME scheme;
} TPMS_ASYM_PARMS;
// Table 179 - TPMS_RSA_PARMS Structure
typedef struct {
- TPMT_SYM_DEF_OBJECT symmetric;
- TPMT_RSA_SCHEME scheme;
- TPMI_RSA_KEY_BITS keyBits;
- UINT32 exponent;
+ TPMT_SYM_DEF_OBJECT symmetric;
+ TPMT_RSA_SCHEME scheme;
+ TPMI_RSA_KEY_BITS keyBits;
+ UINT32 exponent;
} TPMS_RSA_PARMS;
// Table 180 - TPMS_ECC_PARMS Structure
typedef struct {
- TPMT_SYM_DEF_OBJECT symmetric;
- TPMT_ECC_SCHEME scheme;
- TPMI_ECC_CURVE curveID;
- TPMT_KDF_SCHEME kdf;
+ TPMT_SYM_DEF_OBJECT symmetric;
+ TPMT_ECC_SCHEME scheme;
+ TPMI_ECC_CURVE curveID;
+ TPMT_KDF_SCHEME kdf;
} TPMS_ECC_PARMS;
// Table 181 - TPMU_PUBLIC_PARMS Union
typedef union {
- TPMS_KEYEDHASH_PARMS keyedHashDetail;
- TPMT_SYM_DEF_OBJECT symDetail;
- TPMS_RSA_PARMS rsaDetail;
- TPMS_ECC_PARMS eccDetail;
- TPMS_ASYM_PARMS asymDetail;
+ TPMS_KEYEDHASH_PARMS keyedHashDetail;
+ TPMT_SYM_DEF_OBJECT symDetail;
+ TPMS_RSA_PARMS rsaDetail;
+ TPMS_ECC_PARMS eccDetail;
+ TPMS_ASYM_PARMS asymDetail;
} TPMU_PUBLIC_PARMS;
// Table 182 - TPMT_PUBLIC_PARMS Structure
typedef struct {
- TPMI_ALG_PUBLIC type;
- TPMU_PUBLIC_PARMS parameters;
+ TPMI_ALG_PUBLIC type;
+ TPMU_PUBLIC_PARMS parameters;
} TPMT_PUBLIC_PARMS;
// Table 183 - TPMT_PUBLIC Structure
typedef struct {
- TPMI_ALG_PUBLIC type;
- TPMI_ALG_HASH nameAlg;
- TPMA_OBJECT objectAttributes;
- TPM2B_DIGEST authPolicy;
- TPMU_PUBLIC_PARMS parameters;
- TPMU_PUBLIC_ID unique;
+ TPMI_ALG_PUBLIC type;
+ TPMI_ALG_HASH nameAlg;
+ TPMA_OBJECT objectAttributes;
+ TPM2B_DIGEST authPolicy;
+ TPMU_PUBLIC_PARMS parameters;
+ TPMU_PUBLIC_ID unique;
} TPMT_PUBLIC;
// Table 184 - TPM2B_PUBLIC Structure
typedef struct {
- UINT16 size;
- TPMT_PUBLIC publicArea;
+ UINT16 size;
+ TPMT_PUBLIC publicArea;
} TPM2B_PUBLIC;
// Table 185 - TPM2B_PRIVATE_VENDOR_SPECIFIC Structure
typedef struct {
- UINT16 size;
- BYTE buffer[PRIVATE_VENDOR_SPECIFIC_BYTES];
+ UINT16 size;
+ BYTE buffer[PRIVATE_VENDOR_SPECIFIC_BYTES];
} TPM2B_PRIVATE_VENDOR_SPECIFIC;
// Table 186 - TPMU_SENSITIVE_COMPOSITE Union
typedef union {
- TPM2B_PRIVATE_KEY_RSA rsa;
- TPM2B_ECC_PARAMETER ecc;
- TPM2B_SENSITIVE_DATA bits;
- TPM2B_SYM_KEY sym;
- TPM2B_PRIVATE_VENDOR_SPECIFIC any;
+ TPM2B_PRIVATE_KEY_RSA rsa;
+ TPM2B_ECC_PARAMETER ecc;
+ TPM2B_SENSITIVE_DATA bits;
+ TPM2B_SYM_KEY sym;
+ TPM2B_PRIVATE_VENDOR_SPECIFIC any;
} TPMU_SENSITIVE_COMPOSITE;
// Table 187 - TPMT_SENSITIVE Structure
typedef struct {
- TPMI_ALG_PUBLIC sensitiveType;
- TPM2B_AUTH authValue;
- TPM2B_DIGEST seedValue;
- TPMU_SENSITIVE_COMPOSITE sensitive;
+ TPMI_ALG_PUBLIC sensitiveType;
+ TPM2B_AUTH authValue;
+ TPM2B_DIGEST seedValue;
+ TPMU_SENSITIVE_COMPOSITE sensitive;
} TPMT_SENSITIVE;
// Table 188 - TPM2B_SENSITIVE Structure
typedef struct {
- UINT16 size;
- TPMT_SENSITIVE sensitiveArea;
+ UINT16 size;
+ TPMT_SENSITIVE sensitiveArea;
} TPM2B_SENSITIVE;
// Table 189 - _PRIVATE Structure
typedef struct {
- TPM2B_DIGEST integrityOuter;
- TPM2B_DIGEST integrityInner;
- TPMT_SENSITIVE sensitive;
+ TPM2B_DIGEST integrityOuter;
+ TPM2B_DIGEST integrityInner;
+ TPMT_SENSITIVE sensitive;
} _PRIVATE;
// Table 190 - TPM2B_PRIVATE Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(_PRIVATE)];
+ UINT16 size;
+ BYTE buffer[sizeof (_PRIVATE)];
} TPM2B_PRIVATE;
// Table 191 - _ID_OBJECT Structure
typedef struct {
- TPM2B_DIGEST integrityHMAC;
- TPM2B_DIGEST encIdentity;
+ TPM2B_DIGEST integrityHMAC;
+ TPM2B_DIGEST encIdentity;
} _ID_OBJECT;
// Table 192 - TPM2B_ID_OBJECT Structure
typedef struct {
- UINT16 size;
- BYTE credential[sizeof(_ID_OBJECT)];
+ UINT16 size;
+ BYTE credential[sizeof (_ID_OBJECT)];
} TPM2B_ID_OBJECT;
// 13 NV Storage Structures
@@ -1694,118 +1687,117 @@ typedef struct {
//
// NOTE: Comment here to resolve conflict
//
-//typedef struct {
+// typedef struct {
// UINT32 index : 22;
// UINT32 space : 2;
// UINT32 RH_NV : 8;
-//} TPM_NV_INDEX;
+// } TPM_NV_INDEX;
// Table 195 - TPMA_NV Bits
typedef struct {
- UINT32 TPMA_NV_PPWRITE : 1;
- UINT32 TPMA_NV_OWNERWRITE : 1;
- UINT32 TPMA_NV_AUTHWRITE : 1;
- UINT32 TPMA_NV_POLICYWRITE : 1;
- UINT32 TPMA_NV_COUNTER : 1;
- UINT32 TPMA_NV_BITS : 1;
- UINT32 TPMA_NV_EXTEND : 1;
- UINT32 reserved7_9 : 3;
- UINT32 TPMA_NV_POLICY_DELETE : 1;
- UINT32 TPMA_NV_WRITELOCKED : 1;
- UINT32 TPMA_NV_WRITEALL : 1;
- UINT32 TPMA_NV_WRITEDEFINE : 1;
- UINT32 TPMA_NV_WRITE_STCLEAR : 1;
- UINT32 TPMA_NV_GLOBALLOCK : 1;
- UINT32 TPMA_NV_PPREAD : 1;
- UINT32 TPMA_NV_OWNERREAD : 1;
- UINT32 TPMA_NV_AUTHREAD : 1;
- UINT32 TPMA_NV_POLICYREAD : 1;
- UINT32 reserved20_24 : 5;
- UINT32 TPMA_NV_NO_DA : 1;
- UINT32 TPMA_NV_ORDERLY : 1;
- UINT32 TPMA_NV_CLEAR_STCLEAR : 1;
- UINT32 TPMA_NV_READLOCKED : 1;
- UINT32 TPMA_NV_WRITTEN : 1;
- UINT32 TPMA_NV_PLATFORMCREATE : 1;
- UINT32 TPMA_NV_READ_STCLEAR : 1;
+ UINT32 TPMA_NV_PPWRITE : 1;
+ UINT32 TPMA_NV_OWNERWRITE : 1;
+ UINT32 TPMA_NV_AUTHWRITE : 1;
+ UINT32 TPMA_NV_POLICYWRITE : 1;
+ UINT32 TPMA_NV_COUNTER : 1;
+ UINT32 TPMA_NV_BITS : 1;
+ UINT32 TPMA_NV_EXTEND : 1;
+ UINT32 reserved7_9 : 3;
+ UINT32 TPMA_NV_POLICY_DELETE : 1;
+ UINT32 TPMA_NV_WRITELOCKED : 1;
+ UINT32 TPMA_NV_WRITEALL : 1;
+ UINT32 TPMA_NV_WRITEDEFINE : 1;
+ UINT32 TPMA_NV_WRITE_STCLEAR : 1;
+ UINT32 TPMA_NV_GLOBALLOCK : 1;
+ UINT32 TPMA_NV_PPREAD : 1;
+ UINT32 TPMA_NV_OWNERREAD : 1;
+ UINT32 TPMA_NV_AUTHREAD : 1;
+ UINT32 TPMA_NV_POLICYREAD : 1;
+ UINT32 reserved20_24 : 5;
+ UINT32 TPMA_NV_NO_DA : 1;
+ UINT32 TPMA_NV_ORDERLY : 1;
+ UINT32 TPMA_NV_CLEAR_STCLEAR : 1;
+ UINT32 TPMA_NV_READLOCKED : 1;
+ UINT32 TPMA_NV_WRITTEN : 1;
+ UINT32 TPMA_NV_PLATFORMCREATE : 1;
+ UINT32 TPMA_NV_READ_STCLEAR : 1;
} TPMA_NV;
// Table 196 - TPMS_NV_PUBLIC Structure
typedef struct {
- TPMI_RH_NV_INDEX nvIndex;
- TPMI_ALG_HASH nameAlg;
- TPMA_NV attributes;
- TPM2B_DIGEST authPolicy;
- UINT16 dataSize;
+ TPMI_RH_NV_INDEX nvIndex;
+ TPMI_ALG_HASH nameAlg;
+ TPMA_NV attributes;
+ TPM2B_DIGEST authPolicy;
+ UINT16 dataSize;
} TPMS_NV_PUBLIC;
// Table 197 - TPM2B_NV_PUBLIC Structure
typedef struct {
- UINT16 size;
- TPMS_NV_PUBLIC nvPublic;
+ UINT16 size;
+ TPMS_NV_PUBLIC nvPublic;
} TPM2B_NV_PUBLIC;
// 14 Context Data
// Table 198 - TPM2B_CONTEXT_SENSITIVE Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_CONTEXT_SIZE];
+ UINT16 size;
+ BYTE buffer[MAX_CONTEXT_SIZE];
} TPM2B_CONTEXT_SENSITIVE;
// Table 199 - TPMS_CONTEXT_DATA Structure
typedef struct {
- TPM2B_DIGEST integrity;
- TPM2B_CONTEXT_SENSITIVE encrypted;
+ TPM2B_DIGEST integrity;
+ TPM2B_CONTEXT_SENSITIVE encrypted;
} TPMS_CONTEXT_DATA;
// Table 200 - TPM2B_CONTEXT_DATA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(TPMS_CONTEXT_DATA)];
+ UINT16 size;
+ BYTE buffer[sizeof (TPMS_CONTEXT_DATA)];
} TPM2B_CONTEXT_DATA;
// Table 201 - TPMS_CONTEXT Structure
typedef struct {
- UINT64 sequence;
- TPMI_DH_CONTEXT savedHandle;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_CONTEXT_DATA contextBlob;
+ UINT64 sequence;
+ TPMI_DH_CONTEXT savedHandle;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_CONTEXT_DATA contextBlob;
} TPMS_CONTEXT;
// 15 Creation Data
// Table 203 - TPMS_CREATION_DATA Structure
typedef struct {
- TPML_PCR_SELECTION pcrSelect;
- TPM2B_DIGEST pcrDigest;
- TPMA_LOCALITY locality;
- TPM_ALG_ID parentNameAlg;
- TPM2B_NAME parentName;
- TPM2B_NAME parentQualifiedName;
- TPM2B_DATA outsideInfo;
+ TPML_PCR_SELECTION pcrSelect;
+ TPM2B_DIGEST pcrDigest;
+ TPMA_LOCALITY locality;
+ TPM_ALG_ID parentNameAlg;
+ TPM2B_NAME parentName;
+ TPM2B_NAME parentQualifiedName;
+ TPM2B_DATA outsideInfo;
} TPMS_CREATION_DATA;
// Table 204 - TPM2B_CREATION_DATA Structure
typedef struct {
- UINT16 size;
- TPMS_CREATION_DATA creationData;
+ UINT16 size;
+ TPMS_CREATION_DATA creationData;
} TPM2B_CREATION_DATA;
-
//
// Command Header
//
typedef struct {
- TPM_ST tag;
- UINT32 paramSize;
- TPM_CC commandCode;
+ TPM_ST tag;
+ UINT32 paramSize;
+ TPM_CC commandCode;
} TPM2_COMMAND_HEADER;
typedef struct {
- TPM_ST tag;
- UINT32 paramSize;
- TPM_RC responseCode;
+ TPM_ST tag;
+ UINT32 paramSize;
+ TPM_RC responseCode;
} TPM2_RESPONSE_HEADER;
#pragma pack ()
@@ -1813,10 +1805,10 @@ typedef struct {
//
// TCG Algorithm Registry
//
-#define HASH_ALG_SHA1 0x00000001
-#define HASH_ALG_SHA256 0x00000002
-#define HASH_ALG_SHA384 0x00000004
-#define HASH_ALG_SHA512 0x00000008
-#define HASH_ALG_SM3_256 0x00000010
+#define HASH_ALG_SHA1 0x00000001
+#define HASH_ALG_SHA256 0x00000002
+#define HASH_ALG_SHA384 0x00000004
+#define HASH_ALG_SHA512 0x00000008
+#define HASH_ALG_SM3_256 0x00000010
#endif
diff --git a/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h b/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h
index 3394c7cbe..a89986712 100644
--- a/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h
+++ b/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h
@@ -1,21 +1,16 @@
/** @file
- TCG EFI Platform Definition in TCG_EFI_Platform_1_20_Final
+ TCG EFI Platform Definition in TCG_EFI_Platform_1_20_Final and
+ TCG PC Client Platform Firmware Profile Specification, Revision 1.05
- Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __UEFI_TCG_PLATFORM_H__
#define __UEFI_TCG_PLATFORM_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Tpm12.h>
#include <ipxe/efi/IndustryStandard/Tpm20.h>
@@ -24,32 +19,46 @@ FILE_LICENCE ( BSD3 );
//
// Standard event types
//
+#define EV_PREBOOT_CERT ((TCG_EVENTTYPE) 0x00000000)
#define EV_POST_CODE ((TCG_EVENTTYPE) 0x00000001)
#define EV_NO_ACTION ((TCG_EVENTTYPE) 0x00000003)
#define EV_SEPARATOR ((TCG_EVENTTYPE) 0x00000004)
+#define EV_ACTION ((TCG_EVENTTYPE) 0x00000005)
+#define EV_EVENT_TAG ((TCG_EVENTTYPE) 0x00000006)
#define EV_S_CRTM_CONTENTS ((TCG_EVENTTYPE) 0x00000007)
#define EV_S_CRTM_VERSION ((TCG_EVENTTYPE) 0x00000008)
#define EV_CPU_MICROCODE ((TCG_EVENTTYPE) 0x00000009)
+#define EV_PLATFORM_CONFIG_FLAGS ((TCG_EVENTTYPE) 0x0000000A)
#define EV_TABLE_OF_DEVICES ((TCG_EVENTTYPE) 0x0000000B)
+#define EV_COMPACT_HASH ((TCG_EVENTTYPE) 0x0000000C)
+#define EV_NONHOST_CODE ((TCG_EVENTTYPE) 0x0000000F)
+#define EV_NONHOST_CONFIG ((TCG_EVENTTYPE) 0x00000010)
+#define EV_NONHOST_INFO ((TCG_EVENTTYPE) 0x00000011)
+#define EV_OMIT_BOOT_DEVICE_EVENTS ((TCG_EVENTTYPE) 0x00000012)
//
// EFI specific event types
//
-#define EV_EFI_EVENT_BASE ((TCG_EVENTTYPE) 0x80000000)
-#define EV_EFI_VARIABLE_DRIVER_CONFIG (EV_EFI_EVENT_BASE + 1)
-#define EV_EFI_VARIABLE_BOOT (EV_EFI_EVENT_BASE + 2)
-#define EV_EFI_BOOT_SERVICES_APPLICATION (EV_EFI_EVENT_BASE + 3)
-#define EV_EFI_BOOT_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 4)
-#define EV_EFI_RUNTIME_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 5)
-#define EV_EFI_GPT_EVENT (EV_EFI_EVENT_BASE + 6)
-#define EV_EFI_ACTION (EV_EFI_EVENT_BASE + 7)
-#define EV_EFI_PLATFORM_FIRMWARE_BLOB (EV_EFI_EVENT_BASE + 8)
-#define EV_EFI_HANDOFF_TABLES (EV_EFI_EVENT_BASE + 9)
-#define EV_EFI_VARIABLE_AUTHORITY (EV_EFI_EVENT_BASE + 0xE0)
+#define EV_EFI_EVENT_BASE ((TCG_EVENTTYPE) 0x80000000)
+#define EV_EFI_VARIABLE_DRIVER_CONFIG (EV_EFI_EVENT_BASE + 1)
+#define EV_EFI_VARIABLE_BOOT (EV_EFI_EVENT_BASE + 2)
+#define EV_EFI_BOOT_SERVICES_APPLICATION (EV_EFI_EVENT_BASE + 3)
+#define EV_EFI_BOOT_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 4)
+#define EV_EFI_RUNTIME_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 5)
+#define EV_EFI_GPT_EVENT (EV_EFI_EVENT_BASE + 6)
+#define EV_EFI_ACTION (EV_EFI_EVENT_BASE + 7)
+#define EV_EFI_PLATFORM_FIRMWARE_BLOB (EV_EFI_EVENT_BASE + 8)
+#define EV_EFI_HANDOFF_TABLES (EV_EFI_EVENT_BASE + 9)
+#define EV_EFI_PLATFORM_FIRMWARE_BLOB2 (EV_EFI_EVENT_BASE + 0xA)
+#define EV_EFI_HANDOFF_TABLES2 (EV_EFI_EVENT_BASE + 0xB)
+#define EV_EFI_HCRTM_EVENT (EV_EFI_EVENT_BASE + 0x10)
+#define EV_EFI_VARIABLE_AUTHORITY (EV_EFI_EVENT_BASE + 0xE0)
+#define EV_EFI_SPDM_FIRMWARE_BLOB (EV_EFI_EVENT_BASE + 0xE1)
+#define EV_EFI_SPDM_FIRMWARE_CONFIG (EV_EFI_EVENT_BASE + 0xE2)
#define EFI_CALLING_EFI_APPLICATION \
"Calling EFI Application from Boot Option"
-#define EFI_RETURNING_FROM_EFI_APPLICATOIN \
+#define EFI_RETURNING_FROM_EFI_APPLICATION \
"Returning from EFI Application from Boot Option"
#define EFI_EXIT_BOOT_SERVICES_INVOCATION \
"Exit Boot Services Invocation"
@@ -58,24 +67,26 @@ FILE_LICENCE ( BSD3 );
#define EFI_EXIT_BOOT_SERVICES_SUCCEEDED \
"Exit Boot Services Returned with Success"
+#define EV_POSTCODE_INFO_POST_CODE "POST CODE"
+#define POST_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_POST_CODE) - 1)
-#define EV_POSTCODE_INFO_POST_CODE "POST CODE"
-#define POST_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_POST_CODE) - 1)
+#define EV_POSTCODE_INFO_SMM_CODE "SMM CODE"
+#define SMM_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_SMM_CODE) - 1)
-#define EV_POSTCODE_INFO_SMM_CODE "SMM CODE"
-#define SMM_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_SMM_CODE) - 1)
+#define EV_POSTCODE_INFO_ACPI_DATA "ACPI DATA"
+#define ACPI_DATA_LEN (sizeof(EV_POSTCODE_INFO_ACPI_DATA) - 1)
-#define EV_POSTCODE_INFO_ACPI_DATA "ACPI DATA"
-#define ACPI_DATA_LEN (sizeof(EV_POSTCODE_INFO_ACPI_DATA) - 1)
+#define EV_POSTCODE_INFO_BIS_CODE "BIS CODE"
+#define BIS_CODE_LEN (sizeof(EV_POSTCODE_INFO_BIS_CODE) - 1)
-#define EV_POSTCODE_INFO_BIS_CODE "BIS CODE"
-#define BIS_CODE_LEN (sizeof(EV_POSTCODE_INFO_BIS_CODE) - 1)
+#define EV_POSTCODE_INFO_UEFI_PI "UEFI PI"
+#define UEFI_PI_LEN (sizeof(EV_POSTCODE_INFO_UEFI_PI) - 1)
-#define EV_POSTCODE_INFO_UEFI_PI "UEFI PI"
-#define UEFI_PI_LEN (sizeof(EV_POSTCODE_INFO_UEFI_PI) - 1)
+#define EV_POSTCODE_INFO_OPROM "Embedded Option ROM"
+#define OPROM_LEN (sizeof(EV_POSTCODE_INFO_OPROM) - 1)
-#define EV_POSTCODE_INFO_OPROM "Embedded Option ROM"
-#define OPROM_LEN (sizeof(EV_POSTCODE_INFO_OPROM) - 1)
+#define EV_POSTCODE_INFO_EMBEDDED_UEFI_DRIVER "Embedded UEFI Driver"
+#define EMBEDDED_UEFI_DRIVER_LEN (sizeof(EV_POSTCODE_INFO_EMBEDDED_UEFI_DRIVER) - 1)
#define FIRMWARE_DEBUGGER_EVENT_STRING "UEFI Debug Mode"
#define FIRMWARE_DEBUGGER_EVENT_STRING_LEN (sizeof(FIRMWARE_DEBUGGER_EVENT_STRING) - 1)
@@ -85,30 +96,30 @@ FILE_LICENCE ( BSD3 );
//
#pragma pack (1)
-typedef UINT32 TCG_EVENTTYPE;
-typedef TPM_PCRINDEX TCG_PCRINDEX;
-typedef TPM_DIGEST TCG_DIGEST;
+typedef UINT32 TCG_EVENTTYPE;
+typedef TPM_PCRINDEX TCG_PCRINDEX;
+typedef TPM_DIGEST TCG_DIGEST;
///
/// Event Log Entry Structure Definition
///
typedef struct tdTCG_PCR_EVENT {
- TCG_PCRINDEX PCRIndex; ///< PCRIndex event extended to
- TCG_EVENTTYPE EventType; ///< TCG EFI event type
- TCG_DIGEST Digest; ///< Value extended into PCRIndex
- UINT32 EventSize; ///< Size of the event data
- UINT8 Event[1]; ///< The event data
+ TCG_PCRINDEX PCRIndex; ///< PCRIndex event extended to
+ TCG_EVENTTYPE EventType; ///< TCG EFI event type
+ TCG_DIGEST Digest; ///< Value extended into PCRIndex
+ UINT32 EventSize; ///< Size of the event data
+ UINT8 Event[1]; ///< The event data
} TCG_PCR_EVENT;
-#define TSS_EVENT_DATA_MAX_SIZE 256
+#define TSS_EVENT_DATA_MAX_SIZE 256
///
/// TCG_PCR_EVENT_HDR
///
typedef struct tdTCG_PCR_EVENT_HDR {
- TCG_PCRINDEX PCRIndex;
- TCG_EVENTTYPE EventType;
- TCG_DIGEST Digest;
- UINT32 EventSize;
+ TCG_PCRINDEX PCRIndex;
+ TCG_EVENTTYPE EventType;
+ TCG_DIGEST Digest;
+ UINT32 EventSize;
} TCG_PCR_EVENT_HDR;
///
@@ -118,36 +129,98 @@ typedef struct tdTCG_PCR_EVENT_HDR {
/// because PEI is 32-bit while DXE is 64-bit on x64 platforms
///
typedef struct tdEFI_PLATFORM_FIRMWARE_BLOB {
- EFI_PHYSICAL_ADDRESS BlobBase;
- UINT64 BlobLength;
+ EFI_PHYSICAL_ADDRESS BlobBase;
+ UINT64 BlobLength;
} EFI_PLATFORM_FIRMWARE_BLOB;
///
+/// UEFI_PLATFORM_FIRMWARE_BLOB
+///
+/// This structure is used in EV_EFI_PLATFORM_FIRMWARE_BLOB
+/// event to facilitate the measurement of firmware volume.
+///
+typedef struct tdUEFI_PLATFORM_FIRMWARE_BLOB {
+ EFI_PHYSICAL_ADDRESS BlobBase;
+ UINT64 BlobLength;
+} UEFI_PLATFORM_FIRMWARE_BLOB;
+
+///
+/// UEFI_PLATFORM_FIRMWARE_BLOB2
+///
+/// This structure is used in EV_EFI_PLATFORM_FIRMWARE_BLOB2
+/// event to facilitate the measurement of firmware volume.
+///
+typedef struct tdUEFI_PLATFORM_FIRMWARE_BLOB2 {
+ UINT8 BlobDescriptionSize;
+ // UINT8 BlobDescription[BlobDescriptionSize];
+ // EFI_PHYSICAL_ADDRESS BlobBase;
+ // UINT64 BlobLength;
+} UEFI_PLATFORM_FIRMWARE_BLOB2;
+
+///
/// EFI_IMAGE_LOAD_EVENT
///
/// This structure is used in EV_EFI_BOOT_SERVICES_APPLICATION,
/// EV_EFI_BOOT_SERVICES_DRIVER and EV_EFI_RUNTIME_SERVICES_DRIVER
///
typedef struct tdEFI_IMAGE_LOAD_EVENT {
- EFI_PHYSICAL_ADDRESS ImageLocationInMemory;
- UINTN ImageLengthInMemory;
- UINTN ImageLinkTimeAddress;
- UINTN LengthOfDevicePath;
- EFI_DEVICE_PATH_PROTOCOL DevicePath[1];
+ EFI_PHYSICAL_ADDRESS ImageLocationInMemory;
+ UINTN ImageLengthInMemory;
+ UINTN ImageLinkTimeAddress;
+ UINTN LengthOfDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL DevicePath[1];
} EFI_IMAGE_LOAD_EVENT;
///
+/// UEFI_IMAGE_LOAD_EVENT
+///
+/// This structure is used in EV_EFI_BOOT_SERVICES_APPLICATION,
+/// EV_EFI_BOOT_SERVICES_DRIVER and EV_EFI_RUNTIME_SERVICES_DRIVER
+///
+typedef struct tdUEFI_IMAGE_LOAD_EVENT {
+ EFI_PHYSICAL_ADDRESS ImageLocationInMemory;
+ UINT64 ImageLengthInMemory;
+ UINT64 ImageLinkTimeAddress;
+ UINT64 LengthOfDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL DevicePath[1];
+} UEFI_IMAGE_LOAD_EVENT;
+
+///
/// EFI_HANDOFF_TABLE_POINTERS
///
/// This structure is used in EV_EFI_HANDOFF_TABLES event to facilitate
/// the measurement of given configuration tables.
///
typedef struct tdEFI_HANDOFF_TABLE_POINTERS {
- UINTN NumberOfTables;
- EFI_CONFIGURATION_TABLE TableEntry[1];
+ UINTN NumberOfTables;
+ EFI_CONFIGURATION_TABLE TableEntry[1];
} EFI_HANDOFF_TABLE_POINTERS;
///
+/// UEFI_HANDOFF_TABLE_POINTERS
+///
+/// This structure is used in EV_EFI_HANDOFF_TABLES event to facilitate
+/// the measurement of given configuration tables.
+///
+typedef struct tdUEFI_HANDOFF_TABLE_POINTERS {
+ UINT64 NumberOfTables;
+ EFI_CONFIGURATION_TABLE TableEntry[1];
+} UEFI_HANDOFF_TABLE_POINTERS;
+
+///
+/// UEFI_HANDOFF_TABLE_POINTERS2
+///
+/// This structure is used in EV_EFI_HANDOFF_TABLES2 event to facilitate
+/// the measurement of given configuration tables.
+///
+typedef struct tdUEFI_HANDOFF_TABLE_POINTERS2 {
+ UINT8 TableDescriptionSize;
+ // UINT8 TableDescription[TableDescriptionSize];
+ // UINT64 NumberOfTables;
+ // EFI_CONFIGURATION_TABLE TableEntry[1];
+} UEFI_HANDOFF_TABLE_POINTERS2;
+
+///
/// EFI_VARIABLE_DATA
///
/// This structure serves as the header for measuring variables. The name of the
@@ -156,11 +229,11 @@ typedef struct tdEFI_HANDOFF_TABLE_POINTERS {
/// This is defined in TCG EFI Platform Spec for TPM1.1 or 1.2 V1.22
///
typedef struct tdEFI_VARIABLE_DATA {
- EFI_GUID VariableName;
- UINTN UnicodeNameLength;
- UINTN VariableDataLength;
- CHAR16 UnicodeName[1];
- INT8 VariableData[1]; ///< Driver or platform-specific data
+ EFI_GUID VariableName;
+ UINTN UnicodeNameLength;
+ UINTN VariableDataLength;
+ CHAR16 UnicodeName[1];
+ INT8 VariableData[1]; ///< Driver or platform-specific data
} EFI_VARIABLE_DATA;
///
@@ -172,50 +245,110 @@ typedef struct tdEFI_VARIABLE_DATA {
/// This is defined in TCG PC Client Firmware Profile Spec 00.21
///
typedef struct tdUEFI_VARIABLE_DATA {
- EFI_GUID VariableName;
- UINT64 UnicodeNameLength;
- UINT64 VariableDataLength;
- CHAR16 UnicodeName[1];
- INT8 VariableData[1]; ///< Driver or platform-specific data
+ EFI_GUID VariableName;
+ UINT64 UnicodeNameLength;
+ UINT64 VariableDataLength;
+ CHAR16 UnicodeName[1];
+ INT8 VariableData[1]; ///< Driver or platform-specific data
} UEFI_VARIABLE_DATA;
//
// For TrEE1.0 compatibility
//
typedef struct {
- EFI_GUID VariableName;
- UINT64 UnicodeNameLength; // The TCG Definition used UINTN
- UINT64 VariableDataLength; // The TCG Definition used UINTN
- CHAR16 UnicodeName[1];
- INT8 VariableData[1];
+ EFI_GUID VariableName;
+ UINT64 UnicodeNameLength; // The TCG Definition used UINTN
+ UINT64 VariableDataLength; // The TCG Definition used UINTN
+ CHAR16 UnicodeName[1];
+ INT8 VariableData[1];
} EFI_VARIABLE_DATA_TREE;
typedef struct tdEFI_GPT_DATA {
- EFI_PARTITION_TABLE_HEADER EfiPartitionHeader;
- UINTN NumberOfPartitions;
- EFI_PARTITION_ENTRY Partitions[1];
+ EFI_PARTITION_TABLE_HEADER EfiPartitionHeader;
+ UINTN NumberOfPartitions;
+ EFI_PARTITION_ENTRY Partitions[1];
} EFI_GPT_DATA;
+typedef struct tdUEFI_GPT_DATA {
+ EFI_PARTITION_TABLE_HEADER EfiPartitionHeader;
+ UINT64 NumberOfPartitions;
+ EFI_PARTITION_ENTRY Partitions[1];
+} UEFI_GPT_DATA;
+
+#define TCG_DEVICE_SECURITY_EVENT_DATA_SIGNATURE "SPDM Device Sec"
+#define TCG_DEVICE_SECURITY_EVENT_DATA_VERSION 1
+
+#define TCG_DEVICE_SECURITY_EVENT_DATA_DEVICE_TYPE_NULL 0
+#define TCG_DEVICE_SECURITY_EVENT_DATA_DEVICE_TYPE_PCI 1
+#define TCG_DEVICE_SECURITY_EVENT_DATA_DEVICE_TYPE_USB 2
+
+///
+/// TCG_DEVICE_SECURITY_EVENT_DATA_HEADER
+/// This is the header of TCG_DEVICE_SECURITY_EVENT_DATA, which is
+/// used in EV_EFI_SPDM_FIRMWARE_BLOB and EV_EFI_SPDM_FIRMWARE_CONFIG.
+///
+typedef struct {
+ UINT8 Signature[16];
+ UINT16 Version;
+ UINT16 Length;
+ UINT32 SpdmHashAlgo;
+ UINT32 DeviceType;
+ // SPDM_MEASUREMENT_BLOCK SpdmMeasurementBlock;
+} TCG_DEVICE_SECURITY_EVENT_DATA_HEADER;
+
+#define TCG_DEVICE_SECURITY_EVENT_DATA_PCI_CONTEXT_VERSION 0
+
+///
+/// TCG_DEVICE_SECURITY_EVENT_DATA_PCI_CONTEXT
+/// This is the PCI context data of TCG_DEVICE_SECURITY_EVENT_DATA, which is
+/// used in EV_EFI_SPDM_FIRMWARE_BLOB and EV_EFI_SPDM_FIRMWARE_CONFIG.
+///
+typedef struct {
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT8 RevisionID;
+ UINT8 ClassCode[3];
+ UINT16 SubsystemVendorID;
+ UINT16 SubsystemID;
+} TCG_DEVICE_SECURITY_EVENT_DATA_PCI_CONTEXT;
+
+#define TCG_DEVICE_SECURITY_EVENT_DATA_USB_CONTEXT_VERSION 0
+
+///
+/// TCG_DEVICE_SECURITY_EVENT_DATA_USB_CONTEXT
+/// This is the USB context data of TCG_DEVICE_SECURITY_EVENT_DATA, which is
+/// used in EV_EFI_SPDM_FIRMWARE_BLOB and EV_EFI_SPDM_FIRMWARE_CONFIG.
+///
+typedef struct {
+ UINT16 Version;
+ UINT16 Length;
+ // UINT8 DeviceDescriptor[DescLen];
+ // UINT8 BodDescriptor[DescLen];
+ // UINT8 ConfigurationDescriptor[DescLen][NumOfConfiguration];
+} TCG_DEVICE_SECURITY_EVENT_DATA_USB_CONTEXT;
+
//
// Crypto Agile Log Entry Format
//
typedef struct tdTCG_PCR_EVENT2 {
- TCG_PCRINDEX PCRIndex;
- TCG_EVENTTYPE EventType;
- TPML_DIGEST_VALUES Digest;
- UINT32 EventSize;
- UINT8 Event[1];
+ TCG_PCRINDEX PCRIndex;
+ TCG_EVENTTYPE EventType;
+ TPML_DIGEST_VALUES Digest;
+ UINT32 EventSize;
+ UINT8 Event[1];
} TCG_PCR_EVENT2;
//
// TCG PCR Event2 Header
// Follow TCG EFI Protocol Spec 5.2 Crypto Agile Log Entry Format
//
-typedef struct tdTCG_PCR_EVENT2_HDR{
- TCG_PCRINDEX PCRIndex;
- TCG_EVENTTYPE EventType;
- TPML_DIGEST_VALUES Digests;
- UINT32 EventSize;
+typedef struct tdTCG_PCR_EVENT2_HDR {
+ TCG_PCRINDEX PCRIndex;
+ TCG_EVENTTYPE EventType;
+ TPML_DIGEST_VALUES Digests;
+ UINT32 EventSize;
} TCG_PCR_EVENT2_HDR;
//
@@ -225,111 +358,140 @@ typedef struct {
//
// TCG defined hashing algorithm ID.
//
- UINT16 algorithmId;
+ UINT16 algorithmId;
//
// The size of the digest for the respective hashing algorithm.
//
- UINT16 digestSize;
+ UINT16 digestSize;
} TCG_EfiSpecIdEventAlgorithmSize;
-#define TCG_EfiSpecIDEventStruct_SIGNATURE_02 "Spec ID Event02"
-#define TCG_EfiSpecIDEventStruct_SIGNATURE_03 "Spec ID Event03"
+#define TCG_EfiSpecIDEventStruct_SIGNATURE_02 "Spec ID Event02"
+#define TCG_EfiSpecIDEventStruct_SIGNATURE_03 "Spec ID Event03"
-#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MAJOR_TPM12 1
-#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MINOR_TPM12 2
-#define TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM12 2
+#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MAJOR_TPM12 1
+#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MINOR_TPM12 2
+#define TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM12 2
#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MAJOR_TPM2 2
#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MINOR_TPM2 0
#define TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM2 0
+#define TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM2_REV_105 105
typedef struct {
- UINT8 signature[16];
+ UINT8 signature[16];
//
// The value for the Platform Class.
// The enumeration is defined in the TCG ACPI Specification Client Common Header.
//
- UINT32 platformClass;
+ UINT32 platformClass;
//
// The TCG EFI Platform Specification minor version number this BIOS supports.
// Any BIOS supporting version (1.22) MUST set this value to 02h.
// Any BIOS supporting version (2.0) SHALL set this value to 0x00.
//
- UINT8 specVersionMinor;
+ UINT8 specVersionMinor;
//
// The TCG EFI Platform Specification major version number this BIOS supports.
// Any BIOS supporting version (1.22) MUST set this value to 01h.
// Any BIOS supporting version (2.0) SHALL set this value to 0x02.
//
- UINT8 specVersionMajor;
+ UINT8 specVersionMajor;
//
// The TCG EFI Platform Specification errata for this specification this BIOS supports.
// Any BIOS supporting version and errata (1.22) MUST set this value to 02h.
// Any BIOS supporting version and errata (2.0) SHALL set this value to 0x00.
//
- UINT8 specErrata;
+ UINT8 specErrata;
//
// Specifies the size of the UINTN fields used in various data structures used in this specification.
// 0x01 indicates UINT32 and 0x02 indicates UINT64.
//
- UINT8 uintnSize;
+ UINT8 uintnSize;
//
// This field is added in "Spec ID Event03".
// The number of hashing algorithms used in this event log (except the first event).
// All events in this event log use all hashing algorithms defined here.
//
-//UINT32 numberOfAlgorithms;
+ // UINT32 numberOfAlgorithms;
//
// This field is added in "Spec ID Event03".
// An array of size numberOfAlgorithms of value pairs.
//
-//TCG_EfiSpecIdEventAlgorithmSize digestSize[numberOfAlgorithms];
+ // TCG_EfiSpecIdEventAlgorithmSize digestSize[numberOfAlgorithms];
//
// Size in bytes of the VendorInfo field.
// Maximum value SHALL be FFh bytes.
//
-//UINT8 vendorInfoSize;
+ // UINT8 vendorInfoSize;
//
// Provided for use by the BIOS implementer.
// The value might be used, for example, to provide more detailed information about the specific BIOS such as BIOS revision numbers, etc.
// The values within this field are not standardized and are implementer-specific.
// Platform-specific or -unique information SHALL NOT be provided in this field.
//
-//UINT8 vendorInfo[vendorInfoSize];
+ // UINT8 vendorInfo[vendorInfoSize];
} TCG_EfiSpecIDEventStruct;
+typedef struct tdTCG_PCClientTaggedEvent {
+ UINT32 taggedEventID;
+ UINT32 taggedEventDataSize;
+ // UINT8 taggedEventData[taggedEventDataSize];
+} TCG_PCClientTaggedEvent;
+#define TCG_Sp800_155_PlatformId_Event_SIGNATURE "SP800-155 Event"
+#define TCG_Sp800_155_PlatformId_Event2_SIGNATURE "SP800-155 Event2"
-#define TCG_EfiStartupLocalityEvent_SIGNATURE "StartupLocality"
-
+typedef struct tdTCG_Sp800_155_PlatformId_Event2 {
+ UINT8 Signature[16];
+ //
+ // Where Vendor ID is an integer defined
+ // at http://www.iana.org/assignments/enterprisenumbers
+ //
+ UINT32 VendorId;
+ //
+ // 16-byte identifier of a given platform's static configuration of code
+ //
+ EFI_GUID ReferenceManifestGuid;
+ //
+ // Below structure is newly added in TCG_Sp800_155_PlatformId_Event2.
+ //
+ // UINT8 PlatformManufacturerStrSize;
+ // UINT8 PlatformManufacturerStr[PlatformManufacturerStrSize];
+ // UINT8 PlatformModelSize;
+ // UINT8 PlatformModel[PlatformModelSize];
+ // UINT8 PlatformVersionSize;
+ // UINT8 PlatformVersion[PlatformVersionSize];
+ // UINT8 PlatformModelSize;
+ // UINT8 PlatformModel[PlatformModelSize];
+ // UINT8 FirmwareManufacturerStrSize;
+ // UINT8 FirmwareManufacturerStr[FirmwareManufacturerStrSize];
+ // UINT32 FirmwareManufacturerId;
+ // UINT8 FirmwareVersion;
+ // UINT8 FirmwareVersion[FirmwareVersionSize]];
+} TCG_Sp800_155_PlatformId_Event2;
+
+#define TCG_EfiStartupLocalityEvent_SIGNATURE "StartupLocality"
//
-// PC Client PTP spec Table 8 Relationship between Locality and Locality Attribute
+// The Locality Indicator which sent the TPM2_Startup command
//
-#define LOCALITY_0_INDICATOR 0x01
-#define LOCALITY_1_INDICATOR 0x02
-#define LOCALITY_2_INDICATOR 0x03
-#define LOCALITY_3_INDICATOR 0x04
-#define LOCALITY_4_INDICATOR 0x05
-
+#define LOCALITY_0_INDICATOR 0x00
+#define LOCALITY_3_INDICATOR 0x03
//
// Startup Locality Event
//
-typedef struct tdTCG_EfiStartupLocalityEvent{
- UINT8 Signature[16];
+typedef struct tdTCG_EfiStartupLocalityEvent {
+ UINT8 Signature[16];
//
// The Locality Indicator which sent the TPM2_Startup command
//
- UINT8 StartupLocality;
+ UINT8 StartupLocality;
} TCG_EfiStartupLocalityEvent;
-
//
// Restore original structure alignment
//
#pragma pack ()
#endif
-
-
diff --git a/src/include/ipxe/efi/IndustryStandard/Usb.h b/src/include/ipxe/efi/IndustryStandard/Usb.h
index 7eb1a8d95..8c7fe834f 100644
--- a/src/include/ipxe/efi/IndustryStandard/Usb.h
+++ b/src/include/ipxe/efi/IndustryStandard/Usb.h
@@ -2,20 +2,14 @@
Support for USB 2.0 standard.
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __USB_H__
#define __USB_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// Subset of Class and Subclass definitions from USB Specs
@@ -24,52 +18,52 @@ FILE_LICENCE ( BSD3 );
//
// Usb mass storage class code
//
-#define USB_MASS_STORE_CLASS 0x08
+#define USB_MASS_STORE_CLASS 0x08
//
// Usb mass storage subclass code, specify the command set used.
//
-#define USB_MASS_STORE_RBC 0x01 ///< Reduced Block Commands
-#define USB_MASS_STORE_8020I 0x02 ///< SFF-8020i, typically a CD/DVD device
-#define USB_MASS_STORE_QIC 0x03 ///< Typically a tape device
-#define USB_MASS_STORE_UFI 0x04 ///< Typically a floppy disk driver device
-#define USB_MASS_STORE_8070I 0x05 ///< SFF-8070i, typically a floppy disk driver device.
-#define USB_MASS_STORE_SCSI 0x06 ///< SCSI transparent command set
+#define USB_MASS_STORE_RBC 0x01 ///< Reduced Block Commands
+#define USB_MASS_STORE_8020I 0x02 ///< SFF-8020i, typically a CD/DVD device
+#define USB_MASS_STORE_QIC 0x03 ///< Typically a tape device
+#define USB_MASS_STORE_UFI 0x04 ///< Typically a floppy disk driver device
+#define USB_MASS_STORE_8070I 0x05 ///< SFF-8070i, typically a floppy disk driver device.
+#define USB_MASS_STORE_SCSI 0x06 ///< SCSI transparent command set
//
// Usb mass storage protocol code, specify the transport protocol
//
-#define USB_MASS_STORE_CBI0 0x00 ///< CBI protocol with command completion interrupt
-#define USB_MASS_STORE_CBI1 0x01 ///< CBI protocol without command completion interrupt
-#define USB_MASS_STORE_BOT 0x50 ///< Bulk-Only Transport
+#define USB_MASS_STORE_CBI0 0x00 ///< CBI protocol with command completion interrupt
+#define USB_MASS_STORE_CBI1 0x01 ///< CBI protocol without command completion interrupt
+#define USB_MASS_STORE_BOT 0x50 ///< Bulk-Only Transport
//
// Standard device request and request type
// USB 2.0 spec, Section 9.4
//
-#define USB_DEV_GET_STATUS 0x00
-#define USB_DEV_GET_STATUS_REQ_TYPE_D 0x80 // Receiver : Device
-#define USB_DEV_GET_STATUS_REQ_TYPE_I 0x81 // Receiver : Interface
-#define USB_DEV_GET_STATUS_REQ_TYPE_E 0x82 // Receiver : Endpoint
+#define USB_DEV_GET_STATUS 0x00
+#define USB_DEV_GET_STATUS_REQ_TYPE_D 0x80 // Receiver : Device
+#define USB_DEV_GET_STATUS_REQ_TYPE_I 0x81 // Receiver : Interface
+#define USB_DEV_GET_STATUS_REQ_TYPE_E 0x82 // Receiver : Endpoint
-#define USB_DEV_CLEAR_FEATURE 0x01
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
+#define USB_DEV_CLEAR_FEATURE 0x01
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
-#define USB_DEV_SET_FEATURE 0x03
-#define USB_DEV_SET_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
-#define USB_DEV_SET_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
-#define USB_DEV_SET_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
+#define USB_DEV_SET_FEATURE 0x03
+#define USB_DEV_SET_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
+#define USB_DEV_SET_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
+#define USB_DEV_SET_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
-#define USB_DEV_SET_ADDRESS 0x05
-#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
+#define USB_DEV_SET_ADDRESS 0x05
+#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
-#define USB_DEV_GET_DESCRIPTOR 0x06
-#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
+#define USB_DEV_GET_DESCRIPTOR 0x06
+#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
-#define USB_DEV_SET_DESCRIPTOR 0x07
-#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
+#define USB_DEV_SET_DESCRIPTOR 0x07
+#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
#define USB_DEV_GET_CONFIGURATION 0x08
#define USB_DEV_GET_CONFIGURATION_REQ_TYPE 0x80
@@ -77,15 +71,14 @@ FILE_LICENCE ( BSD3 );
#define USB_DEV_SET_CONFIGURATION 0x09
#define USB_DEV_SET_CONFIGURATION_REQ_TYPE 0x00
-#define USB_DEV_GET_INTERFACE 0x0A
-#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
-
-#define USB_DEV_SET_INTERFACE 0x0B
-#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
+#define USB_DEV_GET_INTERFACE 0x0A
+#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
-#define USB_DEV_SYNCH_FRAME 0x0C
-#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
+#define USB_DEV_SET_INTERFACE 0x0B
+#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
+#define USB_DEV_SYNCH_FRAME 0x0C
+#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
//
// USB standard descriptors and reqeust
@@ -97,11 +90,11 @@ FILE_LICENCE ( BSD3 );
/// USB 2.0 spec, Section 9.3
///
typedef struct {
- UINT8 RequestType;
- UINT8 Request;
- UINT16 Value;
- UINT16 Index;
- UINT16 Length;
+ UINT8 RequestType;
+ UINT8 Request;
+ UINT16 Value;
+ UINT16 Index;
+ UINT16 Length;
} USB_DEVICE_REQUEST;
///
@@ -109,20 +102,20 @@ typedef struct {
/// USB 2.0 spec, Section 9.6.1
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT16 BcdUSB;
- UINT8 DeviceClass;
- UINT8 DeviceSubClass;
- UINT8 DeviceProtocol;
- UINT8 MaxPacketSize0;
- UINT16 IdVendor;
- UINT16 IdProduct;
- UINT16 BcdDevice;
- UINT8 StrManufacturer;
- UINT8 StrProduct;
- UINT8 StrSerialNumber;
- UINT8 NumConfigurations;
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 BcdUSB;
+ UINT8 DeviceClass;
+ UINT8 DeviceSubClass;
+ UINT8 DeviceProtocol;
+ UINT8 MaxPacketSize0;
+ UINT16 IdVendor;
+ UINT16 IdProduct;
+ UINT16 BcdDevice;
+ UINT8 StrManufacturer;
+ UINT8 StrProduct;
+ UINT8 StrSerialNumber;
+ UINT8 NumConfigurations;
} USB_DEVICE_DESCRIPTOR;
///
@@ -130,14 +123,14 @@ typedef struct {
/// USB 2.0 spec, Section 9.6.3
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT16 TotalLength;
- UINT8 NumInterfaces;
- UINT8 ConfigurationValue;
- UINT8 Configuration;
- UINT8 Attributes;
- UINT8 MaxPower;
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 TotalLength;
+ UINT8 NumInterfaces;
+ UINT8 ConfigurationValue;
+ UINT8 Configuration;
+ UINT8 Attributes;
+ UINT8 MaxPower;
} USB_CONFIG_DESCRIPTOR;
///
@@ -145,15 +138,15 @@ typedef struct {
/// USB 2.0 spec, Section 9.6.5
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT8 InterfaceNumber;
- UINT8 AlternateSetting;
- UINT8 NumEndpoints;
- UINT8 InterfaceClass;
- UINT8 InterfaceSubClass;
- UINT8 InterfaceProtocol;
- UINT8 Interface;
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT8 InterfaceNumber;
+ UINT8 AlternateSetting;
+ UINT8 NumEndpoints;
+ UINT8 InterfaceClass;
+ UINT8 InterfaceSubClass;
+ UINT8 InterfaceProtocol;
+ UINT8 Interface;
} USB_INTERFACE_DESCRIPTOR;
///
@@ -161,12 +154,12 @@ typedef struct {
/// USB 2.0 spec, Section 9.6.6
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT8 EndpointAddress;
- UINT8 Attributes;
- UINT16 MaxPacketSize;
- UINT8 Interval;
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT8 EndpointAddress;
+ UINT8 Attributes;
+ UINT16 MaxPacketSize;
+ UINT8 Interval;
} USB_ENDPOINT_DESCRIPTOR;
///
@@ -174,45 +167,44 @@ typedef struct {
/// USB 2.0 spec, Section 9.6.7
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- CHAR16 String[1];
+ UINT8 Length;
+ UINT8 DescriptorType;
+ CHAR16 String[1];
} EFI_USB_STRING_DESCRIPTOR;
#pragma pack()
-
typedef enum {
//
// USB request type
//
- USB_REQ_TYPE_STANDARD = (0x00 << 5),
- USB_REQ_TYPE_CLASS = (0x01 << 5),
- USB_REQ_TYPE_VENDOR = (0x02 << 5),
+ USB_REQ_TYPE_STANDARD = (0x00 << 5),
+ USB_REQ_TYPE_CLASS = (0x01 << 5),
+ USB_REQ_TYPE_VENDOR = (0x02 << 5),
//
// Standard control transfer request type, or the value
// to fill in EFI_USB_DEVICE_REQUEST.Request
//
- USB_REQ_GET_STATUS = 0x00,
- USB_REQ_CLEAR_FEATURE = 0x01,
- USB_REQ_SET_FEATURE = 0x03,
- USB_REQ_SET_ADDRESS = 0x05,
- USB_REQ_GET_DESCRIPTOR = 0x06,
- USB_REQ_SET_DESCRIPTOR = 0x07,
- USB_REQ_GET_CONFIG = 0x08,
- USB_REQ_SET_CONFIG = 0x09,
- USB_REQ_GET_INTERFACE = 0x0A,
- USB_REQ_SET_INTERFACE = 0x0B,
- USB_REQ_SYNCH_FRAME = 0x0C,
+ USB_REQ_GET_STATUS = 0x00,
+ USB_REQ_CLEAR_FEATURE = 0x01,
+ USB_REQ_SET_FEATURE = 0x03,
+ USB_REQ_SET_ADDRESS = 0x05,
+ USB_REQ_GET_DESCRIPTOR = 0x06,
+ USB_REQ_SET_DESCRIPTOR = 0x07,
+ USB_REQ_GET_CONFIG = 0x08,
+ USB_REQ_SET_CONFIG = 0x09,
+ USB_REQ_GET_INTERFACE = 0x0A,
+ USB_REQ_SET_INTERFACE = 0x0B,
+ USB_REQ_SYNCH_FRAME = 0x0C,
//
// Usb control transfer target
//
- USB_TARGET_DEVICE = 0,
- USB_TARGET_INTERFACE = 0x01,
- USB_TARGET_ENDPOINT = 0x02,
- USB_TARGET_OTHER = 0x03,
+ USB_TARGET_DEVICE = 0,
+ USB_TARGET_INTERFACE = 0x01,
+ USB_TARGET_ENDPOINT = 0x02,
+ USB_TARGET_OTHER = 0x03,
//
// USB Descriptor types
@@ -233,21 +225,20 @@ typedef enum {
//
// USB endpoint types: 00: control, 01: isochronous, 10: bulk, 11: interrupt
//
- USB_ENDPOINT_CONTROL = 0x00,
- USB_ENDPOINT_ISO = 0x01,
- USB_ENDPOINT_BULK = 0x02,
- USB_ENDPOINT_INTERRUPT = 0x03,
+ USB_ENDPOINT_CONTROL = 0x00,
+ USB_ENDPOINT_ISO = 0x01,
+ USB_ENDPOINT_BULK = 0x02,
+ USB_ENDPOINT_INTERRUPT = 0x03,
- USB_ENDPOINT_TYPE_MASK = 0x03,
- USB_ENDPOINT_DIR_IN = 0x80,
+ USB_ENDPOINT_TYPE_MASK = 0x03,
+ USB_ENDPOINT_DIR_IN = 0x80,
//
- //Use 200 ms to increase the error handling response time
+ // Use 200 ms to increase the error handling response time
//
EFI_USB_INTERRUPT_DELAY = 2000000
} USB_TYPES_DEFINITION;
-
//
// HID constants definition, see Device Class Definition
// for Human Interface Devices (HID) rev1.11
@@ -261,19 +252,19 @@ typedef enum {
//
// HID specific requests.
//
-#define USB_HID_CLASS_GET_REQ_TYPE 0xa1
-#define USB_HID_CLASS_SET_REQ_TYPE 0x21
+#define USB_HID_CLASS_GET_REQ_TYPE 0xa1
+#define USB_HID_CLASS_SET_REQ_TYPE 0x21
//
// HID report item format
//
-#define HID_ITEM_FORMAT_SHORT 0
-#define HID_ITEM_FORMAT_LONG 1
+#define HID_ITEM_FORMAT_SHORT 0
+#define HID_ITEM_FORMAT_LONG 1
//
// Special tag indicating long items
//
-#define HID_ITEM_TAG_LONG 15
+#define HID_ITEM_TAG_LONG 15
//
// HID report descriptor item type (prefix bit 2,3)
@@ -295,15 +286,15 @@ typedef enum {
//
// HID report descriptor main item contents
//
-#define HID_MAIN_ITEM_CONSTANT 0x001
-#define HID_MAIN_ITEM_VARIABLE 0x002
-#define HID_MAIN_ITEM_RELATIVE 0x004
-#define HID_MAIN_ITEM_WRAP 0x008
-#define HID_MAIN_ITEM_NONLINEAR 0x010
-#define HID_MAIN_ITEM_NO_PREFERRED 0x020
-#define HID_MAIN_ITEM_NULL_STATE 0x040
-#define HID_MAIN_ITEM_VOLATILE 0x080
-#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100
+#define HID_MAIN_ITEM_CONSTANT 0x001
+#define HID_MAIN_ITEM_VARIABLE 0x002
+#define HID_MAIN_ITEM_RELATIVE 0x004
+#define HID_MAIN_ITEM_WRAP 0x008
+#define HID_MAIN_ITEM_NONLINEAR 0x010
+#define HID_MAIN_ITEM_NO_PREFERRED 0x020
+#define HID_MAIN_ITEM_NULL_STATE 0x040
+#define HID_MAIN_ITEM_VOLATILE 0x080
+#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100
//
// HID report descriptor collection item types
@@ -331,16 +322,16 @@ typedef enum {
//
// HID report descriptor local item tags
//
-#define HID_LOCAL_ITEM_TAG_USAGE 0
-#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1
-#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2
-#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3
-#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4
-#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5
-#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7
-#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8
-#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9
-#define HID_LOCAL_ITEM_TAG_DELIMITER 10
+#define HID_LOCAL_ITEM_TAG_USAGE 0
+#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1
+#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5
+#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7
+#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8
+#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9
+#define HID_LOCAL_ITEM_TAG_DELIMITER 10
//
// HID report types
@@ -365,8 +356,8 @@ typedef enum {
/// HID 1.1, section 6.2.1
///
typedef struct hid_class_descriptor {
- UINT8 DescriptorType;
- UINT16 DescriptorLength;
+ UINT8 DescriptorType;
+ UINT16 DescriptorLength;
} EFI_USB_HID_CLASS_DESCRIPTOR;
///
@@ -375,12 +366,12 @@ typedef struct hid_class_descriptor {
/// HID 1.1, section 6.2.1
///
typedef struct hid_descriptor {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT16 BcdHID;
- UINT8 CountryCode;
- UINT8 NumDescriptors;
- EFI_USB_HID_CLASS_DESCRIPTOR HidClassDesc[1];
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 BcdHID;
+ UINT8 CountryCode;
+ UINT8 NumDescriptors;
+ EFI_USB_HID_CLASS_DESCRIPTOR HidClassDesc[1];
} EFI_USB_HID_DESCRIPTOR;
#pragma pack()
generated by cgit (git 2.34.1) at 2025-02-23 07:01:47 +0000