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authorMarek Vasut <marex@denx.de>2025-01-16 05:03:26 +0100
committerFabio Estevam <festevam@gmail.com>2025-01-20 08:40:39 -0300
commita6a850fead918f4530263327a0d9281d5a659c80 (patch)
treeffde9017c600a15d047b9677653f62e3b8845847
parentcc4e8af2c552bda7ada354d0fd347acb9edc825c (diff)
downloadu-boot-a6a850fead918f4530263327a0d9281d5a659c80.tar.gz
net: fsl_enetc: Introduce driver data
Introduce driver data for each PCI device. The driver data carry offsets of registers which differ between different SoCs. Signed-off-by: Marek Vasut <marex@denx.de>
-rw-r--r--drivers/net/fsl_enetc.c13
-rw-r--r--drivers/net/fsl_enetc.h9
2 files changed, 21 insertions, 1 deletions
diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 532a367c241..c92626a8782 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -786,8 +786,19 @@ U_BOOT_DRIVER(eth_enetc_ls) = {
.plat_auto = sizeof(struct eth_pdata),
};
+static const struct enetc_data enetc_data_ls = {
+ .reg_offset_pmr = ENETC_PMR_OFFSET_LS,
+ .reg_offset_psipmar = ENETC_PSIPMARn_OFFSET_LS,
+ .reg_offset_pcapr = ENETC_PCAPR_OFFSET_LS,
+ .reg_offset_psicfgr = ENETC_PSICFGR_OFFSET_LS,
+ .reg_offset_mac = ENETC_PM_OFFSET_LS,
+};
+
static struct pci_device_id enetc_ids_ls[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_ETH) },
+ {
+ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_ETH),
+ .driver_data = (ulong)&enetc_data_ls,
+ },
{}
};
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 15408b669b4..b815474c246 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -168,6 +168,15 @@ struct enetc_priv {
struct phy_device *phy;
};
+struct enetc_data {
+ /* Register layout offsets */
+ u16 reg_offset_pmr;
+ u16 reg_offset_psipmar;
+ u16 reg_offset_pcapr;
+ u16 reg_offset_psicfgr;
+ u16 reg_offset_mac;
+};
+
/* PCS / internal SoC PHY ID, it defaults to 0 on all interfaces */
#define ENETC_PCS_PHY_ADDR 0