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author | Tom Rini <trini@konsulko.com> | 2022-06-27 10:15:50 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2022-06-27 10:15:50 -0400 |
commit | c316ee674f25b73285f241ce922307296616a92a (patch) | |
tree | 9067e60451612dee5fbd0d3132548d3e84063f53 /configs/xilinx_zynq_virt_defconfig | |
parent | 31016a5a853cb5b8e27e9fdf956d8250ae59eca9 (diff) | |
parent | 728a86edb63a647e6faf211c0dbc7bd0e4ff7ac6 (diff) | |
download | u-boot-c316ee674f25b73285f241ce922307296616a92a.tar.gz |
Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.10
cpu:
- Add driver for microblaze cpu
net:
- Add support for DM_ETH_PHY to AXI emac and emaclite
xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS
zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize
versal:
- Enable loading app at EL1
serial:
- Setup default address and clock rates for DEBUG uarts
pinctrl:
- Add support for tri state and output enable properties
relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze
microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support
timer:
- Extract axi timer driver from Microblaze to generic location
Diffstat (limited to 'configs/xilinx_zynq_virt_defconfig')
-rw-r--r-- | configs/xilinx_zynq_virt_defconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 92ef35c6475..fb4e72be0dd 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -71,6 +71,7 @@ CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_MTDPARTS_SPREAD=y CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y @@ -124,6 +125,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_DM_ETH_PHY=y CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ARM_DCC=y |