diff options
Diffstat (limited to 'include/configs/p1_p2_rdb_pc.h')
| -rw-r--r-- | include/configs/p1_p2_rdb_pc.h | 55 |
1 files changed, 2 insertions, 53 deletions
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f6ecf2a7a8b..f74ad628fee 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -77,47 +77,24 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #elif defined(CONFIG_SPIFLASH) -#define CONFIG_SPL_SPI_FLASH_MINIMAL -#define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_NAND_INIT -#define CONFIG_SPL_COMMON_INIT_DDR -#define CONFIG_SPL_MAX_SIZE (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SPL_INIT_MINIMAL -#define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_MAX_SIZE 4096 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 #define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 @@ -126,10 +103,6 @@ #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif #endif /* not CONFIG_TPL_BUILD */ - -#define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_TPL_PAD_TO 0x20000 -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -152,12 +125,6 @@ #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR -/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k - SPL code*/ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif - /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_SPD_BUS_NUM 1 @@ -310,9 +277,7 @@ /* Size of used area in RAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) @@ -365,31 +330,15 @@ #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) -#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) -#if defined(CONFIG_TARGET_P2020RDB) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10) -#else -#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) -#endif #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) #else #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x2000) -#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) #endif /* CONFIG_TPL_BUILD */ #endif #endif @@ -402,7 +351,7 @@ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL) +#if defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(INIT_MINIMAL) #define CONFIG_NS16550_MIN_FUNCTIONS #endif |