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| author | Isaku Yamahata <yamahata@valinux.co.jp> | 2010-06-22 17:57:49 +0900 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2010-07-04 08:52:12 -0400 |
| commit | 0a8eada0df7448526af83d3e6df8ed58e72d925d (patch) | |
| tree | ceee0c62c6bab1d161a373eac934edc146560cf3 /src/config.h | |
| parent | dfd94fafc2a157f4fc64014069e19dc6e6bbac52 (diff) | |
| download | seabios-0a8eada0df7448526af83d3e6df8ed58e72d925d.tar.gz | |
seabios: pciinit: make pci bar assigner preferchable memory aware.
Make pci bar assigner preferchable memory aware.
This is needed for PCI bridge support because memory space and
prefetchable memory space is filtered independently based on
memory base/limit and prefetchable memory base/limit of pci bridge.
On bus 0, such a distinction isn't necessary so keep existing behavior
by checking bus=0.
With this patch, pci mem assignment area has been decreased.
To make seabios behave as before for compatible reason,
define CONFIG_OLD_PCIMEM_ASSIGNMENT.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Diffstat (limited to 'src/config.h')
| -rw-r--r-- | src/config.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/config.h b/src/config.h index 238a2866..a7a6ccc6 100644 --- a/src/config.h +++ b/src/config.h @@ -161,7 +161,24 @@ // 32KB for shadow ram copying (works around emulator deficiencies) #define BUILD_BIOS_TMP_ADDR 0x30000 #define BUILD_MAX_HIGHMEM 0xe0000000 + +// Support old pci mem assignment behaviour +//#define CONFIG_OLD_PCIMEM_ASSIGNMENT 1 +#if CONFIG_OLD_PCIMEM_ASSIGNMENT +#define BUILD_PCIMEM_START 0xf0000000 +#define BUILD_PCIMEM_SIZE (BUILD_PCIMEM_END - BUILD_PCIMEM_START) +#define BUILD_PCIMEM_END 0xfec00000 /* IOAPIC is mapped at */ +#define BUILD_PCIPREFMEM_START 0 +#define BUILD_PCIPREFMEM_SIZE 0 +#define BUILD_PCIPREFMEM_END 0 +#else #define BUILD_PCIMEM_START 0xf0000000 +#define BUILD_PCIMEM_SIZE 0x08000000 /* half- of pci window */ +#define BUILD_PCIMEM_END (BUILD_PCIMEM_START + BUILD_PCIMEM_SIZE) +#define BUILD_PCIPREFMEM_START BUILD_PCIMEM_END +#define BUILD_PCIPREFMEM_SIZE (BUILD_PCIPREFMEM_END - BUILD_PCIPREFMEM_START) +#define BUILD_PCIPREFMEM_END 0xfec00000 /* IOAPIC is mapped at */ +#endif #define BUILD_APIC_ADDR 0xfee00000 #define BUILD_IOAPIC_ADDR 0xfec00000 |