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authorKevin O'Connor <kevin@koconnor.net>2008-08-17 11:08:46 -0400
committerKevin O'Connor <kevin@koconnor.net>2008-08-17 11:08:46 -0400
commitcde7a58def4231f26d1dd53909067a143fa9eaab (patch)
tree286639d8d129c015fc953fbd13097cd7e7ca6e63 /src
parent6cb8ba9cb3f8a71ac8e561f477dc2a51a2ecdb7a (diff)
downloadseabios-cde7a58def4231f26d1dd53909067a143fa9eaab.tar.gz
Return max bus number in int 1a/b101 call.
Add new option CONFIG_PCI_BUS_COUNT to set max bus count. Use that option consistently in handle_1ab101() and pci.c. Also, clean up comments of handle_1ab101().
Diffstat (limited to 'src')
-rw-r--r--src/config.h2
-rw-r--r--src/pci.c7
-rw-r--r--src/pcibios.c9
3 files changed, 9 insertions, 9 deletions
diff --git a/src/config.h b/src/config.h
index f877101d..ba63b7e1 100644
--- a/src/config.h
+++ b/src/config.h
@@ -35,6 +35,8 @@
#define CONFIG_CDROM_EMU 1
// Support int 1a/b1 PCI BIOS calls
#define CONFIG_PCIBIOS 1
+// Maximum number of PCI busses.
+#define CONFIG_PCI_BUS_COUNT 2
// Support int 15/53 APM BIOS calls
#define CONFIG_APMBIOS 1
// Support int 19/18 system bootup support
diff --git a/src/pci.c b/src/pci.c
index efcab46e..7ed83008 100644
--- a/src/pci.c
+++ b/src/pci.c
@@ -8,8 +8,7 @@
#include "pci.h" // PCIDevice
#include "ioport.h" // outl
#include "util.h" // dprintf
-
-#define MAX_BUS 1
+#include "config.h" // CONFIG_*
void pci_config_writel(PCIDevice d, u32 addr, u32 val)
{
@@ -58,7 +57,7 @@ pci_find_device(u16 vendid, u16 devid, int index, PCIDevice *dev)
{
int devfn, bus;
u32 id = (devid << 16) | vendid;
- for (bus=0; bus < MAX_BUS; bus++) {
+ for (bus=0; bus < CONFIG_PCI_BUS_COUNT; bus++) {
for (devfn=0; devfn<0x100; devfn++) {
PCIDevice d = pci_bd(bus, devfn);
u32 v = pci_config_readl(d, 0x00);
@@ -80,7 +79,7 @@ int
pci_find_class(u32 classid, int index, PCIDevice *dev)
{
int devfn, bus;
- for (bus=0; bus < MAX_BUS; bus++) {
+ for (bus=0; bus < CONFIG_PCI_BUS_COUNT; bus++) {
for (devfn=0; devfn<0x100; devfn++) {
PCIDevice d = pci_bd(bus, devfn);
u32 v = pci_config_readl(d, 0x08);
diff --git a/src/pcibios.c b/src/pcibios.c
index 545ad8dd..3823c2eb 100644
--- a/src/pcibios.c
+++ b/src/pcibios.c
@@ -20,14 +20,13 @@
static void
handle_1ab101(struct bregs *regs)
{
- regs->ax = 0x0001;
- regs->bx = 0x0210;
- regs->cx = 0;
- // XXX - regs->cl should equal max bus number.
+ regs->al = 0x01; // Flags - "Config Mechanism #1" supported.
+ regs->bx = 0x0210; // PCI version 2.10
+ regs->cl = CONFIG_PCI_BUS_COUNT - 1;
regs->edx = 0x20494350; // "PCI "
// XXX - bochs bios code sets edi to point to 32bit code - but no
// reference to this in spec.
- set_success(regs);
+ set_code_success(regs);
}
// find pci device