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authorKevin O'Connor <kevin@koconnor.net>2008-08-17 11:08:46 -0400
committerKevin O'Connor <kevin@koconnor.net>2008-08-17 11:08:46 -0400
commitcde7a58def4231f26d1dd53909067a143fa9eaab (patch)
tree286639d8d129c015fc953fbd13097cd7e7ca6e63 /src/pcibios.c
parent6cb8ba9cb3f8a71ac8e561f477dc2a51a2ecdb7a (diff)
downloadseabios-cde7a58def4231f26d1dd53909067a143fa9eaab.tar.gz
Return max bus number in int 1a/b101 call.
Add new option CONFIG_PCI_BUS_COUNT to set max bus count. Use that option consistently in handle_1ab101() and pci.c. Also, clean up comments of handle_1ab101().
Diffstat (limited to 'src/pcibios.c')
-rw-r--r--src/pcibios.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/src/pcibios.c b/src/pcibios.c
index 545ad8dd..3823c2eb 100644
--- a/src/pcibios.c
+++ b/src/pcibios.c
@@ -20,14 +20,13 @@
static void
handle_1ab101(struct bregs *regs)
{
- regs->ax = 0x0001;
- regs->bx = 0x0210;
- regs->cx = 0;
- // XXX - regs->cl should equal max bus number.
+ regs->al = 0x01; // Flags - "Config Mechanism #1" supported.
+ regs->bx = 0x0210; // PCI version 2.10
+ regs->cl = CONFIG_PCI_BUS_COUNT - 1;
regs->edx = 0x20494350; // "PCI "
// XXX - bochs bios code sets edi to point to 32bit code - but no
// reference to this in spec.
- set_success(regs);
+ set_code_success(regs);
}
// find pci device